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arch: arm: cortex_m: 'movs reg, imm' mnemonic #85046

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One nmemonic was missed by f843428 in PR #80441

This is causing test failures on m0 with IAR.

That commit said it better than I could myself:

The ARM Thumb-1 instruction set, used by ARMv6-M and ARMv8-M Baseline cores, does not have a valid encoding for "immediate-to-register move without affecting flags" instruction (i.e. mov reg, imm), and the only valid variant of immediate-to-register move instruction for it is movs, which affects the flags.

Since none of the register initialisation instructions used here are flag-sensitive in their context, this commit changes mov to movs.

This fixes the compilation errors with Clang/LLVM, which is more picky about the mov mnemonic usage and prints out an "invalid instruction" error when mov reg, imm is specified in Thumb-1 mode.

Note that GNU assembler implicitly converts mov reg, imm to movs reg, imm when assembling in Thumb-1 mode.

@zephyrbot zephyrbot added area: ARM ARM (32-bit) Architecture size: XS A PR changing only a single line of code labels Feb 3, 2025
wearyzen
wearyzen previously approved these changes Feb 5, 2025
@kartben kartben requested a review from ithinuel February 13, 2025 16:35
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kartben commented Feb 13, 2025

@RobinKastberg this needs rebasing due to merge conflict, fyi. Thanks!

@nashif
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nashif commented Feb 13, 2025

@RobinKastberg need rebase

One nmemonic was missed by f843428

That commit said:

The ARM Thumb-1 instruction set, used by ARMv6-M and ARMv8-M Baseline
cores, does not have a valid encoding for "immediate-to-register move
without affecting flags" instruction (i.e. `mov reg, imm`), and the only
valid variant of immediate-to-register move instruction for it is `movs`,
which affects the flags.

Since none of the register initialisation instructions used here are
flag-sensitive in their context, this commit changes `mov` to `movs`.

This fixes the compilation errors with Clang/LLVM, which is more picky
about the `mov` mnemonic usage and prints out an "invalid instruction"
error when `mov reg, imm` is specified in Thumb-1 mode.

Note that GNU assembler implicitly converts `mov reg, imm` to `movs reg,
imm` when assembling in Thumb-1 mode.

Signed-off-by: Robin Kastberg <[email protected]>
@RobinKastberg
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rebased

@kartben kartben requested review from wearyzen and spchee February 13, 2025 17:53
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6 participants