Fixed simulation, enchanced CI, polishing

.github/workflows/synthesis.yml

@@ -10,7 +10,6 @@ on:
 
 env:
   USER: root
-  ACTIONS_ALLOW_USE_UNSECURE_NODE_VERSION: true
 
 jobs:
   linux-testing:
@@ -26,12 +25,18 @@ jobs:
           - tool: quartus
             imagerepo: ghcr.io/raetro/quartus
             imagever: 21.1.1
-            boards: 43
+            boards: terasic_sockit
+            labs: 12345
+          - tool: quartus
+            imagerepo: ghcr.io/raetro/quartus
+            imagever: 17.1
+            boards: de10_lite omdazz
             labs: 12345
           - tool: quartus
             imagerepo: ghcr.io/raetro/quartus
             imagever: 13.0sp1
-            boards: 10 36
+            # TODO: omdazz_epm570_quartus_13_1_or_older
+            boards: de2_115 de0 rzrd_pmod_mic3
             labs: 12345
     steps:
       - name: Checkout
@@ -45,7 +50,7 @@ jobs:
           set -ex; cd *${GITHUB_SHA}
           echo >scripts/steps/04_configure_fpga.source_bash # disable programmator
           for b in ${{ matrix.boards }}; do
-            echo -e "$b\ny\n" | ./check_setup_and_choose_fpga_board.bash
+            echo "$b" > fpga_board_selection
             for x in labs/[${{ matrix.labs }}]_*/*_*_*/03_synthesize_for_fpga.bash; do
                 pushd `dirname $x`
                 echo | ./`basename $x`

boards/terasic_sockit/board_specific_top.sv

@@ -68,7 +68,7 @@ module board_specific_top
         .w_key         ( w_key           ),
         .w_sw          ( w_sw            ),
         .w_led         ( w_led           ),
-        .w_digit       ( 1 /* w_digit */ ),
+        .w_digit       ( 2 /* w_digit */ ),
         .w_gpio        ( 1 /* w_gpio  */ ),
 
         .screen_width  ( screen_width    ),

labs/3_music/3_0_oscilloscope/lab_top.sv

@@ -98,7 +98,7 @@ module lab_top
 
     // Excercise 1: Implement Zoom by x-axis with keys
     // Excercise 2: Optimize to reduce bits of bufy
-    assign white = x < vldx                             // Design practice: Check if element of bufy is initialized
+    assign white = x <= vldx                            // Design practice: Check if element of bufy is initialized
             && (x>>2) <  (distance[19-:w_x])
             && (y>>3) == (midy - bufy[(x>>2)])>>3       // draw bolder lines with shift by 3 bits
             && x < screen_width && y < screen_height;   // do not draw outside the screen

peripherals/tm1638_registers.sv

@@ -32,7 +32,7 @@ module tm1638_registers
     localparam static_hex = 1'b1;
 `endif
 
-    wire [w_seg - 1:0] init76543210[w_digit] =
+    wire [w_digit-1:0][w_seg - 1:0] init76543210 =
                       //hgfedcba             --a--
                     '{'b00111111, // 0      |     |
                       'b00000110, // 1      f     b

scripts/steps/00_setup_icarus.source_bash

@@ -57,8 +57,8 @@ run_icarus_verilog ()
     shopt -s nullglob
 
     iverilog -g2005-sv -s tb \
-         -I ..      -I "$lab_dir/common" \
-            ../*.sv    "$lab_dir/common"/*.sv \
+         -I .. -I "$lab_dir/common" -I "$package_dir/peripherals" \
+            ../*.sv "$lab_dir/common"/*.sv "$package_dir/peripherals"/*.sv \
             ../*.v \
         2>&1 | tee "$log"