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Add board-specific files for Tang Nano 20K LCD 480x272 TM1638 #186

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Add board-specific files for Tang Nano 20K LCD 480x272 TM1638 #186

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Add board-specific files for Tang Nano 20K LCD 480x272 TM1638
timothybasanov Nov 4, 2024
8969c3a
Update project_process_config_01.json and project_process_config_02.json
timothybasanov Nov 4, 2024
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51 changes: 51 additions & 0 deletions boards/tang_nano_20k_lcd_480_272_tm1638/README.md
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# Tang Nano 20K Documentation

The **Tang Nano 20K** is a compact FPGA development board designed by Sipeed. It is based on the GW2AR-18 FPGA chip and is suitable for a variety of applications, including digital signal processing, embedded systems, and hardware prototyping.

## Key Features
- **FPGA Chip**: GW2AR-18
- **Logic Cells**: 20,736
- **Block RAM**: 864 Kbits
- **32-bit SDR SDRAM**: 64 Mbits
- **Onboard Resources**:
- **Debugger**: BL616 (JTAG, USB to UART, USB to SPI)
- **Clock Generator**: MS5351 (provides multiple clocks)
- **Display Interface**: 40-pin RGB LCD connector, HDMI interface
- **LEDs**: 6 user-controllable LEDs
- **RGB LED**: 1 WS2812 RGB LED for visual feedback
- **User Buttons**: 2 buttons for input purposes
- **TF Card Slot**: For external storage
- **PCM Amplifier**: MAX98357A for audio driving
- **Flash Storage**: 64 Mbits for saving bitstream
- **Size**: 22.55mm x 54.04mm

## Pinout Diagram

![Tang Nano 20K Pinout](./tang_nano_20k_pinlabel.png)

See [IC -> Name mapping](./board_specific.cst) and [Name -> Use mapping](./board_specific_top.sv).

| Use | Name | IC | Board | IC | Name | Use |
|----------------:|--------:|----:|:-----:|----:|-----------------|------------------|
| INMP441: i2s_lr | GPIO[1] | 73 | USB-C | 5V | | |
| INMP441: i2s_ws | GPIO[2] | 74 | S1 S2 | GND | | |
| INMP441: i2s_sck| GPIO[3] | 75 | 6xLED | 76 | | |
| INMP441: i2s_sd | SD_DAT1 | 85 | | 80 | | |
| | | 77 | Si | 42 | | |
| | | 15 | PEED | 41 | | |
| | | 16 | | 56 | | |
| | | 27 | | 54 | | |
| | | 28 | | 51 | | |
| | | 25 | TANG | 48 | | |
| | | 26 | | 55 | | |
| | | 29 | | 49 | | |
| | | 30 | NANO | 86 | GPIO[0] | TM1638: sio_data |
| | | 31 | | 79 | | |
| | | 17 | | GND | | Ground |
| | | 20 | [20K] | 3V3 | | Power: 3.3V |
| | | 19 | | 72 | JOYSTICK_CS2 | TM1638: sio_clk |
| | | 18 | HDMI | 71 | JOYSTICK_MISO2 | TM1638: sio_stb |
| | | 3V3 | | 53 | | |
| | | GND | | 52 | | |

For more detailed information and tutorials, please visit the [Tang Nano 20K Wiki](https://wiki.sipeed.com/hardware/en/tang/tang-nano-20k/nano-20k.html).
154 changes: 154 additions & 0 deletions boards/tang_nano_20k_lcd_480_272_tm1638/board_specific.cst
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// The pin assignments
// All I/O pins here are 3.3V compatible unless specified otherwise

IO_LOC "CLK" 4;

IO_LOC "KEY[0]" 88;
IO_LOC "KEY[1]" 87;

//IO_LOC "LED[0]" 15;
//IO_LOC "LED[1]" 16;
//IO_LOC "LED[2]" 17;
//IO_LOC "LED[3]" 18;
//IO_LOC "LED[4]" 19;
//IO_LOC "LED[5]" 20;

// Some LCD pins share bank with TMDS pins
// which have different voltage requirements.

IO_LOC "LCD_CLK" 77;
IO_LOC "LCD_DEN" 48;
//IO_LOC "LCD_HS" 25;
//IO_LOC "LCD_VS" 26;

IO_LOC "LCD_R[3]" 42;
IO_LOC "LCD_R[4]" 41;
IO_LOC "LCD_R[5]" 49;
IO_LOC "LCD_R[6]" 39;
IO_LOC "LCD_R[7]" 38;

IO_LOC "LCD_G[2]" 37;
IO_LOC "LCD_G[3]" 36;
IO_LOC "LCD_G[4]" 35;
IO_LOC "LCD_G[5]" 34;
IO_LOC "LCD_G[6]" 33;
IO_LOC "LCD_G[7]" 32;

IO_LOC "LCD_B[3]" 31;
IO_LOC "LCD_B[4]" 30;
IO_LOC "LCD_B[5]" 29;
IO_LOC "LCD_B[6]" 28;
IO_LOC "LCD_B[7]" 27;

// TMDS pins conflict with LCD pins
// In this configuration they are commented out
// IO_LOC "O_TMDS_CLK_P" 33,34;
// IO_LOC "O_TMDS_DATA_P[0]" 35,36;
// IO_LOC "O_TMDS_DATA_P[1]" 37,38;
// IO_LOC "O_TMDS_DATA_P[2]" 39,40;

// DVI I2C
//IO_LOC "EDID_CLK" 53;
//IO_LOC "EDID_DAT" 52;

// UART to debugger
//IO_LOC "UART_TX" 70;
//IO_LOC "UART_RX" 69;

// //IO_LOC "UART_RXD" 31; // Conflct with LCD_B[0]
// //IO_LOC "UART_TXD" 30; // Conflct with LCD_B[1]

// SDIO pins for SD-cards
//IO_LOC "SD_CLK" 83;
//IO_LOC "SD_CMD" 82;
//IO_LOC "SD_DAT0" 84;
//IO_LOC "SD_DAT1" 85; // Used for inmp441 sd
//IO_LOC "SD_DAT2" 80;
//IO_LOC "SD_DAT3" 81;

// Onboard I2S audio
//IO_LOC "HP_BCK" 56; // DAC_BCLK
//IO_LOC "HP_DIN" 54; // DAC_DIN
//IO_LOC "HP_WS" 55; // DAC_LRCK
//IO_LOC "PA_EN" 51; // For audio, should be assigned 1

// On-board WS2812 RGB LED with a serial interface
//IO_LOC "WS2812" 79;

// GPIO for external modules

// //IO_LOC "JOYSTICK_CLK" 17; // Conflict with LED[2]
// //IO_LOC "JOYSTICK_MOSI" 20; // Conflict with LED[5]
// //IO_LOC "JOYSTICK_MISO" 19; // Conflict with LED[4]
// //IO_LOC "JOYSTICK_CS" 18; // Conflict with LED[3]

// //IO_LOC "JOYSTICK_CLK2" 52; // Conflicts with EDID_CLK
// //IO_LOC "JOYSTICK_MOSI2" 53; // Conflicts with EDID_DAT
//IO_LOC "JOYSTICK_MISO2" 71; // TM1638: sio_stb
//IO_LOC "JOYSTICK_CS2" 72; // TM1638: sio_clk

//IO_LOC "GPIO[0]" 86; // TM1638: sio_data
//IO_LOC "GPIO[1]" 73; // INMP441: i2s_lr
//IO_LOC "GPIO[2]" 74; // INMP441: i2s_ws
//IO_LOC "GPIO[3]" 75; // INMP441: i2s_sck
// //IO_LOC "SD_DAT1" 85; // INMP441: i2s_sd

// Extra GPIO for custom tasks
//IO_LOC "GPIO[4]" 76;
// //IO_LOC "SD_DAT2" 80;
// //IO_LOC "WS2812" 79;
// //IO_LOC "EDID_CLK" 53;
// //IO_LOC "EDID_DAT" 52;


// TM1638 occupy:
//
// 86 GPIO[0] - tm1638: sio_data
// 72 JOYSTICK_CS2 - tm1638: sio_clk
// 71 JOYSTICK_MISO2 - tm1638: sio_stb

// INMP 441 occupy:
//
// 73 GPIO[1] - inmp441: lr
// 74 GPIO[2] - inmp441: ws
// 75 GPIO[3] - inmp441: sck
// 85 SD_DAT1 - inmp441: sd

// Extra pins for GPIO:
//
// 76 GCLKC_1 - gpio[0]
// 80 SD_DAT2 - gpio[1]
// Consider 79 / 2812_DIN
// Consider 53 / EDID_CLK
// Consider 52 / EDID_DAT

// Pin conflicts:
//
// 17; //IO_LOC "JOYSTICK_CLK"
// 17; //IO_LOC "LED[2]"
//
// 18; //IO_LOC "JOYSTICK_CS"
// 18; //IO_LOC "LED[3]"
//
// 19; //IO_LOC "JOYSTICK_MISO"
// 19; //IO_LOC "LED[4]"
//
// 20; //IO_LOC "JOYSTICK_MOSI"
// 20; //IO_LOC "LED[5]"
//
// 30; //IO_LOC "LCD_B[1]"
// 30; //IO_LOC "UART_TXD"
//
// 31; //IO_LOC "LCD_B[0]"
// 31; //IO_LOC "UART_RXD"
//
// 33,34; //IO_LOC "O_TMDS_CLK_P"
// 33; //IO_LOC "LCD_G[4]"
//
// 35,36; //IO_LOC "O_TMDS_DATA_P[0]"
// 35; //IO_LOC "LCD_G[2]"
//
// 37,38; //IO_LOC "O_TMDS_DATA_P[1]"
// 37; //IO_LOC "LCD_G[0]"
//
// 39,40; IO_LOC "O_TMDS_DATA_P[2]"
5 changes: 5 additions & 0 deletions boards/tang_nano_20k_lcd_480_272_tm1638/board_specific.sdc
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// The timing constraints
//

create_clock -name CLK -period 37.037 -waveform {0 18.518} [get_ports {CLK}]
//create_clock -name LCD_CLK -period 111.11 -waveform {0 55.555} [get_ports {LCD_CLK}]
10 changes: 10 additions & 0 deletions boards/tang_nano_20k_lcd_480_272_tm1638/board_specific.tcl
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# The synthesis options

set_device GW2AR-LV18QN88C8/I7 -name GW2AR-18 -device_version C
set_option -synthesis_tool gowinsynthesis
set_option -output_base_name fpga_project
set_option -top_module board_specific_top
set_option -verilog_std sysv2017

set_option -use_mspi_as_gpio 1
set_option -use_sspi_as_gpio 1
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