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Add digitizer directory as is from LBNL gitlab repository
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csp committed Jul 16, 2020
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82 changes: 82 additions & 0 deletions digitizer/Makefile
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LINKS=digitizer_05_se2diff.sch digitizer_06_diff2se.sch digitizer_07_thermo_bridge.sch digitizer_08_LDO-B.sch digitizer_09_LT6655-ref.sch digitizer_10_TPS62210-ps.sch digitizer_11_LT1763-ps.sch
SOURCE := $(sort $(wildcard ./digitizer_*.sch))
SOURCE += $(LINKS)
SOURCE_PDF = $(SOURCE:%.sch=%_sch.pdf)
GEDA_LIBRARY=../../submodules/geda_library
OPENSCAD = openscad

TOP_SCH = digitizer_01_adda.sch digitizer_02_fmc.sch digitizer_03_housekeeping.sch digitizer_04_power.sch

TARGET = $(SOURCE_PDF) digitizer_schematics.pdf

all: $(TARGET)
CLEAN += digitizer_schematics.pdf *.ps partslist3.txt bom.txt bom2.txt digitizer.net digitizer.net1 digitizer.drc orderable.txt digitizer_schematics.pdf parts1.csv merged_xy.csv pads.csv cover2_layers.dat *.stl gnet-pads2.scm
include ./rules.mk


links:$(LINKS)

digitizer_05_se2diff.sch: $(GEDA_LIBRARY)/pcblib/schem/se2diff.sch
ln -s $< $@
digitizer_06_diff2se.sch:$(GEDA_LIBRARY)/pcblib/schem/diff2se.sch
ln -s $< $@
digitizer_07_thermo_bridge.sch:$(GEDA_LIBRARY)/pcblib/schem/thermo_bridge.sch
ln -s $< $@
digitizer_08_LDO-B.sch:$(GEDA_LIBRARY)/pcblib/schem/LDO-B.sch
ln -s $< $@
digitizer_09_LT6655-ref.sch:$(GEDA_LIBRARY)/pcblib/schem/LT6655-ref.sch
ln -s $< $@
digitizer_10_TPS62210-ps.sch: $(GEDA_LIBRARY)/pcblib/schem/TPS62110-ps.sch
ln -s $< $@
digitizer_11_LT1763-ps.sch: $(GEDA_LIBRARY)/pcblib/schem/LT1763-ps.sch
ln -s $< $@


digitizer_schematics.pdf: $(SOURCE_PDF)
pdfunite $^ $@

digitizer.drc: $(TOP_SCH)
gnetlist -g drc2 -o $@ $^

digitizer_02_fmc.sch: digital_pin.py digitizer_digital_pin.txt
python $^ > $@.$$ && mv $@.$$ $@

gnet-pads2.scm: make-pads2
sh $<

digitizer.net1: $(TOP_SCH) gnet-pads2.scm
gnetlist -L . -g pads2 $(filter-out gnet-pads2.scm, $^) -o $@

# See netlist_adjust.sed for explanation of how the raw gnetlist output needs to be fixed up
digitizer.net: digitizer.net1
sed -f netlist_adjust.sed < $< > $@

partslist3.txt: $(TOP_SCH)
gnetlist -g partslist3 -Oattribs=refdes,device,value,footprint,dielectric,voltage -o $@ $^
bom.txt: $(TOP_SCH)
gnetlist -g bom -Oattribs=refdes,device,value,footprint,dielectric,voltage -o $@ $^
bom2.txt: $(TOP_SCH)
gnetlist -g bom2 -Oattribs=refdes,device,value,footprint,dielectric,voltage -o $@ $^

orderable.txt: orderable.py partslist3.txt
python $^ > $@

# Experimental
parts1.csv: digitizer.net parts.data
python bom_from_net.py > $@

pads.csv: PC-379-396-15-C02_DIGITIZER\ BOARD_XY.xlsx
libreoffice --headless --convert-to csv --outdir . "$<"
mv PC-379-396-15-C02_DIGITIZER\ BOARD_XY.csv $@

merged_xy.csv: pads.csv parts.data
python merge.py > $@

cover2_layers.dat: covergen.py
python $< openscad > $@

cover2c.stl: cover2c.scad cover2_layers.dat
$(OPENSCAD) -o $@ $<

myclean: clean
rm -f $(LINKS) *.pdf
60 changes: 60 additions & 0 deletions digitizer/README.md
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# LCLS-II LLRF Digitizer Board

This directory holds the schematics and associated files (but not the layout)
for the LCLS-II LLRF Digitizer Board, currently Rev. 1.1.
It is in gschem format; to work with it you
need [gschem](http://wiki.geda-project.org/geda:gaf) installed.
Tested on [Debian](https://www.debian.org) Jessie or Stretch, where
you simply `apt-get install geda-gschem`.

![Image of completed board](../../doc/digitizer_top_x.jpg) [block diagram](../../doc/digitizer_block.png)

The digitizer board features:

* 8 x transformer-coupled inputs sampled at 95 MS/s (2 x AD9653)
* 2 x transformer-coupled outputs sampled at 190 MS/s (AD9781)
* Input clock source up to 3 GHz (LMK01801, no on-board oscillator)
* Extra clock divider output
* 2 x Pmod digital I/O
* Interface to FPGA via dual-LPC-FMC connectors
* 181.8 x 110 mm, with notch to accommodate Xilinx FMC eval boards
* 4W power dissipation

## Schematics

To get PDF versions for reference,
simply `make` in this directory. The result is digitizer_schematics.pdf.

## Artwork/Gerbers

Created by Kathy Pham at SLAC using PADS. Latest is 20170519.
The PADS design imports the netlist exported from this gschem design.
These PADS files are _not_ kept in this git repository, but
their SHA256 signatures are kept in the
[layout_20170519.sha256sum](layout_20170519.sha256sum) file in this directory.

QR-code serial-number overlay Gerbers are generated with `qr_gen.py`.

## BOM

Get a copy of the `PC-379-396-15-C02_DIGITIZER BOARD_XY.xlsx` file exported from
the PADS design reference above, and place it in this directory.

Then `make merged_xy.csv` to merge the actual orderable part numbers (kept here
in the parts.data file) and get a usable xy assembly file for fabrication.

## Plastic Cover

One corner of the digitizer (by J3, clock input) has some fragile transformers
very close to where SMA wrenches are used.
It has proved helpful to have a protective cover in place to avoid damage.
This is designed in [OpenSCAD](http://www.openscad.org/) with a process that
matches up its features with the Gerber file; see covergen.py.
The OpenSCAD source file is cover1.scad.
OpenSCAD will export an STL file which is easily 3-D printed.

## References

G. Huang, L. R. Doolittle, J. Yang, Y. Xu,
*``Low Noise Digitizer Design for LCLS-II LLRF,''* in NAPAC2016
[TUPOA40](http://accelconf.web.cern.ch/AccelConf/napac2016/papers/tupoa40.pdf).
73 changes: 73 additions & 0 deletions digitizer/bom_from_net.py
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# coding: utf
import re, sys
exact = {}
apprx = {}
pfile = open('parts.data','r').read()
bom_id_set = {}
for line in pfile.split('\n'):
a = line.split(':')
if (len(a) is 2):
d0 = re.sub('[Ω+]','',a[0])
d = re.sub(' *',' ',d0)
#print d
exact[d]=a[1].strip()
# PADS name
b = re.sub(' *',' ',d0).split(' ')
if len(b)>2: d = b[0]+'_'+b[1]+' '+b[2]
else: d = b[0]+' '+b[1]
d=d.upper()
#print d
#print d+':', a[1].strip()
apprx[d]=a[1].strip()

def handle_pads(line):
a = line.upper().split()
if len(a) != 2: return
b = a[1].split('@')
if len(b) != 2: return
#print b[0],b[1]
if re.search('DNP',b[0]): return
if b[0] == 'TP025': return
if b[1] == 'ZXCT1009': b[1] = 'SOT23-3' # total hack
d = b[0]+' '+b[1]
order = apprx[d]
#print a[0], order
o = re.sub(' *',' ',order).split(' ')
digikey = o[1]
if '@' in digikey:
(distrib_part,distrib) = digikey.split('@')
if distrib_part == '': distrib_part = o[0]
else:
distrib = 'Digi-Key'
distrib_part = digikey
orderable = ','.join([o[2], o[0], distrib, distrib_part])
#print a[0],orderable
bom_id = b[0]
if ("CAPACITOR" in bom_id or "RESISTOR" in bom_id) and b[1] != "0603":
#bom_id = bom_id + '_' + b[1]
pass
if orderable not in plist:
plist[orderable] = []
if bom_id in bom_id_set:
sys.stderr.write("Warning: duplicate bom_id %s\n"%bom_id)
bom_id_set[bom_id] = 1
plist[orderable].append(a[0])
psub[orderable] = bom_id

lfile = open('digitizer.net','r').read()
live = 0
plist={}
psub={}
for line in lfile.split('\n'):
if len(line)>0: line = line[:-1]
#line.replace(r'\r','')
if line == "*PART*":
live = 1
continue
if line == "":
live = 0
if live:
handle_pads(line)

for p in sorted(plist, key=lambda key: psub[key]):
print ','.join([psub[p], p, str(len(plist[p])), ' '.join(sorted(plist[p]))])
51 changes: 51 additions & 0 deletions digitizer/cmos.txt
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CMOS (mostly SPI) subsystem
All driven via level converters from P2, where P2_VADJ is used
on 74LVC8T245 or 74AVC4T245 CMOS level converter chips.
Note that 74AVC4T245 chips' control pins are referenced to VCC(A).

All signalling directions listed from the perspective of the peripheral
chip on this board, not the FPGA.

BMB7 compatibility note:
"TOP" FMC is LPC, connected to HR Kintex banks 13 and 14
"BOTTOM" FMC is HPC, LPC subset connected to HP Kintex banks 32 and 34
Top and bottom as drawn with optical links to the left, FMC to the right,
opposite from SLAC's drawings of fmc_carrier_c00 that have FMC to the left.
BMB7-BOTTOM P1 HPC HP (1.8V only)
BMB7-TOP P2 LPC HR (3.3V tolerant)

U1 LMK01801 3.3V (but will work at 1.8V)
CLK input
DATA input
LE input

U2,U3 AD9653 1.8V (not 3.3V tolerant)
SCLK input, shared
SYNC input, shared
PDWN input, shared
CSB input, dedicated
SDIO I/O, shared?

U4 AD9781 3.3V (won't work at 1.8V)
CSB input
SCLK input
SDO output
SDIO input
RESET input

U15 AMC7823 3.3V (won't work at 1.8V)
SS input
SCLK input
MOSI input
MISO output

U18 AD7794 3.3V (won't work at 1.8V)
CS input
SCLK input
DIN input
CLK input (optional?)
DOUT output

U33,U34 TPS62110 12V (will work down to 1.8V)
ENABLE input, shared
SYNC input, shared
11 changes: 11 additions & 0 deletions digitizer/cost.txt
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As of 2015-08-21

Digi-Key BOM/shopping cart creation (based on orderable.txt) is
half-broken, but I can tell that qty. 25 parts cost is $743.42.

2 ASP-134604-01 @newark 16.37
10 TCM4-19+ @minicircuits 2.09
2 TCM2-43X+ @minicircuits 3.29
1 TCP-2-33W+ @minicircuits 2.99

total non-Digi-Key: $63.21
45 changes: 45 additions & 0 deletions digitizer/cover1.scad
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/* Digitizer cover to protect its transformers near J3 and J20 */
/* Obsolete, see cover2c.scad */
/* See also covergen.py */

/* 5 mm from board to attached SMA connector, which still fits in */
/* the 7.9 mm cutout for the board-mount SMA connector. */
/* 7 mm from board to the beginning of the hex section. */
/* Part is 5.5 mm thick, to avoid slight interference with SMA connectors found with a 6mm thick version. */

module cover()
{
union() {
difference() {
union () {
translate([0, -39.5, 2]) cube([40.5, 39.5, 3.5]);
/* copper pad on board measures 5.8 mm dia */
translate([37.55,-36.5, 0]) cylinder(r=2.9, h=4, $fn=30);
}
union () {
/* 106.3 mil = 2.7 mm dia hole, tight clearance for 4-40 */
translate([37.55, -36.5, -1]) cylinder(r=1.5, h=8, $fn=30);
translate([ -1, -11.50, 0]) cube([10.6, 7.7, 8]); /* J3 */
translate([ -1, -26.75, 0]) cube([10.6, 7.7, 8]); /* J20 */
translate([ -1, -42.00, 0]) cube([10.6, 7.7, 8]); /* J11 */
/* TCM4-19 datasheet claims max height 4.06 mm, I measure 3.1 mm */
translate([11.3, -15.2, 0]) cube([4.2, 4, 4.0]); /* U34 */
translate([17.3, -15.2, 0]) cube([4.2, 4, 4.0]); /* T1 */
translate([11.3, -26.0, 0]) cube([4.2, 4, 4.0]); /* T1 */
translate([39, -24, 1]) mirror(v=[1, 0, 0]) linear_extrude(height = 1.5) {
text("LBNL", size = 6.2, font = "Liberation Sans");
}
translate([28, -34, 1]) mirror(v=[1, 0, 0]) linear_extrude(height = 1.5) {
text("R3", size = 6.2, font = "Liberation Sans");
}
}
}
/* these are the stubs supposed to rest on the bare board */
translate([0, -3.6, 0]) cube([ 9.5, 3.6, 2]);
translate([0, -18.2, 0]) cube([ 9.5, 3.6, 2]);
translate([0, -33.1, 0]) cube([16.0, 5.2, 2]);
translate([25.3, -6.1, 0]) cube([ 9.5, 6.1, 2]);
}
}

cover();
52 changes: 52 additions & 0 deletions digitizer/cover2c.scad
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/* Digitizer cover to protect its transformers near J3 and J20 */
/* See below for connection to covergen.py */

/* 5 mm from board to attached SMA connector, which still fits in */
/* the 7.9 mm cutout for the board-mount SMA connector. */
/* 7 mm from board to the beginning of the hex section. */
/* Part is 5.5 mm thick, to avoid slight interference with SMA connectors found with a 6mm thick version. */

module base_cube(x1, y1, dx, dy, h)
{
translate([x1, y1, 0]) cube([ dx, dy, h]);
}

/* Generated by covergen2.py */
include <cover2_layers.dat>

module cover()
{
union() {
difference() {
union () {
translate([0, -181.5, 2]) cube([40.5, 181.5, 3.5]);
/* copper pad on board measures 5.8 mm dia */
translate([37.55, -36.50, 0]) cylinder(r=2.9, h=4, $fn=30);
translate([38.69, -77.90, 0]) cylinder(r=2.9, h=4, $fn=30);
translate([32.47,-146.99, 0]) cylinder(r=2.9, h=4, $fn=30);
}
union () {
/* 106.3 mil = 2.7 mm dia hole, tight clearance for 4-40 */
translate([37.55, -36.50, -1]) cylinder(r=1.5, h=8, $fn=30);
translate([38.69, -77.90, -1]) cylinder(r=1.5, h=8, $fn=30);
translate([32.47,-146.99, -1]) cylinder(r=1.5, h=8, $fn=30);
layer3();
layer2();
translate([39, -24, 1]) mirror(v=[1, 0, 0]) linear_extrude(height = 1.5) {
text("LBNL", size = 6.2, font = "Liberation Sans");
}
translate([28, -34, 1]) mirror(v=[1, 0, 0]) linear_extrude(height = 1.5) {
text("R4", size = 6.2, font = "Liberation Sans");
}
}
}
layer1();
}
}

cover();

/* set up the initial view */
$vpr = [156, 0, 100];
$vpt = [56, -86, -71];
$vpd = 140;
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