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\textbf{{Sandia National Laboratories $\>$$\>$$\>$ Principal Member of Technical Staff II $\>$$\>$$\>$Jul 2024 - present}} | ||
\vspace{-0.2in} | ||
\textbf{{Sandia National Laboratories $\>$$\>$$\>$ Principal Member of Technical Staff II $\>$$\>$$\>$ July 2024 - present}} \textbf{ Sandia National Laboratories $\>$$\>$$\>$ Senior Member of Technical Staff $\>$$\>$$\>$ August 2022 - July 2024} | ||
\vspace{-0.2in} | ||
\begin{itemize} | ||
\item Maintainer of HPC Tools and Runtime Interoperability at Sandia Labs, including liason for LLNL Performance Tools and maintainer for Kokkos Tools. | ||
\item Owner of HPC Tools and Runtime Systems at Sandia Labs, including being a liaison for LLNL Performance Tools and maintainer for Kokkos Tools. | ||
\item Sandia Rep and contributor to OpenMP specification and MPI forum as Sandia Representative. | ||
\end{itemize} | ||
\dates{August 2022 - July 2024} | ||
\location{Livermore, California, USA} | ||
\title{Senior Member of Technical Staff} | ||
\employer{Sandia National Laboratories} | ||
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\textbf{{Sandia National Laboratories $\>$$\>$$\>$ Senior Member of Technical Staff $\>$$\>$$\>$Aug 2022 - Jul 2024}} | ||
\begin{itemize} | ||
\item Same as above. | ||
%\item Developing and testing features in the US DoE's LLVM's OpenMP implementation. | ||
%\item Contributing to OpenMP 6.0 Specification, specifically on topics of affinity, loop transformations, accelerators and tasking. | ||
%\item Prototyping tunable locality-aware loop scheduling strategy features for OpenMP, and generally user-defined loop schedules, for LLVM's OpenMP implementation. | ||
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%\item Owner of Kokkos Software Ecosystem's Kokkos Tools, which provides profiling and debugging capabilities for Kokkos programs (for performance portable parallel programs) as well as sophisticated auto-tuning and performance analysis capabilities. | ||
%\item Contributor to the DOE ASCR Xstack project on automated test generation for parallel programs via LLVM. Developing a source-to-source translator via the ROSE compiler plugin for the LLVM's clangASTRewriter to translate a Kokkos program to a Kokkos Model (simplified version of Kokkos) program for analysis by LLVM's Klee symbolic execution library. | ||
\end{itemize} | ||
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\dates{May 2019 - August 2022} | ||
\location{Upton, New York, USA} | ||
\title{Computational Scientist} | ||
\employer{Brookhaven National Laboratory} | ||
\textbf{{Brookhaven National Laboratory $\>$$\>$$\>$$\>$Computational Scientist$\>$$\>$$\>$$\>$May 2019 - Aug 2022}} | ||
\textbf{{Brookhaven National Laboratory $\>$$\>$$\>$$\>$Computational Scientist$\>$$\>$$\>$$\>$ May 2019 - August 2022}} | ||
\vspace{-0.2in} | ||
\begin{itemize} | ||
% \item Contributed to developing an LLVM OpenMP implementation, specifically the OpenMP implementation's compiler and its runtime, targetted for Department of Energy's upcoming Exascale Supercomputer platforms. | ||
\item Designed and implemented LLVM's OpenMP user-defined and task-to-multiGPU scheduling strategies to improve within-node load balancing of applications running on supercomputers having multiple GPUs per node. | ||
\item Developed benchmarks and evaluating OpenMP implementations on Exascale Supercomputers. | ||
\item Designed and implemented OpenMP user-defined multiGPU scheduling for LLVM to improve within-node load balancing of AI and scientific applications. | ||
\item Developed benchmarks and evaluated OpenMP implementations on Exascale supercomputers. | ||
\item Represented Brookhaven National Laboratory in the OpenMP Architecture Review Board. | ||
\end{itemize} | ||
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\dates{June 2018 - April 2019} | ||
\location{Champaign, Illinois, USA} | ||
\title{Software Developer} | ||
\employer{Charmworks, Inc.} | ||
\textbf{Charmworks, Inc. $\>$$\>$$\>$$\>$Software Developer$\>$$\>$$\>$$\>$Jun 2018 - Apr 2019} | ||
%\begin{position} | ||
\vspace{0.0in} | ||
\textbf{Charmworks, Inc. $\>$$\>$$\>$$\>$Software Developer$\>$$\>$$\>$$\>$ June 2018 - April 2019} | ||
\vspace{-0.2in} | ||
\begin{itemize} | ||
%\item Collaborated with Lawrence Livermore National Lab on a proposal for a synergistic loop scheduling and load balancing strategy. | ||
%\item Worked on making User-defined Loop Scheduling portable across different parallel programming library, done with Oak Ridge National Lab through DoE Exascale Computing Program. | ||
%\item Added examples of loop scheduling in OpenMP in the Examples section of OpenMP Specification. | ||
%\item Worked on a NSF startup SBIR proposal for loop scheduling for desktop computers. | ||
%\item Collaborated on developing a proposal to add an OpenMP User-defined Schedule to the OpenMP specification based on an OpenMPCon 2017 paper, presenting a proposal at the OpenMP F2F in Santa Clara and the upcoming F2F in Toronto. | ||
\item Did research and development for User-defined Loop Schedules in OpenMP. | ||
%\item Assisted with slides for pitch and marketing of Charm++ software, and providing feedback for tutorials on Charm++. | ||
\item Integrated a shared memory library for sophisticated loop scheduling strategies, including some based on my dissertation, into the current version of Charm++. | ||
%item Comparing performance of a loop scheduling strategy available in the integrated shared memory library with the performance of the corresponding loop scheduling strategy available in LLVM’s OpenMP library. | ||
\item Conducted research and development for User-defined Loop Schedules (UDS) in OpenMP. | ||
\item Integrated OpenMP UDS loop scheduling strategies into Charm++'s CkLoop. | ||
\end{itemize} |
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{{\bf Languages}: C, C++, python, Fortran, bash, csh, VHDL, Matlab, Java}\\ | ||
{{\bf Tools}: LaTeX, gnuplot, emacs, autoconf, cmake, svn, git, Globus Toolkit}\\ | ||
{{\bf Libraries for Parallelism}: POSIX threads (Pthreads), MPI (mpich3), OpenMP (gomp, llvm), OpenACC (pgi)}; \\ | ||
{{\bf Performance Profiling Tools}: OpenSpeedShop, hpcToolkit, PMPI, Intel VTune}; \\ | ||
{{\bf Platforms}: {Intel Xeon, IBM Power7, AMD Opteron, NVIDIA Keplar, Intel Xeon Phi}} | ||
\comments{ | ||
\begin{itemize} | ||
\item[] \small Intel Xeon, IBM Power7, AMD Opteron, NVIDIA Keplar, Intel Xeon Phi | ||
\end{itemize} | ||
} | ||
{{\bf Languages}: C, C++, python, Fortran, bash, csh, VHDL, Matlab, Java};\\ | ||
{{\bf Libraries}: OpenMP (gomp, llvm), CUDA, Kokkos, HIP, POSIX threads (Pthreads), MPI (mpich), OpenACC (pgi), Globus Toolkit}; \\ | ||
{{\bf Tools}: hpcToolkit, PMPI, ompt, nvtx, NVIDIA Nsight, Intel VTune, clang-tidy, KLEE, gprof, gdb, docker}; \\ | ||
{{\bf Utilities}: git, cmake, spack, vi, clang-format, gnuplot, emacs, autoconf, LaTeX};\\ | ||
{{\bf Platforms}: {NVIDIA A100, AMD MI300, Intel Xeon Phi, IBM Power, Cerebras WSE}} | ||
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\comments{ | ||
{\bf Computer Experience} | ||
\begin{itemize} | ||
\item[] Courses: Basic, Pascal. Types and Programs: IBM | ||
Mainframe/3081D (MTS: Textform, SPSSX; IBM MINI/360 | ||
(GML/SCRIPT, CAD/CAM); IBM PC (Multimate, Wordperfect); | ||
Apple II-Plus (Macwrite, Pagemaker). | ||
\end{itemize} | ||
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} |
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%\email{[email protected]} | ||
%\web{http://vivek112.googlepages.com} | ||
%\citizenship{U.S. Citizen} | ||
\begin{resume} | ||
\vspace{-0.1in} | ||
\begin{resume} | ||
\vspace{-0.4in} | ||
\moveleft\hoffset\vbox{\hrule width\resumewidth height 1pt}\smallskip | ||
\begin{center} | ||
\textit{\bf Phone}: +01 217-369-7996. \textit{\bf E-mail}: \url{[email protected]}. \textit{\bf Web}: \url{http://vlkale.github.io}. \\ U.S. Citizen | ||
\begin{center} \textit{\bf E-mail}: \url{[email protected]}. \textit{\bf Web}: \url{http://vlkale.github.io}. | ||
\textbf{US Citizen} | ||
\end{center} | ||
%\moveleft.5\sectionwidth\centerline{U.S. Citizen} | ||
\begin{center} | ||
%\moveleft.5\sectionwidth\centerline{{\it \small Objective}: \small Obtain position as software engineer specializing in performance engineering.} | ||
\end{center} | ||
\vspace{-0.5in} | ||
\vspace{-0.65in} | ||
\small | ||
\section{Education} | ||
\vspace{0.2in} | ||
\small B.S., Computer Science, 2007, University of Illinois at Urbana-Champaign\\ | ||
\small Ph.D., Computer Science, 2015, University of Illinois at Urbana-Champaign | ||
\section{Experience} | ||
\vspace{0.2in} | ||
\input{listOfExperiences-for1pagerResume} | ||
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\section{Education} | ||
\vspace{0.02in} | ||
\small B.S., Computer Science, 2007, University of Illinois at Urbana-Champaign\\ | ||
\small Ph.D., Computer Science, 2015, University of Illinois at Urbana-Champaign | ||
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\section{Publications} | ||
\vspace{0.1in} | ||
\input{listOfPubsHighlights} | ||
\vspace{-0.1in} | ||
\input{listOfPubs-1pager} | ||
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\section{Projects} | ||
\vspace{0.1in} | ||
\vspace{-0.1in} | ||
\input{listOfProjects-for1pagerResume} | ||
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\section{Technical Skills} | ||
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