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Merge tag 'tty-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/…
…git/gregkh/tty Pull tty / serial driver updates from Greg KH: "Here is the big set of TTY/Serial driver updates and cleanups for 6.9-rc1. Included in here are: - more tty cleanups from Jiri - loads of 8250 driver cleanups from Andy - max310x driver updates - samsung serial driver updates - uart_prepare_sysrq_char() updates for many drivers - platform driver remove callback void cleanups - stm32 driver updates - other small tty/serial driver updates All of these have been in linux-next for a long time with no reported issues" * tag 'tty-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (199 commits) dt-bindings: serial: stm32: add power-domains property serial: 8250_dw: Replace ACPI device check by a quirk serial: Lock console when calling into driver before registration serial: 8250_uniphier: Switch to use uart_read_port_properties() serial: 8250_tegra: Switch to use uart_read_port_properties() serial: 8250_pxa: Switch to use uart_read_port_properties() serial: 8250_omap: Switch to use uart_read_port_properties() serial: 8250_of: Switch to use uart_read_port_properties() serial: 8250_lpc18xx: Switch to use uart_read_port_properties() serial: 8250_ingenic: Switch to use uart_read_port_properties() serial: 8250_dw: Switch to use uart_read_port_properties() serial: 8250_bcm7271: Switch to use uart_read_port_properties() serial: 8250_bcm2835aux: Switch to use uart_read_port_properties() serial: 8250_aspeed_vuart: Switch to use uart_read_port_properties() serial: port: Introduce a common helper to read properties serial: core: Add UPIO_UNKNOWN constant for unknown port type serial: core: Move struct uart_port::quirks closer to possible values serial: sh-sci: Call sci_serial_{in,out}() directly serial: core: only stop transmit when HW fifo is empty serial: pch: Use uart_prepare_sysrq_char(). ...
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@@ -55,6 +55,7 @@ required: | |
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allOf: | ||
- $ref: serial.yaml# | ||
- $ref: rs485.yaml# | ||
- if: | ||
properties: | ||
compatible: | ||
|
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/serial/st,asc.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: STMicroelectronics STi SoCs Serial Port | ||
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maintainers: | ||
- Patrice Chotard <[email protected]> | ||
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allOf: | ||
- $ref: serial.yaml# | ||
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properties: | ||
compatible: | ||
const: st,asc | ||
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reg: | ||
maxItems: 1 | ||
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interrupts: | ||
maxItems: 1 | ||
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clocks: | ||
maxItems: 1 | ||
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st,hw-flow-ctrl: | ||
description: When set, enable hardware flow control. | ||
type: boolean | ||
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st,force-m1: | ||
description: When set, force asc to be in Mode-1. This is recommended for | ||
high bit rates above 19.2K. | ||
type: boolean | ||
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required: | ||
- compatible | ||
- reg | ||
- interrupts | ||
- clocks | ||
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unevaluatedProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/clock/stih407-clks.h> | ||
#include <dt-bindings/interrupt-controller/arm-gic.h> | ||
serial@9830000 { | ||
compatible = "st,asc"; | ||
reg = <0x9830000 0x2c>; | ||
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; | ||
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; | ||
}; | ||
... |
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/w1/w1-uart.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: UART 1-Wire Bus | ||
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maintainers: | ||
- Christoph Winklhofer <[email protected]> | ||
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description: | | ||
UART 1-wire bus. Utilizes the UART interface via the Serial Device Bus | ||
to create the 1-Wire timing patterns. | ||
The UART peripheral must support full-duplex and operate in open-drain | ||
mode. The timing patterns are generated by a specific combination of | ||
baud-rate and transmitted byte, which corresponds to a 1-Wire read bit, | ||
write bit or reset pulse. | ||
The default baud-rate for reset and presence detection is 9600 and for | ||
a 1-Wire read or write operation 115200. In case the actual baud-rate | ||
is different from the requested one, the transmitted byte is adapted | ||
to generate the 1-Wire timing patterns. | ||
https://www.analog.com/en/technical-articles/using-a-uart-to-implement-a-1wire-bus-master.html | ||
properties: | ||
compatible: | ||
const: w1-uart | ||
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reset-bps: | ||
default: 9600 | ||
description: | ||
The baud rate for the 1-Wire reset and presence detect. | ||
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write-0-bps: | ||
default: 115200 | ||
description: | ||
The baud rate for the 1-Wire write-0 cycle. | ||
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write-1-bps: | ||
default: 115200 | ||
description: | ||
The baud rate for the 1-Wire write-1 and read cycle. | ||
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required: | ||
- compatible | ||
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additionalProperties: | ||
type: object | ||
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examples: | ||
- | | ||
serial { | ||
onewire { | ||
compatible = "w1-uart"; | ||
}; | ||
}; |
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.. SPDX-License-Identifier: GPL-2.0 | ||
======= | ||
Console | ||
======= | ||
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.. contents:: :local: | ||
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Struct Console | ||
============== | ||
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.. kernel-doc:: include/linux/console.h | ||
:identifiers: console cons_flags | ||
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Internals | ||
--------- | ||
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.. kernel-doc:: include/linux/console.h | ||
:identifiers: nbcon_state nbcon_prio nbcon_context nbcon_write_context | ||
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Struct Consw | ||
============ | ||
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.. kernel-doc:: include/linux/console.h | ||
:identifiers: consw | ||
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Console functions | ||
================= | ||
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.. kernel-doc:: include/linux/console.h | ||
:identifiers: console_srcu_read_flags console_srcu_write_flags | ||
console_is_registered for_each_console_srcu for_each_console | ||
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.. kernel-doc:: drivers/tty/vt/selection.c | ||
:export: | ||
.. kernel-doc:: drivers/tty/vt/vt.c | ||
:export: | ||
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Internals | ||
--------- | ||
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.. kernel-doc:: drivers/tty/vt/selection.c | ||
:internal: | ||
.. kernel-doc:: drivers/tty/vt/vt.c | ||
:internal: |
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@@ -12,3 +12,4 @@ | |
mxc-w1 | ||
omap-hdq | ||
w1-gpio | ||
w1-uart |
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.. SPDX-License-Identifier: GPL-2.0-or-later | ||
===================== | ||
Kernel driver w1-uart | ||
===================== | ||
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Author: Christoph Winklhofer <[email protected]> | ||
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Description | ||
----------- | ||
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UART 1-Wire bus driver. The driver utilizes the UART interface via the | ||
Serial Device Bus to create the 1-Wire timing patterns as described in | ||
the document `"Using a UART to Implement a 1-Wire Bus Master"`_. | ||
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.. _"Using a UART to Implement a 1-Wire Bus Master": https://www.analog.com/en/technical-articles/using-a-uart-to-implement-a-1wire-bus-master.html | ||
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In short, the UART peripheral must support full-duplex and operate in | ||
open-drain mode. The timing patterns are generated by a specific | ||
combination of baud-rate and transmitted byte, which corresponds to a | ||
1-Wire read bit, write bit or reset pulse. | ||
|
||
For instance the timing pattern for a 1-Wire reset and presence detect uses | ||
the baud-rate 9600, i.e. 104.2 us per bit. The transmitted byte 0xf0 over | ||
UART (least significant bit first, start-bit low) sets the reset low time | ||
for 1-Wire to 521 us. A present 1-Wire device changes the received byte by | ||
pulling the line low, which is used by the driver to evaluate the result of | ||
the 1-Wire operation. | ||
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Similar for a 1-Wire read bit or write bit, which uses the baud-rate | ||
115200, i.e. 8.7 us per bit. The transmitted byte 0x80 is used for a | ||
Write-0 operation (low time 69.6us) and the byte 0xff for Read-0, Read-1 | ||
and Write-1 (low time 8.7us). | ||
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||
The default baud-rate for reset and presence detection is 9600 and for | ||
a 1-Wire read or write operation 115200. In case the actual baud-rate | ||
is different from the requested one, the transmitted byte is adapted | ||
to generate the 1-Wire timing patterns. | ||
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Usage | ||
----- | ||
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Specify the UART 1-wire bus in the device tree by adding the single child | ||
onewire to the serial node (e.g. uart0). For example: | ||
:: | ||
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@uart0 { | ||
... | ||
onewire { | ||
compatible = "w1-uart"; | ||
}; | ||
}; |
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