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correct assert_instr
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SparrowLii committed Sep 10, 2021
1 parent 4bb6c6c commit 285da9e
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Showing 2 changed files with 8 additions and 6 deletions.
10 changes: 5 additions & 5 deletions crates/core_arch/src/arm_shared/neon/generated.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6616,7 +6616,7 @@ pub unsafe fn vld1_p64_x2(a: *const p64) -> poly64x1x2_t {
#[inline]
#[target_feature(enable = "neon,aes")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "aes,v8"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(ldr))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ld1))]
pub unsafe fn vld1_p64_x3(a: *const p64) -> poly64x1x3_t {
transmute(vld1_s64_x3(transmute(a)))
Expand All @@ -6626,7 +6626,7 @@ pub unsafe fn vld1_p64_x3(a: *const p64) -> poly64x1x3_t {
#[inline]
#[target_feature(enable = "neon,aes")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "aes,v8"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(ldr))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ld1))]
pub unsafe fn vld1_p64_x4(a: *const p64) -> poly64x1x4_t {
transmute(vld1_s64_x4(transmute(a)))
Expand All @@ -6636,7 +6636,7 @@ pub unsafe fn vld1_p64_x4(a: *const p64) -> poly64x1x4_t {
#[inline]
#[target_feature(enable = "neon,aes")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "aes,v8"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(ldr))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ld1))]
pub unsafe fn vld1q_p64_x2(a: *const p64) -> poly64x2x2_t {
transmute(vld1q_s64_x2(transmute(a)))
Expand All @@ -6646,7 +6646,7 @@ pub unsafe fn vld1q_p64_x2(a: *const p64) -> poly64x2x2_t {
#[inline]
#[target_feature(enable = "neon,aes")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "aes,v8"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(ldr))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ld1))]
pub unsafe fn vld1q_p64_x3(a: *const p64) -> poly64x2x3_t {
transmute(vld1q_s64_x3(transmute(a)))
Expand All @@ -6656,7 +6656,7 @@ pub unsafe fn vld1q_p64_x3(a: *const p64) -> poly64x2x3_t {
#[inline]
#[target_feature(enable = "neon,aes")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "aes,v8"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(ldr))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ld1))]
pub unsafe fn vld1q_p64_x4(a: *const p64) -> poly64x2x4_t {
transmute(vld1q_s64_x4(transmute(a)))
Expand Down
4 changes: 3 additions & 1 deletion crates/stdarch-gen/neon.spec
Original file line number Diff line number Diff line change
Expand Up @@ -2081,7 +2081,9 @@ generate *const p8:poly8x16x2_t, *const p8:poly8x16x3_t, *const p8:poly8x16x4_t
generate *const p16:poly16x4x2_t, *const p16:poly16x4x3_t, *const p16:poly16x4x4_t
generate *const p16:poly16x8x2_t, *const p16:poly16x8x3_t, *const p16:poly16x8x4_t
target = aes
generate *const p64:poly64x1x2_t, *const p64:poly64x1x3_t, *const p64:poly64x1x4_t
generate *const p64:poly64x1x2_t
arm = ldr
generate *const p64:poly64x1x3_t, *const p64:poly64x1x4_t
generate *const p64:poly64x2x2_t, *const p64:poly64x2x3_t, *const p64:poly64x2x4_t

/// Load multiple single-element structures to one, two, three, or four registers
Expand Down

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