Merge pull request #20 from rp-rs/set_flash_clkdiv_to_2

Set PICO_FLASH_SPI_CLKDIV=2 when building boot2
rp-rs · Jan 13, 2023 · 4c477f9 · 4c477f9
2 parents 4b7adf8 + 51a52a2
commit 4c477f9
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diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -2,6 +2,14 @@
 
 ## Unreleased Changes
 
+## v0.3.0
+
+* Set PICO_FLASH_SPI_CLKDIV=2 when building boot2
+
+This doubles the flash access speed to the value used by the C SDK by
+default. So it should usually be safe. However, if you are overclocking
+the RP2040, you might need to lower the flash speed accordingly.
+
 ## v0.2.1
 
 * Update boot2 code from SDK version 1.4.0

diff --git a/Cargo.toml b/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "rp2040-boot2"
-version = "0.2.1"
+version = "0.3.0"
 authors = ["The rp-rs Team"]
 edition = "2018"
 license = "BSD-3-Clause"

diff --git a/bin/boot2_at25sf128a.padded.bin b/bin/boot2_at25sf128a.padded.bin
diff --git a/bin/boot2_gd25q64cs.padded.bin b/bin/boot2_gd25q64cs.padded.bin
diff --git a/bin/boot2_generic_03h.padded.bin b/bin/boot2_generic_03h.padded.bin
diff --git a/bin/boot2_is25lp080.padded.bin b/bin/boot2_is25lp080.padded.bin
diff --git a/bin/boot2_w25q080.padded.bin b/bin/boot2_w25q080.padded.bin
diff --git a/bin/boot2_w25x10cl.padded.bin b/bin/boot2_w25x10cl.padded.bin
diff --git a/build.rs b/build.rs
@@ -34,6 +34,7 @@ fn make_elf<P: AsRef<Path>, Q: AsRef<Path>>(input_path: P, out_dir: Q) -> PathBu
         .arg("-fPIC")
         .arg("--specs=nosys.specs")
         .arg("-Isrc/include")
+        .arg("-DPICO_FLASH_SPI_CLKDIV=2")
         .arg(input_path)
         .arg("-o")
         .arg(&result_path)