first commit

mkXlinuBuntu.sh

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+#!/bin/bash
+wget http://cdimage.ubuntu.com/ubuntu/releases/16.04/release/ubuntu-16.04-preinstalled-server-armhf+raspi2.img.xz
+unxz ubuntu-16.04-preinstalled-server-armhf+raspi2.img.xz
+wget https://github.com/rlangoy/ZBLDBuilder/releases/download/xilinx-v2016.2/bootPartition.tar.gz
+wget https://github.com/rlangoy/ZBLDBuilder/releases/download/xilinx-v2016.2/xilinxv2016.2-lib.tar.gz
+mkdir boot
+mkdir fs
+
+sudo losetup /dev/loop2  ubuntu-16.04-preinstalled-server-armhf+raspi2.img
+sudo kpartx -av /dev/loop2
+
+sudo mount /dev/mapper/loop2p1 ./boot
+sudo mount /dev/mapper/loop2p2 ./fs
+sudo rm -rf boot/*
+sudo tar xvzf bootPartition.tar.gz   --no-same-owner  -C ./boot
+
+sudo rm -rf fs/lib/modules
+sudo tar xvzf  xilinxv2016.2-lib.tar.gz -C ./fs 
+
+sudo cp -r zed-tools fs/usr/share/zed-tools
+
+#Clean up
+sudo umount ./boot
+sudo umount ./fs
+
+sudo kpartx -d  /dev/loop2
+sudo losetup -d /dev/loop2
+sudo rm -rf boot
+sudo rm -rf fs
+mv  ubuntu-16.04-preinstalled-server-armhf+raspi2.img ubuntu-16.04-preinstalled-server-armhf+zedboard.img
+xz ubuntu-16.04-preinstalled-server-armhf+zedboard.img
+

zed-tools/all_leds_off.sh

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+#!/bin/bash
+echo "++ Exporting leds "
+for i in 0 1 2 3 4 5 6 7;
+do led=$(($i+979));
+echo $led > /sys/class/gpio/export;
+echo out > /sys/class/gpio/gpio$led/direction;
+echo 0 > /sys/class/gpio/gpio$led/value;
+echo $led > /sys/class/gpio/unexport;
+done;
+

zed-tools/all_leds_on.sh

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+#!/bin/bash
+echo "++ Exporting leds "
+for i in 0 1 2 3 4 5 6 7;
+do led=$(($i+979));
+echo $led > /sys/class/gpio/export;
+echo out > /sys/class/gpio/gpio$led/direction;
+echo 1 > /sys/class/gpio/gpio$led/value;
+echo $led > /sys/class/gpio/unexport;
+done;
+

zed-tools/programPL.sh

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+#!/bin/bash
+if [ ! -e /dev/xdevcfg ]; then
+mknod /dev/xdevcfg c 259 0
+fi
+if [ ! -e"$1" ];
+then echo "Use FPGA bitfile as argument"
+exit 1
+fi
+
+cat "$1" > /dev/xdevcfg
+
+result=$(cat /sys/devices/soc0/amba/f8007000.devcfg/prog_done)
+if [ $result -ne 1 ]; 
+then echo "ERROR configuring FPGA, logic is not configured!"
+exit 1
+fi