Port AXI4MLIR into SODA-OPT

README.md

@@ -30,7 +30,7 @@ And follow one of our tutorials [here](docs/tutorials).
 This setup assumes that you have built LLVM and MLIR in `$BUILD_DIR` and
 installed it to `$PREFIX`. 
 The current version of this project was tested with `llvm-project` commit:
-`339a7687e1c036a5f91c9d5391523b93e2e76cd3`.
+`08d094a0e457360ad8b94b017d2dc277e697ca76`.
 Make sure you have the correct commit checked-out.
 
 **Note**: Make sure to pass `-DLLVM_INSTALL_UTILS=ON` when building LLVM/MLIR 

include/soda/Conversion/AccelToRuntime/AccelToAXI4MLIR.h

@@ -0,0 +1,58 @@
+//===- AccelToAXI4MLIR.h - Convert Accel to AXI4MLIR calls ----*- C++ -*-===//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SODA_CONVERSION_ACCELTORUNTIME_ACCELTOAXI4MLIR_H_
+#define SODA_CONVERSION_ACCELTORUNTIME_ACCELTOAXI4MLIR_H_
+
+#include "mlir/IR/PatternMatch.h"
+
+namespace mlir {
+class MLIRContext;
+class Pass;
+class RewritePatternSet;
+class ModuleOp;
+template <typename T>
+class OperationPass;
+
+struct AccelToAXI4MLIROptions {
+  /// Accelerator Tile Size information
+  unsigned tileSize = 1;
+
+  /// DMA Information
+  unsigned dmaAddress = 0;
+  unsigned dmaInputAddress = 0;
+  unsigned dmaInputBufferSize = 100000;
+  unsigned dmaOutputAddress = 100000;
+  unsigned dmaOutputBufferSize = 100000;
+
+  /// Flow information
+  bool flowCpuAcc = false;
+  unsigned numberOfCaches = false;
+  ArrayRef<unsigned> cacheSizes;
+  ArrayRef<unsigned> tileSizes;
+  unsigned elementSize = false;
+};
+
+/// Populate the given list with patterns that convert from Accel to AXI4MLIR
+/// runtime calls.
+void populateAccelToAXI4MLIRConversionPatterns(RewritePatternSet &patterns);
+
+/// Populate the given list with patterns that convert from Accel to AXI4MLIR
+/// runtime calls.
+void populateAccelToAXI4MLIRConversionPatternsWithOptions(
+    RewritePatternSet &patterns,
+    const AccelToAXI4MLIROptions &options = AccelToAXI4MLIROptions());
+
+/// Create the pass to convert accel operations to axi4mlir calls
+std::unique_ptr<OperationPass<ModuleOp>> createConvertAccelToAXI4MLIRPass();
+
+std::unique_ptr<OperationPass<ModuleOp>>
+createConvertAccelToAXI4MLIRPass(const AccelToAXI4MLIROptions &options);
+
+} // namespace mlir
+
+#endif // SODA_CONVERSION_ACCELTORUNTIME_ACCELTOAXI4MLIR_H_

include/soda/Conversion/LinalgToAccel/AXI4MLIRUtils.h

@@ -0,0 +1,73 @@
+//===- Utils.h - Function and method used by axi4mlir passes ----*- C++ -*-===//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SODA_CONVERSION_LINALGTOAXI4MLIR_UTILS_H_
+#define SODA_CONVERSION_LINALGTOAXI4MLIR_UTILS_H_
+
+#include "mlir/IR/PatternMatch.h"
+
+namespace mlir {
+class MLIRContext;
+class Pass;
+class RewritePatternSet;
+class PatternRewriter;
+class ModuleOp;
+namespace func {
+class FuncOp;
+} // namespace func
+
+struct AccelTransformationOptions {
+  /// Accelerator Tile Size information
+  unsigned accelSize = 1;
+  ArrayRef<unsigned> accelSizes;
+
+  /// DMA Information
+  unsigned dmaAddress = 0;
+  unsigned dmaInputAddress = 0;
+  unsigned dmaInputBufferSize = 100000;
+  unsigned dmaOutputAddress = 100000;
+  unsigned dmaOutputBufferSize = 100000;
+
+  /// Flow information
+
+  /// IDs of opcodes that should be accumulated on the CPU
+  ArrayRef<unsigned> accOnCpu;
+  bool flowCpuAcc = false;
+  unsigned numberOfCaches = false;
+  ArrayRef<unsigned> cacheSizes;
+  ArrayRef<unsigned> tileSizes;
+  unsigned elementSize = false;
+  ArrayRef<unsigned> loopPermutation;
+
+  /// Anchor
+  std::string anchorFuncName;
+  std::string anchorOpName;
+  std::string anchorFilterName;
+
+  /// Opcode information
+  std::string opcodeMap;
+  std::string initFlow;
+  std::string opcodeFlow;
+
+public:
+  /// Utility to print members of the struct
+  void dump() const;
+};
+
+/// Apply tiling patterns to matmul operations with the correct attribute
+void applyPatterns(func::FuncOp funcOp, const AccelTransformationOptions &options);
+
+/// Populates patterns that implement a FSM of modifications.
+/// Changhing the kLinalgTransformMarker
+/// GENERALIZE -> INTERCHANGE -> MEM(TILE) L3(TILE) -> L2(TILE) -> L1(TILE) ->
+/// ACCEL
+void populateCommonLinalgTransformationPatterns(
+    RewritePatternSet &patterns, const AccelTransformationOptions &options);
+
+} // namespace mlir
+
+#endif // SODA_CONVERSION_LINALGTOAXI4MLIR_UTILS_H_

include/soda/Conversion/LinalgToAccel/LinalgGenericToAccel.h

@@ -0,0 +1,39 @@
+//===- LinalgGenericToAccel.h - Convert linalg to AXI4MLIR calls ----*- C++
+//-*-===//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SODA_CONVERSION_LINALGTOACCEL_LINALGGENERICTOACCEL_H_
+#define SODA_CONVERSION_LINALGTOACCEL_LINALGGENERICTOACCEL_H_
+
+#include "soda/Conversion/LinalgToAccel/AXI4MLIRUtils.h"
+#include "mlir/IR/PatternMatch.h"
+
+namespace mlir {
+class MLIRContext;
+class Pass;
+class RewritePatternSet;
+class ModuleOp;
+template <typename T>
+class OperationPass;
+
+/// Populate the list with patterns that convert from LinalgOps to AccelOps
+void populateLinalgGenericToAccelConversionPatternsWithOptions(
+    RewritePatternSet &patterns,
+    const AccelTransformationOptions &options = AccelTransformationOptions());
+void populateLinalgGenericToAccelConversionPatterns(
+    RewritePatternSet &patterns);
+
+/// Create the pass to convert from LinalgOps to AccelOps
+std::unique_ptr<OperationPass<ModuleOp>>
+createConvertLinalgGenericToAccelPass();
+
+std::unique_ptr<OperationPass<ModuleOp>> createConvertLinalgGenericToAccelPass(
+    const AccelTransformationOptions &options);
+
+} // namespace mlir
+
+#endif // SODA_CONVERSION_LINALGTOACCEL_LINALGGENERICTOACCEL_H_

include/soda/Conversion/Passes.h

@@ -15,6 +15,8 @@
 #include "soda/Conversion/KernelsToSODA/OperationToSODAPass.h"
 #include "soda/Conversion/KernelsToSODA/SCFToSODAPass.h"
 
+#include "soda/Conversion/AccelToRuntime/AccelToAXI4MLIR.h"
+
 namespace mlir {
 namespace soda {
 

include/soda/Conversion/Passes.td

@@ -81,4 +81,19 @@ def ConvertAllToSODA : Pass<"convert-all-to-soda", "func::FuncOp"> {
   ];
 }
 
+//===----------------------------------------------------------------------===//
+// AccelToAXI4MLIR
+//===----------------------------------------------------------------------===//
+
+def ConvertAccelToAXI4MLIR : Pass<"test-accel-to-axi4mlir", "ModuleOp"> {
+  let summary = "Convert accel ops into AXI4MLIR runtime calls";
+  let constructor = "mlir::createConvertAccelToAXI4MLIRPass()";
+  let dependentDialects = [
+    "AffineDialect",
+    "memref::MemRefDialect",
+    "scf::SCFDialect",
+    "LLVM::LLVMDialect",
+  ];
+}
+
 #endif // SODA_CONVERSION_PASSES

include/soda/Dialect/Accel/CMakeLists.txt

@@ -0,0 +1 @@
+add_subdirectory(IR)

include/soda/Dialect/Accel/IR/Accel.h

@@ -0,0 +1,32 @@
+//===- Accel.h - Accel dialect ------------------------------------*- C++-*-==//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SODA_DIALECT_ACCEL_IR_ACCEL_H_
+#define SODA_DIALECT_ACCEL_IR_ACCEL_H_
+
+#include "mlir/IR/BuiltinTypes.h"
+#include "mlir/IR/Dialect.h"
+#include "mlir/IR/OpDefinition.h"
+#include "mlir/IR/OpImplementation.h"
+#include "mlir/Interfaces/SideEffectInterfaces.h"
+#include "mlir/Interfaces/VectorInterfaces.h"
+
+//===----------------------------------------------------------------------===//
+// Accel Dialect
+//===----------------------------------------------------------------------===//
+
+#include "soda/Dialect/Accel/IR/AccelOpsDialect.h.inc"
+
+//===----------------------------------------------------------------------===//
+// Accel Dialect Operations
+//===----------------------------------------------------------------------===//
+
+#define GET_OP_CLASSES
+#include "soda/Dialect/Accel/IR/AccelOps.h.inc"
+
+#endif // SODA_DIALECT_ACCEL_IR_ACCEL_H_

include/soda/Dialect/Accel/IR/AccelBase.td

@@ -0,0 +1,20 @@
+//===- AccelBase.td - Base definitions for accel dialect ----*- tablegen -*-==//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+#ifndef ACCEL_BASE
+#define ACCEL_BASE
+include "mlir/IR/OpBase.td"
+def Accel_Dialect : Dialect {
+  let name = "accel";
+  let cppNamespace = "::mlir::accel";
+  let description = [{
+    The accel dialect is intended to hold accel operations that abstract
+    AXI4MLIR DMA communciations.
+  }];
+  let useFoldAPI = kEmitFoldAdaptorFolder;
+}
+#endif // ACCEL_BASE

include/soda/Dialect/Accel/IR/AccelOps.td

@@ -0,0 +1,109 @@
+//===- AccelOps.td - Accel op definitions ------------------*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef ACCEL_OPS
+#define ACCEL_OPS
+
+include "soda/Dialect/Accel/IR/AccelBase.td"
+include "mlir/Interfaces/SideEffectInterfaces.td"
+
+// Base class for accel dialect ops. 
+class Accel_Op<string mnemonic, list<Trait> traits = []> :
+    Op<Accel_Dialect, mnemonic, traits>;
+
+//===----------------------------------------------------------------------===//
+// dmaInitOp
+//===----------------------------------------------------------------------===//
+
+def Accel_InitDMAOp : Accel_Op<"init_dma"> {
+  let summary = "initializes the DMA";
+  let description = [{
+    During lowering to AXI4MLIR calls, this op is lowered to a call to
+    `dma_init` at the beginning of the operation scope/basic block, and
+    a call to `dma_free` at the end of the operation scope/basic block.
+    ```
+  }];
+  let arguments = (ins SignlessIntegerLike:$dmaAddress,
+                       SignlessIntegerLike:$dmaInputAddress,
+                       SignlessIntegerLike:$dmaInputBufferSize,
+                       SignlessIntegerLike:$dmaOutputAddress,
+                       SignlessIntegerLike:$dmaOutputBufferSize);
+
+
+ // let results = (outs SignlessIntegerLike:$result);
+
+  let assemblyFormat = [{
+  $dmaAddress `,`
+  $dmaInputAddress `,`
+  $dmaInputBufferSize `,`
+  $dmaOutputAddress `,`
+  $dmaOutputBufferSize
+  attr-dict `:`
+  `(`
+  type($dmaAddress) `,`
+  type($dmaInputAddress) `,`
+  type($dmaInputBufferSize) `,`
+  type($dmaOutputAddress) `,`
+  type($dmaOutputBufferSize) 
+  `)`
+  }];
+}
+
+def Accel_SendOp : Accel_Op<"send"> {
+  let summary = "send MemRef to DMA region";
+  let description = [{
+    TODO
+  }];
+  let arguments = (ins AnyMemRef:$input,
+                       Optional<I32>:$offset_value);
+
+
+  let results = (outs I32:$out_offset);
+
+  let assemblyFormat = [{
+    $input (`,` $offset_value^)?  attr-dict `:` 
+    `(` type($input) (`,` type($offset_value)^)? `)` `->` type($out_offset)
+  }];
+}
+
+def Accel_SendLiteralOp : Accel_Op<"sendLiteral"> {
+  let summary = "send Literal to DMA region";
+  let description = [{
+    Used to send a literal value to the DMA region.
+    The literal value is considered an opcode.
+  }];
+  let arguments = (ins SignlessIntegerLike:$opcode,
+                       Optional<I32>:$offset_value);
+
+
+  let results = (outs I32:$out_offset);
+
+  let assemblyFormat = [{
+    $opcode (`,` $offset_value^)?  attr-dict `:` 
+    `(` type($opcode) (`,` type($offset_value)^)? `)` `->` type($out_offset)
+  }];
+}
+
+def Accel_RecvOp : Accel_Op<"recv"> {
+  let summary = "receive data from the DMA region into the MemRef";
+  let description = [{
+    TODO
+  }];
+  let arguments = (ins AnyMemRef:$dst,
+                       Optional<I32>:$offset_value);
+
+
+  let results = (outs I32:$out_offset);
+
+  let assemblyFormat = [{
+    $dst (`,` $offset_value^)?  attr-dict `:` 
+    `(` type($dst) (`,` type($offset_value)^)? `)` `->` type($out_offset)
+  }];
+}
+
+#endif // ACCEL_OPS

include/soda/Dialect/Accel/IR/CMakeLists.txt

@@ -0,0 +1,2 @@
+add_mlir_dialect(AccelOps accel)
+add_mlir_doc(AccelOps AccelOps Dialects/ -gen-dialect-doc)

include/soda/Dialect/CMakeLists.txt

@@ -2,4 +2,5 @@ add_subdirectory(SODA)
 add_subdirectory(SNN)
 add_subdirectory(Linalg)
 add_subdirectory(Affine)
+add_subdirectory(Accel)
 add_subdirectory(Transform)

include/soda/Dialect/SNN/IR/SNNBase.td

@@ -25,6 +25,7 @@ def SNN_Dialect : Dialect {
   }];
 
   let dependentDialects = ["tensor::TensorDialect"];
+  let useFoldAPI = kEmitFoldAdaptorFolder;
 }
 
 #endif // SNN_BASE