RISC-V: Add support for XCVmac extension in CV32E40P

Spec: https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html

Contributors:
  Mary Bennett <[email protected]>
  Nandni Jamnadas <[email protected]>
  Pietra Ferreira <[email protected]>
  Charlie Keaney
  Jessica Mills
  Craig Blackmore <[email protected]>
  Simon Cook <[email protected]>
  Jeremy Bennett <[email protected]>
  Helene Chelin <[email protected]>

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_multi_subset_supports): Added `xcvmac`
          instruction class.
	(riscv_multi_subset_supports_ext): Likewise.

gas/ChangeLog:

	* config/tc-riscv.c (validate_riscv_insn): Added the necessary
          operands for the extension.
	(riscv_ip): Likewise.
	* doc/c-riscv.texi: Noted XCVmac as an additional ISA extension
          for CORE-V.
	* testsuite/gas/riscv/cv-mac-fail-march.d: New test.
	* testsuite/gas/riscv/cv-mac-fail-march.l: New test.
	* testsuite/gas/riscv/cv-mac-fail-march.s: New test.
	* testsuite/gas/riscv/cv-mac-fail-operand.d: New test.
	* testsuite/gas/riscv/cv-mac-fail-operand.l: New test.
	* testsuite/gas/riscv/cv-mac-fail-operand.s: New test.
	* testsuite/gas/riscv/cv-mac-insns.d: New test.
	* testsuite/gas/riscv/cv-mac-insns.s: New test.

opcodes/ChangeLog:

	* riscv-dis.c (print_insn_args): Disassemble information with
          the EXTRACT macro implemented.
	* riscv-opc.c: Defined the MASK and added
          XCVmac instructions.

include/ChangeLog:

	* opcode/riscv-opc.h: Added corresponding MATCH and MASK macros
          for XCVmac.
	* opcode/riscv.h: Added corresponding EXTRACT and ENCODE macros
          for uimm.
	(enum riscv_insn_class): Added the XCVmac instruction class.

bfd/elfxx-riscv.c

@@ -1351,6 +1351,8 @@ static struct riscv_supported_ext riscv_supported_std_zxm_ext[] =
 
 static struct riscv_supported_ext riscv_supported_vendor_x_ext[] =
 {
+  /* CORE-V ISA extension spec: https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html */
+  {"xcvmac",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
   {"xtheadba",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
   {"xtheadbb",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
   {"xtheadbs",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
@@ -2549,6 +2551,8 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps,
       return riscv_subset_supports (rps, "svinval");
     case INSN_CLASS_H:
       return riscv_subset_supports (rps, "h");
+    case INSN_CLASS_XCVMAC:
+      return riscv_subset_supports (rps, "xcvmac");
     case INSN_CLASS_XTHEADBA:
       return riscv_subset_supports (rps, "xtheadba");
     case INSN_CLASS_XTHEADBB:
@@ -2789,6 +2793,8 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps,
       return "svinval";
     case INSN_CLASS_H:
       return _("h");
+    case INSN_CLASS_XCVMAC:
+      return "xcvmac";
     case INSN_CLASS_XTHEADBA:
       return "xtheadba";
     case INSN_CLASS_XTHEADBB:

gas/config/tc-riscv.c

@@ -1481,6 +1481,16 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length)
 		  }
 	      }
 	      break;
+	    case 'c': /* Vendor-specific (CORE-V) operands.  */
+	      switch (*++oparg)
+		{
+		  case '3':
+		    used_bits |= ENCODE_CV_IS3_UIMM5 (-1U);
+		    break;
+		  default:
+		    goto unknown_validate_operand;
+		}
+		break;
 	    default:
 	      goto unknown_validate_operand;
 	    }
@@ -3649,7 +3659,23 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr,
 		      }
 		  }
 		  break;
-
+		case 'c': /* Vendor-specific (CORE-V) operands.  */
+		  switch (*++oparg)
+		    {
+		      case '3':
+			my_getExpression (imm_expr, asarg);
+			check_absolute_expr (ip, imm_expr, FALSE);
+			asarg = expr_parse_end;
+			if (imm_expr->X_add_number < 0
+			    || imm_expr->X_add_number > 31)
+			  break;
+			ip->insn_opcode
+			    |= ENCODE_CV_IS3_UIMM5 (imm_expr->X_add_number);
+			continue;
+		      default:
+			goto unknown_riscv_ip_operand;
+		    }
+		  break;
 		default:
 		  goto unknown_riscv_ip_operand;
 		}

gas/doc/c-riscv.texi

@@ -745,6 +745,11 @@ extensions supported and provides the location of their
 publicly-released documentation:
 
 @table @r
+@item Xcvmac
+The Xcvmac extension provides instructions for multiply-accumulate operations.
+
+It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html}
+
 @item XTheadBa
 The XTheadBa extension provides instructions for address calculations.
 

gas/testsuite/gas/riscv/cv-mac-fail-march.d

@@ -0,0 +1,3 @@
+#as: -march=rv32i
+#source: cv-mac-fail-march.s
+#error_output: cv-mac-fail-march.l

gas/testsuite/gas/riscv/cv-mac-fail-march.l

@@ -0,0 +1,23 @@
+.*: Assembler messages:
+.*: Error: unrecognized opcode `cv.mac t4,t2,t0', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.msu t4,t2,t0', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.muls t4,t2,t0', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.mulhhs t4,t2,t0', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.mulsn t4,t2,t0,4', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.mulhhsn t4,t2,t0,16', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.mulsrn t4,t2,t0,10', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.mulhhsrn t4,t2,t0,17', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.mulu t4,t2,t0', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.mulhhu t4,t2,t0', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.mulun t4,t2,t0,7', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.mulhhun t4,t2,t0,16', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.mulurn t4,t2,t0,11', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.mulhhurn t4,t2,t0,9', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.macsn t4,t2,t0,24', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.machhsn t4,t2,t0,11', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.macsrn t4,t2,t0,9', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.machhsrn t4,t2,t0,24', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.macun t4,t2,t0,27', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.machhun t4,t2,t0,18', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.macurn t4,t2,t0,25', extension `xcvmac' required
+.*: Error: unrecognized opcode `cv.machhurn t4,t2,t0,5', extension `xcvmac' required

gas/testsuite/gas/riscv/cv-mac-fail-march.s

@@ -0,0 +1,24 @@
+# Absence of the xcvmac march option disables all CORE-V MAC extensions.
+target:
+	cv.mac t4, t2, t0
+	cv.msu t4, t2, t0
+	cv.muls t4, t2, t0
+	cv.mulhhs t4, t2, t0
+	cv.mulsn t4, t2, t0, 4
+	cv.mulhhsn t4, t2, t0, 16
+	cv.mulsrn t4, t2, t0, 10
+	cv.mulhhsrn t4, t2, t0, 17
+	cv.mulu t4, t2, t0
+	cv.mulhhu t4, t2, t0
+	cv.mulun t4, t2, t0, 7
+	cv.mulhhun t4, t2, t0, 16
+	cv.mulurn t4, t2, t0, 11
+	cv.mulhhurn t4, t2, t0, 9
+	cv.macsn t4, t2, t0, 24
+	cv.machhsn t4, t2, t0, 11
+	cv.macsrn t4, t2, t0, 9
+	cv.machhsrn t4, t2, t0, 24
+	cv.macun t4, t2, t0, 27
+	cv.machhun t4, t2, t0, 18
+	cv.macurn t4, t2, t0, 25
+	cv.machhurn t4, t2, t0, 5

gas/testsuite/gas/riscv/cv-mac-fail-operand.d

@@ -0,0 +1,3 @@
+#as: -march=rv32i_xcvmac
+#source: cv-mac-fail-operand.s
+#error_output: cv-mac-fail-operand.l

gas/testsuite/gas/riscv/cv-mac-fail-operand.l

@@ -0,0 +1,147 @@
+.*: Assembler messages:
+.*: Error: illegal operands `cv.mac 8,t2,t0'
+.*: Error: illegal operands `cv.msu 23,t2,t0'
+.*: Error: illegal operands `cv.muls 43,t2,t0'
+.*: Error: illegal operands `cv.mulhhs 7,t2,t0'
+.*: Error: illegal operands `cv.mulsn 345,t2,t0,4'
+.*: Error: illegal operands `cv.mulhhsn 356,t2,t0,16'
+.*: Error: illegal operands `cv.mulsrn 867,t2,t0,10'
+.*: Error: illegal operands `cv.mulhhsrn 3454,t2,t0,17'
+.*: Error: illegal operands `cv.mulu 9,t2,t0'
+.*: Error: illegal operands `cv.mulhhu 54,t2,t0'
+.*: Error: illegal operands `cv.mulun 965,t2,t0,7'
+.*: Error: illegal operands `cv.mulhhun 35,t2,t0,16'
+.*: Error: illegal operands `cv.mulurn 87,t2,t0,11'
+.*: Error: illegal operands `cv.mulhhurn 38,t2,t0,9'
+.*: Error: illegal operands `cv.macsn 985,t2,t0,24'
+.*: Error: illegal operands `cv.machhsn 83,t2,t0,11'
+.*: Error: illegal operands `cv.macsrn 960,t2,t0,9'
+.*: Error: illegal operands `cv.machhsrn 385,t2,t0,24'
+.*: Error: illegal operands `cv.macun 58,t2,t0,27'
+.*: Error: illegal operands `cv.machhun 6,t2,t0,18'
+.*: Error: illegal operands `cv.macurn 35,t2,t0,25'
+.*: Error: illegal operands `cv.machhurn 67,t2,t0,5'
+.*: Error: illegal operands `cv.mac t4,43,t0'
+.*: Error: illegal operands `cv.msu t4,3,t0'
+.*: Error: illegal operands `cv.muls t4,345,t0'
+.*: Error: illegal operands `cv.mulhhs t4,54,t0'
+.*: Error: illegal operands `cv.mulsn t4,4,t0,4'
+.*: Error: illegal operands `cv.mulhhsn t4,35,t0,16'
+.*: Error: illegal operands `cv.mulsrn t4,53,t0,10'
+.*: Error: illegal operands `cv.mulhhsrn t4,4456,t0,17'
+.*: Error: illegal operands `cv.mulu t4,868,t0'
+.*: Error: illegal operands `cv.mulhhu t4,95,t0'
+.*: Error: illegal operands `cv.mulun t4,584,t0,7'
+.*: Error: illegal operands `cv.mulhhun t4,37545,t0,16'
+.*: Error: illegal operands `cv.mulurn t4,943,t0,11'
+.*: Error: illegal operands `cv.mulhhurn t4,34,t0,9'
+.*: Error: illegal operands `cv.macsn t4,93,t0,24'
+.*: Error: illegal operands `cv.machhsn t4,584,t0,11'
+.*: Error: illegal operands `cv.macsrn t4,28,t0,9'
+.*: Error: illegal operands `cv.machhsrn t4,9,t0,24'
+.*: Error: illegal operands `cv.macun t4,834,t0,27'
+.*: Error: illegal operands `cv.machhun t4,92,t0,18'
+.*: Error: illegal operands `cv.macurn t4,49,t0,25'
+.*: Error: illegal operands `cv.machhurn t4,6,t0,5'
+.*: Error: illegal operands `cv.mac t4,t2,344'
+.*: Error: illegal operands `cv.msu t4,t2,23'
+.*: Error: illegal operands `cv.muls t4,t2,2'
+.*: Error: illegal operands `cv.mulhhs t4,t2,8'
+.*: Error: illegal operands `cv.mulsn t4,t2,45,4'
+.*: Error: illegal operands `cv.mulhhsn t4,t2,655,16'
+.*: Error: illegal operands `cv.mulsrn t4,t2,465,10'
+.*: Error: illegal operands `cv.mulhhsrn t4,t2,3534,17'
+.*: Error: illegal operands `cv.mulu t4,t2,46'
+.*: Error: illegal operands `cv.mulhhu t4,t2,35'
+.*: Error: illegal operands `cv.mulun t4,t2,67,7'
+.*: Error: illegal operands `cv.mulhhun t4,t2,6,16'
+.*: Error: illegal operands `cv.mulurn t4,t2,787,11'
+.*: Error: illegal operands `cv.mulhhurn t4,t2,3545,9'
+.*: Error: illegal operands `cv.macsn t4,t2,6,24'
+.*: Error: illegal operands `cv.machhsn t4,t2,765,11'
+.*: Error: illegal operands `cv.macsrn t4,t2,45,9'
+.*: Error: illegal operands `cv.machhsrn t4,t2,7,24'
+.*: Error: illegal operands `cv.macun t4,t2,98,27'
+.*: Error: illegal operands `cv.machhun t4,t2,654,18'
+.*: Error: illegal operands `cv.macurn t4,t2,900,25'
+.*: Error: illegal operands `cv.machhurn t4,t2,354,5'
+.*: Error: illegal operands `cv.mulsn t4,t2,t0,-1'
+.*: Error: illegal operands `cv.mulhhsn t4,t2,t0,-1'
+.*: Error: illegal operands `cv.mulsrn t4,t2,t0,-1'
+.*: Error: illegal operands `cv.mulhhsrn t4,t2,t0,-1'
+.*: Error: illegal operands `cv.mulun t4,t2,t0,-1'
+.*: Error: illegal operands `cv.mulhhun t4,t2,t0,-1'
+.*: Error: illegal operands `cv.mulurn t4,t2,t0,-1'
+.*: Error: illegal operands `cv.mulhhurn t4,t2,t0,-1'
+.*: Error: illegal operands `cv.macsn t4,t2,t0,-1'
+.*: Error: illegal operands `cv.machhsn t4,t2,t0,-1'
+.*: Error: illegal operands `cv.macsrn t4,t2,t0,-1'
+.*: Error: illegal operands `cv.machhsrn t4,t2,t0,-1'
+.*: Error: illegal operands `cv.macun t4,t2,t0,-1'
+.*: Error: illegal operands `cv.machhun t4,t2,t0,-1'
+.*: Error: illegal operands `cv.macurn t4,t2,t0,-1'
+.*: Error: illegal operands `cv.machhurn t4,t2,t0,-1'
+.*: Error: illegal operands `cv.mulsn t4,t2,t0,-43'
+.*: Error: illegal operands `cv.mulhhsn t4,t2,t0,-531'
+.*: Error: illegal operands `cv.mulsrn t4,t2,t0,-4454'
+.*: Error: illegal operands `cv.mulhhsrn t4,t2,t0,-32'
+.*: Error: illegal operands `cv.mulun t4,t2,t0,-23'
+.*: Error: illegal operands `cv.mulhhun t4,t2,t0,-459'
+.*: Error: illegal operands `cv.mulurn t4,t2,t0,-549'
+.*: Error: illegal operands `cv.mulhhurn t4,t2,t0,-32'
+.*: Error: illegal operands `cv.macsn t4,t2,t0,-223'
+.*: Error: illegal operands `cv.machhsn t4,t2,t0,-56'
+.*: Error: illegal operands `cv.macsrn t4,t2,t0,-8'
+.*: Error: illegal operands `cv.machhsrn t4,t2,t0,-2'
+.*: Error: illegal operands `cv.macun t4,t2,t0,-432'
+.*: Error: illegal operands `cv.machhun t4,t2,t0,-1245'
+.*: Error: illegal operands `cv.macurn t4,t2,t0,-45'
+.*: Error: illegal operands `cv.machhurn t4,t2,t0,-354'
+.*: Error: illegal operands `cv.mulsn t4,t2,t0,32'
+.*: Error: illegal operands `cv.mulhhsn t4,t2,t0,32'
+.*: Error: illegal operands `cv.mulsrn t4,t2,t0,32'
+.*: Error: illegal operands `cv.mulhhsrn t4,t2,t0,32'
+.*: Error: illegal operands `cv.mulun t4,t2,t0,32'
+.*: Error: illegal operands `cv.mulhhun t4,t2,t0,32'
+.*: Error: illegal operands `cv.mulurn t4,t2,t0,32'
+.*: Error: illegal operands `cv.mulhhurn t4,t2,t0,32'
+.*: Error: illegal operands `cv.macsn t4,t2,t0,32'
+.*: Error: illegal operands `cv.machhsn t4,t2,t0,32'
+.*: Error: illegal operands `cv.macsrn t4,t2,t0,32'
+.*: Error: illegal operands `cv.machhsrn t4,t2,t0,32'
+.*: Error: illegal operands `cv.macun t4,t2,t0,32'
+.*: Error: illegal operands `cv.machhun t4,t2,t0,32'
+.*: Error: illegal operands `cv.macurn t4,t2,t0,32'
+.*: Error: illegal operands `cv.machhurn t4,t2,t0,32'
+.*: Error: illegal operands `cv.mulsn t4,t2,t0,325'
+.*: Error: illegal operands `cv.mulhhsn t4,t2,t0,531'
+.*: Error: illegal operands `cv.mulsrn t4,t2,t0,4454'
+.*: Error: illegal operands `cv.mulhhsrn t4,t2,t0,254'
+.*: Error: illegal operands `cv.mulun t4,t2,t0,76'
+.*: Error: illegal operands `cv.mulhhun t4,t2,t0,459'
+.*: Error: illegal operands `cv.mulurn t4,t2,t0,549'
+.*: Error: illegal operands `cv.mulhhurn t4,t2,t0,5364'
+.*: Error: illegal operands `cv.macsn t4,t2,t0,34435'
+.*: Error: illegal operands `cv.machhsn t4,t2,t0,56'
+.*: Error: illegal operands `cv.macsrn t4,t2,t0,3423'
+.*: Error: illegal operands `cv.machhsrn t4,t2,t0,365'
+.*: Error: illegal operands `cv.macun t4,t2,t0,432'
+.*: Error: illegal operands `cv.machhun t4,t2,t0,1245'
+.*: Error: illegal operands `cv.macurn t4,t2,t0,45'
+.*: Error: instruction cv.mulsn requires absolute expression
+.*: Error: instruction cv.mulhhsn requires absolute expression
+.*: Error: instruction cv.mulsrn requires absolute expression
+.*: Error: instruction cv.mulhhsrn requires absolute expression
+.*: Error: instruction cv.mulun requires absolute expression
+.*: Error: instruction cv.mulhhun requires absolute expression
+.*: Error: instruction cv.mulurn requires absolute expression
+.*: Error: instruction cv.mulhhurn requires absolute expression
+.*: Error: instruction cv.macsn requires absolute expression
+.*: Error: instruction cv.machhsn requires absolute expression
+.*: Error: instruction cv.macsrn requires absolute expression
+.*: Error: instruction cv.machhsrn requires absolute expression
+.*: Error: instruction cv.macun requires absolute expression
+.*: Error: instruction cv.machhun requires absolute expression
+.*: Error: instruction cv.macurn requires absolute expression
+.*: Error: instruction cv.machhurn requires absolute expression
+.*: Error: illegal operands `cv.machhurn t4,t2,t0,354'