Update (2025.02.19)

35480: Fix the bugs related to LoongArch architecture support in JVMCI
loongson · Feb 19, 2025 · 86b098a · 86b098a
1 parent 0c961cd
commit 86b098a
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Showing 4 changed files with 11 additions and 5 deletions.
diff --git a/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp b/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2022, 2024, Loongson Technology. All rights reserved.
+ * Copyright (c) 2022, 2025, Loongson Technology. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -40,7 +40,7 @@ jint CodeInstaller::pd_next_offset(NativeInstruction* inst, jint pc_offset, JVMC
   address pc = (address) inst;
   if (inst->is_int_branch() || inst->is_float_branch()) {
     return pc_offset + NativeInstruction::nop_instruction_size;
-  } else if (inst->is_call()) {
+  } else if (inst->is_call() || inst->is_jalr()) {
     return pc_offset + NativeCall::instruction_size;
   } else if (inst->is_far_call()) {
     return pc_offset + NativeFarCall::instruction_size;

diff --git a/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp b/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp
@@ -75,6 +75,11 @@ bool NativeInstruction::is_pcaddu12i_add() const {
          Assembler::high(int_at(4), 10)   == Assembler::addi_d_op;
 }
 
+bool NativeInstruction::is_jalr() const {
+  return Assembler::high(int_at(0), 6) == Assembler::jirl_op &&
+         Assembler::low(int_at(0), 5)  == RA->encoding();
+}
+
 bool NativeCall::is_bl() const {
   return Assembler::high(int_at(0), 6) == Assembler::bl_op;
 }

diff --git a/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp b/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2015, 2024, Loongson Technology. All rights reserved.
+ * Copyright (c) 2015, 2025, Loongson Technology. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -76,6 +76,7 @@ class NativeInstruction {
   bool is_lu12iw_lu32id() const;
   bool is_pcaddu12i_add() const;
   bool is_pcaddi() const;
+  bool is_jalr() const;
 
   // LoongArch has no instruction to generate a illegal instruction exception?
   // But `break  11` is not illegal instruction for LoongArch.

diff --git a/...l.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java b/...l.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2022, 2023, Loongson Technology. All rights reserved.
+ * Copyright (c) 2022, 2025, Loongson Technology. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -242,7 +242,7 @@ private CallingConvention callingConvention(RegisterArray generalParameterRegist
                     if (currentFloat < floatParameterRegisters.size()) {
                         Register register = floatParameterRegisters.get(currentFloat++);
                         locations[i] = register.asValue(valueKindFactory.getValueKind(kind));
-                    } else if (currentGeneral < generalParameterRegisters.size()) {
+                    } else if (type == HotSpotCallingConventionType.NativeCall && currentGeneral < generalParameterRegisters.size()) {
                         Register register = generalParameterRegisters.get(currentGeneral++);
                         locations[i] = register.asValue(valueKindFactory.getValueKind(kind));
                     }