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ipc4: handler: maintain IPC set_pipeline_state order
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Fix a side-effect of commit 068f143 ("ipc4: handler: Use separate
loops for pipeline state phases") where the order of pipeline
triggers was changed when the trigger handling was delayed to
the pipeline thread. If host asked for pipelines to be triggered
in order 2, 1, 0, the actual trigger order might end up as 0, 1, 2
based on how LL scheduler runs the pipeline tasks (0 is run first).

Fix the issue by adding a blocking wait to the IPC thread between
each delayed trigger.

Link: thesofproject#8481
Signed-off-by: Kai Vehmanen <[email protected]>
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kv2019i committed Nov 22, 2023
1 parent 980b988 commit c5d638a
Showing 1 changed file with 11 additions and 0 deletions.
11 changes: 11 additions & 0 deletions src/ipc/ipc4/handler.c
Original file line number Diff line number Diff line change
Expand Up @@ -630,6 +630,17 @@ static int ipc4_set_pipeline_state(struct ipc4_message_request *ipc4)
ipc_compound_pre_start(state.primary.r.type);
ret = ipc4_pipeline_trigger(ppl_icd, cmd, &delayed);
ipc_compound_post_start(state.primary.r.type, ret, delayed);
if (delayed) {
/* To maintain pipeline order for triggers, we must
* do a blocking wait until trigger is processed.
* This will add a max delay of 'ppl_count' LL ticks
* to process the full trigger list.
*/
if (ipc_wait_for_compound_msg() != 0) {
ipc_cmd_err(&ipc_tr, "ipc4: fail with delayed trigger");
return IPC4_FAILURE;
}
}
}

if (ret != 0)
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