TRETS paper

src/main/scala/Reaction.scala

@@ -58,7 +58,7 @@ class ReactionPrecedencePorts(c: ReactionConfig) extends Bundle {
 
 class ReactionStatePorts()
 
-abstract class Reaction (val c: ReactionConfig = ReactionConfig(0,0)) extends Module {
+abstract class Reaction (val c: ReactionConfig = ReactionConfig(0,0))(implicit globalReactorConfig: GlobalReactorConfig) extends Module {
   import ReactionApi.{lf_set, lf_get, lf_present}
   implicit val instance: Reaction = this
   val io: ReactionIO
@@ -80,7 +80,8 @@ abstract class Reaction (val c: ReactionConfig = ReactionConfig(0,0)) extends Mo
 
   val logicalTag = RegInit(0.U(64.W))
   val physicalTag = RegInit(0.U(64.W))
-  physicalTag := physicalTag + 1.U
+  physicalTag := physicalTag + globalReactorConfig.clockPeriod.nanoseconds.U
+
   def driveDefaults(): Unit = {
     io.driveDefaults()
     precedenceIn.foreach(_.driveDefaults())
@@ -199,7 +200,7 @@ abstract class Reaction (val c: ReactionConfig = ReactionConfig(0,0)) extends Mo
     }
   }
 
-  assert(!(regCycles > 10000.U), "[Reaction] Reaction was running for over 10000cc assumed error")
+  assert(!(regCycles > 100000000.U), "[Reaction] Reaction was running for over 10000cc assumed error")
 
   // FIXME: These debug signals should be optional
   statusIO.state := regState

src/main/scala/Reactor.scala

@@ -21,7 +21,8 @@ package object globals {
 case class GlobalReactorConfig(
                               timeout: Time,
                               standalone: Boolean,
-                              triggerLatency: Int = 4
+                              triggerLatency: Int = 4,
+                              clockPeriod: Time = Time.nsec(1)
                               )
 
 abstract class ReactorIO extends Bundle {
@@ -99,7 +100,7 @@ class ReactorTriggerIO(cfg: ReactorTriggerConfig) extends Bundle {
   def allTimerTriggers = localTimerTriggers ++ containedTimerTriggers
 }
 
-abstract class Reactor extends Module {
+abstract class Reactor(implicit gc: GlobalReactorConfig) extends Module {
 
   // The Inputs and Outputs of the reactor
   val io: ReactorIO

src/main/scala/Token.scala

@@ -134,7 +134,7 @@ abstract class TokenReadMaster[T1 <: Data, T2 <: Token[T1]](gen1: T1, gen2: T2)
   def read(addr: UInt, size: UInt): DecoupledIO[TokenRdResp[T1]]
 }
 
-class ArrayTokenReadMaster[T1 <: Data](gen1: T1, gen2: ArrayToken[T1]) extends TokenReadMaster(gen1, gen2) {
+class   ArrayTokenReadMaster[T1 <: Data](gen1: T1, gen2: ArrayToken[T1]) extends TokenReadMaster(gen1, gen2) {
   val req = Decoupled(new ArrayTokenRdReq(gen1, gen2))
   val resp = Flipped(Decoupled(new TokenRdResp(gen1)))
 

src/main/scala/TriggerGenerator.scala

@@ -42,7 +42,7 @@ class MainClock(implicit cfg: GlobalReactorConfig) extends Module {
   when(io.setTime.valid) {
     regClock := io.setTime.bits + cfg.triggerLatency.U
   }.otherwise {
-    regClock := regClock + 1.U
+    regClock := regClock + cfg.clockPeriod.nanoseconds.U
   }
   io.now := regClock
 }

src/main/scala/Utils.scala

@@ -23,15 +23,14 @@ object CharacterizeUtils {
   val dummyParam = new DummyParams
   val zedboardPart = "xc7z020clg484-1"
 
-  def standalone(reactor: () => StandaloneTopReactor, buildDir: String): Unit = {
+  def standalone(reactor: () => StandaloneTopReactor, targetClockPeriod: Time, buildDir: String): Unit = {
     val genTop  = (d: DummyParams) => reactor.apply()
-    VivadoSynth.characterizePoint(dummyParam, genTop, buildDir, zedboardPart,"StandaloneTopReactor")
+    VivadoSynth.characterizePoint(dummyParam, genTop, buildDir, zedboardPart, targetClockPeriod.nsec.toInt, "StandaloneTopReactor")
   }
 
-  def codesign(reactor: () => CodesignTopReactor, buildDir: String): Unit = {
+  def codesign(reactor: () => CodesignTopReactor, targetClockPeriod: Time, buildDir: String): Unit = {
     val genTop = (d: DummyParams) => reactor.apply()
-    VivadoSynth.characterizePoint(dummyParam, genTop, buildDir, zedboardPart, "CodesignTopReactor")
-
+    VivadoSynth.characterizePoint(dummyParam, genTop, buildDir, zedboardPart, targetClockPeriod.nsec.toInt, "CodesignTopReactor")
   }
 
 }