- 2-core MIPS R10K OoO Processor with Snooping MSI and Pipeline Bus
- coreS: 2-core processor for testing multi-core programs
- master: single core processor
- Multicore with coherent write-back data caches
- Early branch recovery
- Perceptron predictor (based on neural network)
- Store-to-load forwarding in LSQ
- Load issue out-of-order past pending stores
- Multiple outstanding load misses
- Store buffer
- Next-line prefetching
- Write-back data cache
- Cache associativity > 1
- Victim cache