agc: Enough code to make it work.

dlkeng · Sep 22, 2024 · 3cab090 · 3cab090
1 parent 9bbe693
commit 3cab090
Show file tree

Hide file tree

Showing 9 changed files with 171 additions and 113 deletions.
diff --git a/asm/agc.cpp b/asm/agc.cpp
@@ -23,11 +23,11 @@
 #include "common/eval_expression.h"
 #include "table/agc.h"
 
-#define MAX_OPERANDS 2
+#define MAX_OPERANDS 1
 
 enum
 {
-  OPERAND_REG,
+  OPERAND_NONE,
   OPERAND_NUMBER,
 };
 
@@ -46,9 +46,7 @@ int parse_instruction_agc(AsmContext *asm_context, char *instr)
   int operand_count = 0;
   int token_type;
   int num, n;
-  //int count;
-  //uint16_t opcode;
-  //int min, max;
+  uint16_t opcode;
 
   lower_copy(instr_case, instr);
   memset(&operands, 0, sizeof(operands));
@@ -67,31 +65,30 @@ int parse_instruction_agc(AsmContext *asm_context, char *instr)
       break;
     }
 
-    // Remove indent?
+    tokens_push(asm_context, token, token_type);
+
+    if (eval_expression(asm_context, &num) != 0)
     {
-      if (eval_expression(asm_context, &num) != 0)
+      if (asm_context->pass == 1)
       {
-        if (asm_context->pass == 1)
-        {
-          ignore_operand(asm_context);
-          num = 0;
-        }
-          else
-        {
-          print_error_illegal_expression(asm_context, instr);
-          return -1;
-        }
+        ignore_operand(asm_context);
+        num = 0;
+      }
+        else
+      {
+        print_error_illegal_expression(asm_context, instr);
+        return -1;
       }
-
-      operands[operand_count].type = OPERAND_NUMBER;
-      operands[operand_count].value = num;
     }
 
+    operands[operand_count].type = OPERAND_NUMBER;
+    operands[operand_count].value = num;
+
     operand_count++;
     token_type = tokens_get(asm_context, token, TOKENLEN);
 
     if (token_type == TOKEN_EOL) { break; }
-    if (IS_NOT_TOKEN(token, ',') || operand_count == 2)
+    if (IS_NOT_TOKEN(token, ',') || operand_count == MAX_OPERANDS)
     {
       print_error_unexp(asm_context, token);
       return -1;
@@ -102,6 +99,11 @@ int parse_instruction_agc(AsmContext *asm_context, char *instr)
   {
     if (strcmp(table_agc[n].instr, instr_case) == 0)
     {
+      if (table_agc[n].is_extra_code)
+      {
+        add_bin16(asm_context, 000006, IS_OPCODE);
+      }
+
       switch (table_agc[n].type)
       {
         case AGC_OP_NONE:
@@ -118,37 +120,46 @@ int parse_instruction_agc(AsmContext *asm_context, char *instr)
         }
         case AGC_OP_K10:
         {
-          if (operand_count != 1 || operands[1].type != OPERAND_NUMBER)
+          if (operand_count != 1 || operands[0].type != OPERAND_NUMBER)
           {
             print_error_illegal_operands(asm_context, instr);
             return -1;
           }
 
-          if (check_range(asm_context, "Address", operands[1].value, 0, 0x3ff) == -1) { return -1; }
+          if (check_range(asm_context, "Address", operands[0].value, 0, 0x3ff) == -1) { return -1; }
+
+          opcode = table_agc[n].opcode | (operands[0].value & 0x3ff);
+          add_bin16(asm_context, opcode, IS_OPCODE);
 
           return 2;
         }
         case AGC_OP_K12:
         {
-          if (operand_count != 1 || operands[1].type != OPERAND_NUMBER)
+          if (operand_count != 1 || operands[0].type != OPERAND_NUMBER)
           {
             print_error_illegal_operands(asm_context, instr);
             return -1;
           }
 
-          if (check_range(asm_context, "Address", operands[1].value, 0, 0xfff) == -1) { return -1; }
+          if (check_range(asm_context, "Address", operands[0].value, 0, 0xfff) == -1) { return -1; }
+
+          opcode = table_agc[n].opcode | (operands[0].value & 0xfff);
+          add_bin16(asm_context, opcode, IS_OPCODE);
 
           return 2;
         }
         case AGC_OP_IO:
         {
-          if (operand_count != 1 || operands[1].type != OPERAND_NUMBER)
+          if (operand_count != 1 || operands[0].type != OPERAND_NUMBER)
           {
             print_error_illegal_operands(asm_context, instr);
             return -1;
           }
 
-          if (check_range(asm_context, "IO", operands[1].value, 0, 0x1ff) == -1) { return -1; }
+          if (check_range(asm_context, "IO", operands[0].value, 0, 0x1ff) == -1) { return -1; }
+
+          opcode = table_agc[n].opcode | (operands[0].value & 0x1ff);
+          add_bin16(asm_context, opcode, IS_OPCODE);
 
           return 2;
         }

diff --git a/build/Makefile b/build/Makefile
@@ -41,9 +41,9 @@ common/cpu_list.o: common/cpu_list.cpp common/cpu_list.h
 %.o: %.c
 	$(CC) -c $< -o $*.o $(CFLAGS) -I..
 
-%.o: %.cpp %.h
+%.o: %.cpp %.h common/cpu_list.h
 	$(CXX) -c $< -o $*.o $(CFLAGS) -I..
 
-%.o: %.cpp
+%.o: %.cpp common/cpu_list.h
 	$(CXX) -c $< -o $*.o $(CFLAGS) -I..
 
diff --git a/common/cpu_list.cpp b/common/cpu_list.cpp
@@ -23,6 +23,7 @@
 #include "asm/8048.h"
 #include "asm/8051.h"
 #include "asm/86000.h"
+#include "asm/agc.h"
 #include "asm/arc.h"
 #include "asm/arm.h"
 #include "asm/arm64.h"
@@ -79,6 +80,7 @@
 #include "disasm/8048.h"
 #include "disasm/8051.h"
 #include "disasm/86000.h"
+#include "disasm/agc.h"
 #include "disasm/arc.h"
 #include "disasm/arm.h"
 #include "disasm/arm64.h"
@@ -511,6 +513,30 @@ struct _cpu_list cpu_list[] =
     NO_FLAGS,
   },
 #endif
+#ifdef ENABLE_AGC
+  {
+    "agc",
+    CPU_TYPE_AGC,
+    ENDIAN_LITTLE,
+    2,
+    ALIGN_2,
+    0,
+    0,
+    1,
+    1,
+    0,
+    0,
+    0,
+    SREC_16,
+    parse_instruction_agc,
+    NULL,
+    link_not_supported,
+    list_output_agc,
+    disasm_range_agc,
+    NULL,
+    NO_FLAGS,
+  },
+#endif
 #ifdef ENABLE_ARC
   {
     "arc",

diff --git a/common/cpu_list.h b/common/cpu_list.h
@@ -49,6 +49,7 @@ enum
   CPU_TYPE_8048,
   CPU_TYPE_8051,
   CPU_TYPE_86000,
+  CPU_TYPE_AGC,
   CPU_TYPE_ARC,
   CPU_TYPE_ARM,
   CPU_TYPE_ARM64,

diff --git a/common/version.h b/common/version.h
@@ -1,7 +1,7 @@
 #ifndef NAKEN_ASM_VERSION_H
 #define NAKEN_ASM_VERSION_H
 
-#define VERSION "August 25, 2024"
+#define VERSION "September 22, 2024"
 
 #endif
 
diff --git a/configure b/configure
@@ -31,6 +31,7 @@ CPUS=" \
   8048
   8051
   86000
+  AGC
   ARC
   ARM
   ARM64
@@ -423,6 +424,11 @@ for option in $@; do
     TABLE_OBJS="${TABLE_OBJS} 86000.o"
     DFLAGS="${DFLAGS} -DENABLE_86000"
   ;;
+  --enable-agc)
+    ASM_OBJS="${ASM_OBJS} agc.o"
+    DISASM_OBJS="${DISASM_OBJS} agc.o"
+    DFLAGS="${DFLAGS} -DENABLE_AGC"
+  ;;
   --enable-arc)
     ASM_OBJS="${ASM_OBJS} arc.o"
     DISASM_OBJS="${DISASM_OBJS} arc.o"

diff --git a/disasm/agc.cpp b/disasm/agc.cpp
@@ -51,6 +51,9 @@ int disasm_agc(
     if (((opcode & table_agc[n].mask) == table_agc[n].opcode) &&
         table_agc[n].is_extra_code == is_extra_code)
     {
+      *cycles_min = table_agc[n].cycles;
+      *cycles_max = table_agc[n].cycles;
+
       switch (table_agc[n].type)
       {
         case AGC_OP_NONE:
@@ -60,23 +63,23 @@ int disasm_agc(
         }
         case AGC_OP_K10:
         {
-          snprintf(instruction, length, "%s %d",
+          snprintf(instruction, length, "%s 0%o",
             table_agc[n].instr,
             opcode & 0x3ff);
 
           return count;
         }
         case AGC_OP_K12:
         {
-          snprintf(instruction, length, "%s %d",
+          snprintf(instruction, length, "%s 0%o",
             table_agc[n].instr,
             opcode & 0xfff);
 
           return count;
         }
         case AGC_OP_IO:
         {
-          snprintf(instruction, length, "%s %d",
+          snprintf(instruction, length, "%s 0%o",
             table_agc[n].instr,
             opcode & 0x1ff);
 
@@ -103,10 +106,8 @@ void list_output_agc(
 {
   char instruction[128];
   char temp[32];
-  char temp2[4];
   int cycles_min, cycles_max;
   int count;
-  int n;
 
   Memory *memory = &asm_context->memory;
 
@@ -123,14 +124,22 @@ void list_output_agc(
       &cycles_min,
       &cycles_max);
 
-    temp[0] = 0;
-    for (n = 0; n < count; n++)
+    if (count == 2)
+    {
+      snprintf(temp, sizeof(temp), "      %05o ", memory->read16(start));
+    }
+      else
     {
-      snprintf(temp2, sizeof(temp2), "%02x ", memory->read8(start + n));
-      strcat(temp, temp2);
+      snprintf(temp, sizeof(temp), "%05o %05o ",
+        memory->read16(start + 0),
+        memory->read16(start + 2));
     }
 
-    fprintf(asm_context->list, "0x%04x: %-10s %-40s\n", start, temp, instruction);
+    fprintf(asm_context->list, "0o%04o: %-11s %-40s  %d\n",
+      start,
+      temp,
+      instruction,
+      cycles_min);
 
     start += count;
   }
@@ -144,15 +153,13 @@ void disasm_range_agc(
 {
   char instruction[128];
   char temp[32];
-  char temp2[4];
   int cycles_min, cycles_max;
   int count;
-  int n;
 
   printf("\n");
 
-  printf("%-7s %-5s %-40s\n", "Addr", "Opcode", "Instruction");
-  printf("------- ------ ----------------------------------       ------\n");
+  printf("%-7s %-11s %-40s Cycles\n", "Addr", "Opcode", "Instruction");
+  printf("------- ----------- ----------------------------------       ------\n");
 
   while (start <= end)
   {
@@ -165,15 +172,22 @@ void disasm_range_agc(
       &cycles_min,
       &cycles_max);
 
-    temp[0] = 0;
-
-    for (n = 0; n < count; n++)
+    if (count == 2)
+    {
+      snprintf(temp, sizeof(temp), "      %05o", memory->read16(start));
+    }
+      else
     {
-      snprintf(temp2, sizeof(temp2), "%02x ", memory->read8(start + n));
-      strcat(temp, temp2);
+      snprintf(temp, sizeof(temp), "%05o %05o",
+        memory->read16(start + 0),
+        memory->read16(start + 2));
     }
 
-    printf("0x%04x: %-10s %-40s\n", start, temp, instruction);
+    printf("0o%04o: %-11s %-40s  %d\n",
+      start,
+      temp,
+      instruction,
+      cycles_min);
 
     start = start + count;
   }