[Deepin-Kernel-SIG] [linux-6.6.y] [Upstream] small fix for riscv-dts #402
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mainline inclusion from mainline-v6.7-rc1 These pins are actually I2STX1 clock input, not I2STX0, so their names should be changed. Signed-off-by: Xingyu Wu <[email protected]> Reviewed-by: Walker Chen <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Conor Dooley <[email protected]> (cherry picked from commit 4e1abae)
mainline inclusion from mainline-v6.7-rc1 Add I2Srx/I2Stx0/I2Stx1 nodes and pins configuration for the StarFive JH7110 SoC. Signed-off-by: Xingyu Wu <[email protected]> Reviewed-by: Walker Chen <[email protected]> Signed-off-by: Conor Dooley <[email protected]> (cherry picked from commit 92cfc35)
mainline inclusion from mainline-v6.7-rc1 Add PWM-DAC support for StarFive JH7110 SoC. Reviewed-by: Walker Chen <[email protected]> Signed-off-by: Hal Feng <[email protected]> Signed-off-by: Conor Dooley <[email protected]> (cherry picked from commit be326be)
mainline inclusion from mainline-v6.7-rc1 In JH7110 SoC, we need to go by-pass mode, so we need add the assigned-clock* properties to limit clock frquency. Signed-off-by: William Qiu <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Conor Dooley <[email protected]> (cherry picked from commit af57113)
opsiff
changed the title
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riscv: dts: starfive: add assigned-clock* to limit frquency
riscv: dts: starfive: Add JH7110 PWM-DAC support
riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1
riscv: dts: starfive: pinfunc: Fix the pins name of I2STX1