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Some further code cleanup
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Anders Ryd committed Dec 10, 2024
1 parent d9748d2 commit 72f0091
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Showing 3 changed files with 47 additions and 170 deletions.
117 changes: 7 additions & 110 deletions TrackletAlgorithm/MemoryTemplate.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,7 @@ class MemoryTemplate
unsigned int getDepth() const {return DEPTH_ADDR;}
unsigned int getNBX() const {return DEPTH_BX;}

NEntryT getEntries(BunchXingT bx) const {
NEntryT getEntries(const BunchXingT& bx) const {
#pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0
return nentries_[bx];
}
Expand All @@ -68,105 +68,14 @@ class MemoryTemplate

const DataType (&get_mem() const)[DEPTH_BX][DEPTH_ADDR] {return dataarray_;}

DataType read_mem(BunchXingT ibx, ap_uint<NBIT_ADDR> index) const
DataType read_mem(const BunchXingT& ibx, const ap_uint<NBIT_ADDR> &index) const
{
// TODO: check if valid
if(!NBIT_BX) ibx = 0;
if(!NBIT_BX) assert(ibx == 0);
return dataarray_[ibx][index];
}
/*
template<class SpecType>
bool write_mem(SpecType data)
{
#pragma HLS inline
const NEntryT addr_index =
#ifdef __SYNTHESIS__
0;
#else
nentries_[write_bx_];
#endif
return write_mem(data,addr_index);
}
*/
/*
template<class SpecType>
bool write_mem(SpecType data, NEntryT addr_index)
{
#pragma HLS inline
if(!NBIT_BX) write_bx_ = 0;
static_assert(
std::is_same<DataType, SpecType>::value
|| (std::is_same<DataType, AllStub<DISK> >::value && std::is_same<SpecType, AllStub<DISKPS> >::value)
|| (std::is_same<DataType, AllStub<DISK> >::value && std::is_same<SpecType, AllStub<DISK2S> >::value)
, "Invalid conversion between data types");
DataType sameData(data.raw());
return write_mem(sameData,addr_index);
}
*/

/*
bool write_mem(DataType data)
{
#pragma HLS inline
const NEntryT addr_index =
#ifdef __SYNTHESIS__
0;
#else
nentries_[write_bx_];
#endif
return write_mem(data,addr_index);
}
*/

/*
bool write_mem(DataType data)
{
#pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0
#pragma HLS inline
if(!NBIT_BX) write_bx_ = 0;
if (nentries_[write_bx_] < DEPTH_ADDR) {
#if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH
//The vhd memory implementation will write to the correct address!!
dataarray_[write_bx_][0] = data;
#else
dataarray_[write_bx_][nentries_[write_bx_]++] = data;
#endif
//#ifndef __SYNTHESIS__
//nentries_[write_bx_] = addr_index + 1;
//#endif
return true;
} else {
return false;
}
}
*/
/*
bool write_mem_new(DataType data, ap_uint<1> overwrite=0)
{
#pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0
#pragma HLS inline
if(!NBIT_BX) write_bx_ = 0;
if (nentries_[write_bx_] < DEPTH_ADDR) {
#if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH
//The vhd memory implementation will write to the correct address!!
dataarray_[write_bx_][0] = data;
#else
if(overwrite == 0) {
dataarray_[write_bx_][nentries_[write_bx_]++] = data;
} else {
dataarray_[write_bx_][nentries_[write_bx_]-1] = data;
}
#endif
return true;
} else {
return false;
}
}
*/

bool write_mem(DataType data, ap_uint<1> overwrite=0)
bool write_mem(const DataType& data, ap_uint<1> overwrite=0)
{
#pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0
#pragma HLS inline
Expand Down Expand Up @@ -208,18 +117,6 @@ class MemoryTemplate
}
}
}
/*
// write memory from text file
bool write_mem(const char* datastr, int base=16)
{
if(!NBIT_BX) write_bx_ = 0;
DataType data(datastr, base);
NEntryT nent = nentries_[write_bx_];
bool success = write_mem(data, nent);
return success;
}
*/

bool write_mem(const std::vector<std::string>& split_line, int base=16) {
assert(split_line.size()==3);
Expand All @@ -229,18 +126,18 @@ class MemoryTemplate
}

// print memory contents
void print_data(const DataType data) const
void print_data(const DataType& data) const
{
edm::LogVerbatim("L1trackHLS") << std::hex << data.raw() << std::endl;
// TODO: overload '<<' in data class
}

void print_entry(BunchXingT bx, NEntryT index) const
void print_entry(const BunchXingT& bx, NEntryT index) const
{
print_data(dataarray_[bx][index]);
}

void print_mem(BunchXingT bx) const
void print_mem(const BunchXingT& bx) const
{
for (unsigned int i = 0; i < nentries_[bx]; ++i) {
edm::LogVerbatim("L1trackHLS") << bx << " " << i << " ";
Expand Down
71 changes: 27 additions & 44 deletions TrackletAlgorithm/MemoryTemplateBinnedCM.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,10 @@
#endif
#endif

#include <iostream>
#include <string>
#include <vector>

//This is a bit of a hack, but until we find a cleaner
//way to implement this we will use this...
#include "SynthesisOptions.h"
Expand Down Expand Up @@ -82,23 +86,23 @@ class MemoryTemplateBinnedCM{
write_bx_ = ibx;
}

NEntryT getEntries(BunchXingT bx, ap_uint<NBIT_BIN> slot) const {
NEntryT getEntries(const BunchXingT& bx, ap_uint<NBIT_BIN> slot) const {
ap_uint<kNBitsRZBinCM> ibin;
ap_uint<kNBitsphibinCM> ireg;
(ireg,ibin)=slot;
return nentries_[bx][ibin].range(ireg*4+3,ireg*4);
}

ap_uint<64> getEntries(BunchXingT bx, ap_uint<kNBitsRZBinCM> ibin) const {
ap_uint<64> getEntries(const BunchXingT& bx, ap_uint<kNBitsRZBinCM> ibin) const {
return nentries_[bx*(1<<kNBitsRZBinCM)+ibin];
}

ap_uint<8> getBinMask8(BunchXingT bx, ap_uint<kNBitsRZBinCM> ibin) const {
ap_uint<8> getBinMask8(const BunchXingT& bx, ap_uint<kNBitsRZBinCM> ibin) const {
#pragma HLS ARRAY_PARTITION variable=binmask8_ complete dim=0
return binmask8_[bx][ibin];
}

NEntryT getEntries(BunchXingT bx) const {
NEntryT getEntries(const BunchXingT& bx) const {
NEntryT val = 0;
for ( auto i = 0; i < getDepth(); ++i ) {
val += getEntries(bx, i);
Expand All @@ -118,22 +122,22 @@ class MemoryTemplateBinnedCM{
}
#endif

DataType read_mem(unsigned int icopy, BunchXingT ibx, ap_uint<NBIT_ADDR> index) const {
DataType read_mem(unsigned int icopy, const BunchXingT& ibx, ap_uint<NBIT_ADDR> index) const {
#pragma HLS ARRAY_PARTITION variable=dataarray_ dim=1
// TODO: check if valid
if (isCMSSW) {ibx = 0; icopy = 0;}
if (isCMSSW) {assert(ibx == 0 && icopy == 0);}
return dataarray_[icopy][ibx][index];
}

DataType read_mem(unsigned int icopy, BunchXingT ibx, ap_uint<NBIT_BIN> slot,
ap_uint<NBIT_ADDR> index) const {
DataType read_mem(unsigned int icopy, const BunchXingT& ibx,
ap_uint<NBIT_BIN> slot, ap_uint<NBIT_ADDR> index) const {
#pragma HLS ARRAY_PARTITION variable=dataarray_ dim=1
// TODO: check if valid
if (isCMSSW) {ibx = 0; icopy = 0;}
if (isCMSSW) {assert(ibx == 0 && icopy == 0);}
return dataarray_[icopy][ibx][getNEntryPerBin()*slot+index];
}

bool write_mem(ap_uint<NBIT_BIN> slot, DataType data) {
bool write_mem(ap_uint<NBIT_BIN> slot, const DataType& data) {
#pragma HLS ARRAY_PARTITION variable=dataarray_ dim=1
#pragma HLS ARRAY_PARTITION variable=binmask8_ complete dim=0
#pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0
Expand All @@ -142,12 +146,11 @@ class MemoryTemplateBinnedCM{
if (isCMSSW && !NBIT_BX) {write_bx_ = 0;}

#if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH

//The vhdl implementation will write to the correct address
dataarray_[0][write_bx_][getNEntryPerBin()*slot] = data;

#else

// write address for slot: getNEntryPerBin() * slot + nentry_ibx

ap_uint<kNBitsRZBinCM> ibin;
ap_uint<kNBitsphibinCM> ireg;
Expand Down Expand Up @@ -185,17 +188,20 @@ class MemoryTemplateBinnedCM{

DataType data("0",16);
for (size_t ibx=0; ibx<(kNBxBins); ++ibx) {
for (size_t icopy=0; icopy < NCP; icopy++) {
for (size_t ibin=0; ibin < kNMemDepth; ibin++) {
for (size_t ibin=0; ibin < (1<<kNBitsRZBinCM); ibin++) {
binmask8_[ibx][ibin] = 0;
}
for (size_t ibin=0; ibin < kNMemDepth; ibin++) {
for (size_t icopy=0; icopy < NCP; icopy++) {
dataarray_[icopy][ibx][ibin] = data;
}
}
// Clear nentries and binmask8
for (unsigned int ibin = 0; ibin < getNBins()/8; ++ibin) {
nentries_[ibx*kNBinsRZ+ibin] = 0;
binmask8_[ibx][ibin] = 0;
}
}

for (size_t ibin=0; ibin < slots; ibin++) {
nentries_[ibin] = 0;
}

}

// write memory from text file
Expand All @@ -218,40 +224,17 @@ class MemoryTemplateBinnedCM{


// print memory contents
void print_data(const DataType data) const
void print_data(const DataType& data) const
{
edm::LogVerbatim("L1trackHLS") << std::hex << data.raw() << std::endl;
// TODO: overload '<<' in data class
}

void print_entry(BunchXingT bx, ap_uint<NBIT_ADDR> index) const
void print_entry(const BunchXingT& bx, ap_uint<NBIT_ADDR> index) const
{
print_data(dataarray_[bx][index]);
}

//These are broken - comment out for now (ryd, 2024-10-27)
/*
void print_mem(BunchXingT bx) const {
for(unsigned int ibin=0;ibin<8;ibin++) {
for(unsigned int ireg=0;ireg<8;ireg++) {
for (unsigned int i = 0; i < nentries_[ibx*kNBinsRZ+ibin].range(ireg*4+3,ireg*4); ++i) {
edm::LogVerbatim("L1trackHLS") << bx << " " << i << " ";
print_entry(bx, i + slot*getNEntryPerBin() );
}
}
}
}
void print_mem() const {
for (unsigned int ibx = 0; ibx < kNBxBins; ++ibx) {
for (unsigned int i = 0; i < 8; ++i) {
edm::LogVerbatim("L1trackHLS") << ibx << " " << i << " ";
print_entry(ibx,i);
}
}
}
*/

static constexpr int getWidth() {return DataType::getWidth();}

#endif
Expand Down
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