T1Emu Verilator Daily Regression

T1Emu Verilator Daily Regression #176

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Triggered via schedule January 9, 2025 22:33

sequencer

master

Status Success

Total duration 5m 0s

Artifacts –

verilator.yml

on: schedule

Generate test plan

Matrix: Build Verilator Emulators

Matrix: Build verilator trace emulators

Prepare for running testcases

Matrix: Run testcases

Report CI result