Merge pull request #306 from antmicro/pin-fusesoc

Pin fusesoc version
chipsalliance · Jan 10, 2022 · ed89c3a · ed89c3a
2 parents ab55e05 + 0a41a86
commit ed89c3a
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/uhdm-tests/swerv/Makefile.in b/uhdm-tests/swerv/Makefile.in
@@ -14,21 +14,21 @@ ${DESIGN_DIR}/.gitpatch:
 uhdm/yosys/swerv: clean-build | ${VENV} ${DESIGN_DIR}/.gitpatch
 	(export PATH=${root_dir}/../image/bin:${PATH} && \
 		. ${VENV}/bin/activate && \
-		pip install fusesoc && \
 		pip install -I git+https://github.com/antmicro/edalize@uhdm_support && \
+		pip install git+https://github.com/lowRISC/fusesoc.git@ot && \
 		fusesoc --cores-root=${DESIGN_DIR} run --build --tool yosys --target=synth chipsalliance.org:cores:SweRV_EH1:1.8)
 
 uhdm/yosys/swerv-build: clean-build | ${VENV} ${DESIGN_DIR}/.gitpatch
 	(export PATH=${root_dir}/../image/bin:${PATH} && \
 		. ${VENV}/bin/activate && \
-		pip install fusesoc && \
 		pip install -I git+https://github.com/antmicro/edalize@uhdm_support && \
+		pip install git+https://github.com/lowRISC/fusesoc.git@ot && \
 		fusesoc --cores-root=${DESIGN_DIR} run --build --tool vivado --target=synth chipsalliance.org:cores:SweRV_EH1:1.8)
 
 uhdm/sv2v/swerv: clean-build | ${VENV}
 	(export PATH=${root_dir}/../image/bin:${PATH} && \
 		. ${VENV}/bin/activate && \
-		pip install fusesoc && \
 		pip install -I git+https://github.com/antmicro/edalize@uhdm_support && \
+		pip install git+https://github.com/lowRISC/fusesoc.git@ot && \
 		fusesoc --cores-root=${DESIGN_DIR} run --build --tool sv2v --target=synth chipsalliance.org:cores:SweRV_EH1:1.8)