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Build(deps): Bump third_party/OpenROAD-flow-scripts from 62325bf to a80f70e #5723

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Build(deps): Bump third_party/OpenROAD-flow-scripts from 62325bf to a80f70e

Build(deps): Bump third_party/OpenROAD-flow-scripts from 62325bf to a80f70e #5723

Triggered via pull request July 9, 2024 13:15
@kamilrakoczykamilrakoczy
synchronize #2480
dependabot/submodules/third_party/OpenROAD-flow-scripts-a80f70e
Status Failure
Total duration 1h 47m 40s
Artifacts 21

main.yml

on: pull_request
Matrix: build-binaries
Build sv2v
1m 52s
Build sv2v
Emit Workflow Info
0s
Emit Workflow Info
Style check
1m 45s
Style check
Test "Installation from source" from README
54m 5s
Test "Installation from source" from README
Upload GHA event file
3s
Upload GHA event file
Parsing Tests  /  SystemVerilog Plugin
34m 49s
Parsing Tests / SystemVerilog Plugin
Matrix: Large Designs Tests / opentitan_parse_report
Large Designs Tests  /  Ibex (Vivado synthesis)
6m 30s
Large Designs Tests / Ibex (Vivado synthesis)
Large Designs Tests  /  Ibex (F4PGA synthesis)
11m 15s
Large Designs Tests / Ibex (F4PGA synthesis)
Large Designs Tests  /  Opentitan 9d82960888 (synthesis)
1h 39m
Large Designs Tests / Opentitan 9d82960888 (synthesis)
Large Designs Tests  /  Opentitan (synthesis)
1h 18m
Large Designs Tests / Opentitan (synthesis)
Large Designs Tests  /  VeeR-EH1 (synthesis)
6m 14s
Large Designs Tests / VeeR-EH1 (synthesis)
Large Designs Tests  /  Black Parrot (AMD (Xilinx) FPGA synthesis)
17m 8s
Large Designs Tests / Black Parrot (AMD (Xilinx) FPGA synthesis)
Large Designs Tests  /  Black Parrot (ASIC synthesis)
9m 33s
Large Designs Tests / Black Parrot (ASIC synthesis)
Parsing Tests  /  Surelog
23m 10s
Parsing Tests / Surelog
Diff generated BSG Micro Designs tests  /  Parse and diff BSG Micro Designs
10m 35s
Diff generated BSG Micro Designs tests / Parse and diff BSG Micro Designs
Test With Packaged Yosys
2m 11s
Test With Packaged Yosys
Test With Bundled Yosys
2m 59s
Test With Bundled Yosys
Matrix: Formal Verification Tests / tests-formal-verification
Parsing Tests  /  Generate AST diff
5m 5s
Parsing Tests / Generate AST diff
Parsing Tests  /  Summary Generation
1m 32s
Parsing Tests / Summary Generation
Formal Verification Tests  /  Passlist Check
1m 20s
Formal Verification Tests / Passlist Check
Release Package
0s
Release Package
Release Package Installation Test
0s
Release Package Installation Test
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Annotations

2 errors and 5 warnings
Large Designs Tests / Black Parrot (ASIC synthesis)
Process completed with exit code 2.
Large Designs Tests / Opentitan 9d82960888 (synthesis)
Process completed with exit code 2.
Upload GHA event file
The following actions uses node12 which is deprecated and will be forced to run on node16: actions/upload-artifact@v2. For more info: https://github.blog/changelog/2023-06-13-github-actions-all-actions-will-run-on-node16-instead-of-node12-by-default/
Upload GHA event file
The following actions uses Node.js version which is deprecated and will be forced to run on node20: actions/upload-artifact@v2. For more info: https://github.blog/changelog/2024-03-07-github-actions-all-actions-will-run-on-node20-instead-of-node16-by-default/
Large Designs Tests / VeeR-EH1 (synthesis)
No files were found with the provided path: tests/build/chipsalliance.org_cores_VeeR_EH1_1.9/synth-vivado/chipsalliance.org_cores_VeeR_EH1_1.9.edif. No artifacts will be uploaded.
Diff generated BSG Micro Designs tests / Parse and diff BSG Micro Designs
Some generated tests differ from the reference or were not generated at all. Check the test statuses in the workflow summary or `bsg_micro_designs_summary.md` in the artifacts.
Deprecation notice: v1, v2, and v3 of the artifact actions
The following artifacts were uploaded using a version of actions/upload-artifact that is scheduled for deprecation: "binaries", "binaries-asan", "binaries-debian", "bp_e_bp_unicore_cfg.edif", "bsg-logs", "bsg-outputs", "event.json", "formal-verification-logs", "formal-verification-tests-list", "lowrisc_ibex_top_artya7_surelog_0.1.bit", "lowrisc_systems_custom_tiny_chip_custom_tiny_nexysvideo_0.1.edif", "opentitan-logs-full", "opentitan-logs-quick", "parsing_read-systemverilog_logs", "parsing_read-systemverilog_yosys-sv", "parsing_read-uhdm_logs", "parsing_read-uhdm_yosys-sv", "parsing_test-results", "plots", "sv2v", "top_artya7.bit". Please update your workflow to use v4 of the artifact actions. Learn more: https://github.blog/changelog/2024-04-16-deprecation-notice-v3-of-the-artifact-actions/

Artifacts

Produced during runtime
Name Size
binaries Expired
129 MB
binaries-asan Expired
1.02 GB
binaries-debian Expired
129 MB
bp_e_bp_unicore_cfg.edif Expired
60.3 MB
bsg-logs Expired
86.8 MB
bsg-outputs Expired
13.5 MB
event.json Expired
32.5 KB
formal-verification-logs Expired
630 MB
formal-verification-tests-list Expired
55.3 KB
lowrisc_ibex_top_artya7_surelog_0.1.bit Expired
2.09 MB
lowrisc_systems_custom_tiny_chip_custom_tiny_nexysvideo_0.1.edif Expired
222 MB
opentitan-logs-full Expired
165 MB
opentitan-logs-quick Expired
39.2 MB
parsing_read-systemverilog_logs Expired
15.2 MB
parsing_read-systemverilog_yosys-sv Expired
333 KB
parsing_read-uhdm_logs Expired
16.9 MB
parsing_read-uhdm_yosys-sv Expired
346 KB
parsing_test-results Expired
20.9 KB
plots Expired
21.4 MB
sv2v Expired
8.42 MB
top_artya7.bit Expired
2.09 MB