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Nightly Release

Nightly Release #507

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Nightly Release

Nightly Release #507

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Job Run time
Find Latest Release
28s
FPGA Suite (1.0, etrng, nolog) / build_test_binaries
3m 35s
FPGA Suite (1.0, etrng, log) / check_cache
12s
FPGA Suite (1.0, etrng, nolog) / check_cache
16s
FPGA Suite (1.0, etrng, log) / build_test_binaries
3m 35s
FPGA Suite (1.0, itrng, log) / build_test_binaries
3m 33s
FPGA Suite (1.0, itrng, log) / check_cache
22s
FPGA Suite (1.0, itrng, nolog) / build_test_binaries
3m 27s
FPGA Suite (1.0, itrng, nolog) / check_cache
11s
FPGA Suite (1.1, etrng, log) / build_test_binaries
3m 33s
FPGA Suite (1.1, etrng, log) / check_cache
11s
FPGA Suite (1.1, etrng, nolog) / build_test_binaries
3m 32s
FPGA Suite (1.1, etrng, nolog) / check_cache
23s
FPGA Suite (1.1, itrng, log) / build_test_binaries
3m 34s
FPGA Suite (1.1, itrng, log) / check_cache
23s
FPGA Suite (1.1, itrng, nolog) / build_test_binaries
3m 34s
FPGA Suite (1.1, itrng, nolog) / check_cache
14s
FPGA Suite (hw-latest, etrng, log) / build_test_binaries
3m 35s
FPGA Suite (hw-latest, etrng, log) / check_cache
22s
FPGA Suite (hw-latest, etrng, nolog) / build_test_binaries
3m 36s
FPGA Suite (hw-latest, etrng, nolog) / check_cache
13s
FPGA Suite (hw-latest, itrng, log) / build_test_binaries
3m 34s
FPGA Suite (hw-latest, itrng, log) / check_cache
23s
FPGA Suite (hw-latest, itrng, nolog) / build_test_binaries
3m 37s
FPGA Suite (hw-latest, itrng, nolog) / check_cache
11s
sw-emulator Suite (etrng, log) / build_and_test
21m 52s
sw-emulator Suite (etrng, nolog) / build_and_test
20m 44s
sw-emulator Suite (itrng, nolog) / build_and_test
21m 29s
sw-emulator Suite (itrng, log) / build_and_test
22m 0s
sw-emulator Suite (etrng, log) / build_and_test
20m 48s
sw-emulator Suite (etrng, nolog) / build_and_test
19m 43s
sw-emulator Suite (itrng, log) / build_and_test
20m 58s
sw-emulator Suite (itrng, nolog) / build_and_test
20m 1s
sw-emulator Suite (etrng, log) / build_and_test
20m 35s
sw-emulator Suite (etrng, nolog) / build_and_test
19m 42s
sw-emulator Suite (itrng, log) / build_and_test
20m 22s
sw-emulator Suite (itrng, nolog) / build_and_test
20m 6s
FPGA Suite (1.0, itrng, nolog) / build_bitstream
0s
FPGA Suite (1.0, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, etrng, log) / build_bitstream
0s
FPGA Suite (1.1, etrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, etrng, log) / build_bitstream
0s
FPGA Suite (1.0, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (hw-latest, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, itrng, nolog) / build_bitstream
0s
FPGA Suite (1.1, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, nolog) / build_bitstream
0s
FPGA Suite (1.0, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.0, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, itrng, log) / build_bitstream
0s
FPGA Suite (1.1, itrng, log) / build_kernel_modules
0s
FPGA Suite (1.1, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, itrng, log) / build_bitstream
0s
FPGA Suite (1.0, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, etrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, itrng, log) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, log) / build_bitstream
0s
FPGA Suite (1.1, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, log) / build_bitstream
0s
FPGA Suite (hw-latest, etrng, log) / build_kernel_modules
0s
FPGA Suite (hw-latest, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, log) / test_artifacts
0s
FPGA Suite (1.0, itrng, nolog) / test_artifacts
0s
FPGA Suite (1.0, etrng, nolog) / test_artifacts
0s
FPGA Suite (1.0, itrng, log) / test_artifacts
0s
FPGA Suite (1.1, etrng, nolog) / test_artifacts
43m 59s
FPGA Suite (1.1, etrng, log) / test_artifacts
44m 21s
FPGA Suite (1.1, itrng, nolog) / test_artifacts
44m 48s
FPGA Suite (1.1, itrng, log) / test_artifacts
45m 33s
FPGA Suite (hw-latest, etrng, log) / test_artifacts
44m 12s
FPGA Suite (hw-latest, itrng, log) / test_artifacts
45m 13s
FPGA Suite (hw-latest, etrng, nolog) / test_artifacts
43m 36s
FPGA Suite (hw-latest, itrng, nolog) / test_artifacts
44m 40s
Create New Release
0s
Publish https://caliptra-sw.github.io/
0s
10h 51m 16s