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Nightly Release

Nightly Release #462

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Nightly Release

Nightly Release #462

Run time

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Job Run time
Find Latest Release
12s
FPGA Suite (1.0, etrng, log) / build_test_binaries
3m 10s
FPGA Suite (1.0, etrng, log) / check_cache
20s
FPGA Suite (1.0, etrng, nolog) / check_cache
12s
FPGA Suite (1.0, etrng, nolog) / build_test_binaries
3m 20s
FPGA Suite (1.0, itrng, log) / build_test_binaries
3m 30s
FPGA Suite (1.0, itrng, log) / check_cache
12s
FPGA Suite (1.0, itrng, nolog) / build_test_binaries
3m 17s
FPGA Suite (1.0, itrng, nolog) / check_cache
12s
FPGA Suite (1.1, etrng, log) / build_test_binaries
3m 17s
FPGA Suite (1.1, etrng, log) / check_cache
12s
FPGA Suite (1.1, etrng, nolog) / build_test_binaries
3m 21s
FPGA Suite (1.1, etrng, nolog) / check_cache
11s
FPGA Suite (1.1, itrng, log) / build_test_binaries
3m 31s
FPGA Suite (1.1, itrng, log) / check_cache
12s
FPGA Suite (1.1, itrng, nolog) / build_test_binaries
3m 15s
FPGA Suite (1.1, itrng, nolog) / check_cache
12s
FPGA Suite (hw-latest, etrng, log) / build_test_binaries
3m 24s
FPGA Suite (hw-latest, etrng, log) / check_cache
14s
FPGA Suite (hw-latest, etrng, nolog) / check_cache
13s
FPGA Suite (hw-latest, itrng, log) / build_test_binaries
26s
FPGA Suite (hw-latest, itrng, log) / check_cache
14s
FPGA Suite (hw-latest, etrng, nolog) / build_test_binaries
4m 57s
FPGA Suite (hw-latest, itrng, nolog) / build_test_binaries
4m 54s
FPGA Suite (hw-latest, itrng, nolog) / check_cache
17s
sw-emulator Suite (etrng, log) / build_and_test
20m 10s
sw-emulator Suite (etrng, nolog) / build_and_test
20m 0s
sw-emulator Suite (itrng, log) / build_and_test
20m 51s
sw-emulator Suite (itrng, nolog) / build_and_test
19m 50s
sw-emulator Suite (etrng, log) / build_and_test
19m 58s
sw-emulator Suite (etrng, nolog) / build_and_test
19m 20s
sw-emulator Suite (itrng, nolog) / build_and_test
19m 31s
sw-emulator Suite (etrng, log) / build_and_test
19m 53s
sw-emulator Suite (itrng, log) / build_and_test
19m 58s
sw-emulator Suite (etrng, nolog) / build_and_test
19m 27s
sw-emulator Suite (itrng, log) / build_and_test
20m 2s
sw-emulator Suite (itrng, nolog) / build_and_test
19m 32s
FPGA Suite (1.1, etrng, log) / build_bitstream
0s
FPGA Suite (1.1, etrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, etrng, nolog) / build_bitstream
0s
FPGA Suite (1.0, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.0, itrng, log) / build_bitstream
0s
FPGA Suite (1.0, itrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, itrng, nolog) / build_bitstream
0s
FPGA Suite (1.0, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, etrng, nolog) / build_bitstream
0s
FPGA Suite (1.1, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, itrng, log) / build_bitstream
0s
FPGA Suite (1.1, itrng, log) / build_kernel_modules
0s
FPGA Suite (1.1, itrng, nolog) / build_bitstream
0s
FPGA Suite (1.1, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, log) / build_bitstream
0s
FPGA Suite (hw-latest, etrng, log) / build_kernel_modules
0s
FPGA Suite (hw-latest, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, log) / build_bitstream
0s
FPGA Suite (hw-latest, itrng, log) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, log) / build_bitstream
0s
FPGA Suite (1.0, etrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, log) / test_artifacts
0s
FPGA Suite (1.0, etrng, log) / test_artifacts
57m 58s
FPGA Suite (1.0, etrng, nolog) / test_artifacts
58m 15s
FPGA Suite (1.0, itrng, nolog) / test_artifacts
58m 29s
FPGA Suite (1.1, itrng, nolog) / test_artifacts
48m 6s
FPGA Suite (1.1, etrng, log) / test_artifacts
47m 50s
FPGA Suite (1.1, etrng, nolog) / test_artifacts
46m 55s
FPGA Suite (hw-latest, etrng, log) / test_artifacts
46m 26s
FPGA Suite (1.0, itrng, log) / test_artifacts
1h 1m 56s
FPGA Suite (1.1, itrng, log) / test_artifacts
48m 29s
FPGA Suite (hw-latest, itrng, nolog) / test_artifacts
44m 57s
FPGA Suite (hw-latest, etrng, nolog) / test_artifacts
44m 3s
Create New Release
0s
Publish https://caliptra-sw.github.io/
0s
14h 5m 11s