work in progress, adds eeprom_direct lcov

chillfig · Aug 9, 2024 · b0860f5 · b0860f5
1 parent 66416e2
commit b0860f5
Showing 1 changed file with 76 additions and 16 deletions.
diff --git a/unit-test-coverage/modules/eeprom_direct/coveragetest-eeprom_direct.c b/unit-test-coverage/modules/eeprom_direct/coveragetest-eeprom_direct.c
@@ -43,31 +43,90 @@
 #include "cfe_psp_config.h"
 #include "cfe_psp_module.h"
 
+#define UT_RAMBLOCK_SIZE 32
+
+static union
+{
+    uint8  u8[UT_RAMBLOCK_SIZE];
+    uint16 u16[UT_RAMBLOCK_SIZE / sizeof(uint16)];
+    uint32 u32[UT_RAMBLOCK_SIZE / sizeof(uint32)];
+} UT_RAM_BLOCK;
+
 extern void eeprom_direct_Init(uint32 PspModuleId);
 
+/*
+ * --------------------------------------------
+ * TEST FUNCTIONS
+ * --------------------------------------------
+ */
+
+/* ********************************
+ * eeprom_direct_Init
+ * ********************************/
 void Test_eeprom_direct_Init(void)
 {
-    /*
-    void eeprom_direct_Init(uint32 PspModuleId)
-    */
-
+    /* Test For:
+     * void eeprom_direct_Init(uint32 PspModuleId)
+     */
     UtAssert_VOIDCALL(eeprom_direct_Init(1));
 }
 
-void Test_CFE_PSP_EepromWrite32(void)
+/* ********************************
+ * CFE_PSP_EepromWrite32
+ * ********************************/
+void Test_CFE_PSP_EepromWrite32_Nominal(void)
 {
-    /*
-    int32 CFE_PSP_EepromWrite32(cpuaddr MemoryAddress, uint32 uint32Value)
-    */
-    UtAssert_INT32_EQ(CFE_PSP_EepromWrite32(0, 1), CFE_PSP_SUCCESS);
+    /* Arrange */
+    cpuaddr UtAddress;
+    uint32 writevalue;
+
+    UtAddress = (cpuaddr)&UT_RAM_BLOCK.u32[0] + 1;
+    writevalue = 0x12345678;
+
+    /* Act */
+    UtAssert_INT32_EQ(CFE_PSP_EepromWrite32(UtAddress, writevalue), CFE_PSP_SUCCESS);
+
+    /* Assert */
+    UtAssert_INT32_EQ(*((uint32 *)UtAddress), writevalue);
 }
 
-void Test_CFE_PSP_EepromWrite16(void)
+void Test_CFE_PSP_EepromWrite32_AddressMisaligned(void)
 {
-    /*
-    int32 CFE_PSP_EepromWrite16(cpuaddr MemoryAddress, uint16 uint16Value)
-    */
-    UtAssert_INT32_EQ(CFE_PSP_EepromWrite16(0, 1), CFE_PSP_SUCCESS);
+    /* Arrange */
+    cpuaddr UtAddress;
+    uint32 writevalue;
+
+    UtAddress = (cpuaddr)&UT_RAM_BLOCK.u32[1];
+    writevalue = 0x12345678;
+
+    /* Act */
+    UtAssert_INT32_EQ(CFE_PSP_EepromWrite32(UtAddress, writevalue), CFE_PSP_ERROR_ADDRESS_MISALIGNED);
+}
+
+/* ********************************
+ * CFE_PSP_EepromWrite16
+ * ********************************/
+void Test_CFE_PSP_EepromWrite16_Nominal(void)
+{
+    /* Arrange */
+    cpuaddr UtAddress = (cpuaddr)&UT_RAM_BLOCK.u16[4];
+    uint32 writevalue = 0x12345678;
+
+    /* Act */
+    UtAssert_INT32_EQ(CFE_PSP_EepromWrite16(UtAddress, writevalue), CFE_PSP_SUCCESS);
+
+    /* Assert */
+    UtAssert_INT32_EQ(*((uint32 *)UtAddress), writevalue);
+}
+
+void Test_CFE_PSP_EepromWrite16_AddressMisaligned(void)
+{
+    /* Arrange */
+    cpuaddr UtAddress = (cpuaddr)&UT_RAM_BLOCK.u16[5];
+    uint32 writevalue = 0x12345678;
+
+    /* Act */
+    UtAssert_INT32_EQ(CFE_PSP_EepromWrite16(UtAddress, writevalue), CFE_PSP_ERROR_ADDRESS_MISALIGNED);
 }
 
 void Test_CFE_PSP_EepromWrite8(void)
@@ -121,8 +180,9 @@ void Test_CFE_PSP_EepromPowerDown(void)
 void UtTest_Setup(void)
 {
     ADD_TEST(Test_eeprom_direct_Init);
-    ADD_TEST(Test_CFE_PSP_EepromWrite32);
-    ADD_TEST(Test_CFE_PSP_EepromWrite16);
+    ADD_TEST(Test_CFE_PSP_EepromWrite32_Nominal);
+    ADD_TEST(Test_CFE_PSP_EepromWrite32_AddressMisaligned);
+    ADD_TEST(Test_CFE_PSP_EepromWrite16_Nominal);
     ADD_TEST(Test_CFE_PSP_EepromWrite8);
     ADD_TEST(Test_CFE_PSP_EepromWriteEnable);
     ADD_TEST(Test_CFE_PSP_EepromWriteDisable);