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#5 - Change wire index to option
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ekrembal committed Nov 28, 2023
1 parent 6e858b6 commit c38eda9
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Showing 4 changed files with 20 additions and 20 deletions.
4 changes: 2 additions & 2 deletions src/circuit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ impl CircuitTrait for Circuit {
combined_inputs.extend(a);
}
for (i, value) in combined_inputs.iter().enumerate() {
self.wires[i].try_borrow_mut().unwrap().selector = Some(value.clone());
self.wires[i].try_borrow_mut().unwrap().selector = Some(*value);
}
//self.gates[0].set_input_wires();
//self.wires[0].try_borrow_mut().unwrap().selector = Some(true);
Expand All @@ -63,7 +63,7 @@ impl CircuitTrait for Circuit {
output_index += os;
output.push(output_vec);
}
return output;
output
}

fn from_bristol(file: &str) -> Self {
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12 changes: 6 additions & 6 deletions src/gates.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@ pub struct NotGate {

impl NotGate {
pub fn new(input_wires: Vec<Rc<RefCell<Wire>>>, output_wires: Vec<Rc<RefCell<Wire>>>) -> Self {
return NotGate {
NotGate {
input_wires,
output_wires,
}
Expand Down Expand Up @@ -39,7 +39,7 @@ impl GateTrait for NotGate {
}

fn print(&self) -> String {
return format!("Gate[]: {:?}, {:?}, {:?}", self.input_wires[0], self.input_wires[1], self.output_wires[0]);
format!("Gate[]: {:?}, {:?}, {:?}", self.input_wires[0], self.input_wires[1], self.output_wires[0])
}
}

Expand All @@ -50,7 +50,7 @@ pub struct AndGate {

impl AndGate {
pub fn new(input_wires: Vec<Rc<RefCell<Wire>>>, output_wires: Vec<Rc<RefCell<Wire>>>) -> Self {
return AndGate {
AndGate {
input_wires,
output_wires,
}
Expand All @@ -77,7 +77,7 @@ impl GateTrait for AndGate {
}

fn print(&self) -> String {
return format!("Gate[]: {:?}, {:?}, {:?}", self.input_wires[0], self.input_wires[1], self.output_wires[0]);
format!("Gate[]: {:?}, {:?}, {:?}", self.input_wires[0], self.input_wires[1], self.output_wires[0])
}
}

Expand All @@ -88,7 +88,7 @@ pub struct XorGate {

impl XorGate {
pub fn new(input_wires: Vec<Rc<RefCell<Wire>>>, output_wires: Vec<Rc<RefCell<Wire>>>) -> Self {
return XorGate {
XorGate {
input_wires,
output_wires,
}
Expand All @@ -115,6 +115,6 @@ impl GateTrait for XorGate {
}

fn print(&self) -> String {
return format!("Gate[]: {:?}, {:?}, {:?}", self.input_wires[0], self.input_wires[1], self.output_wires[0]);
format!("Gate[]: {:?}, {:?}, {:?}", self.input_wires[0], self.input_wires[1], self.output_wires[0])
}
}
4 changes: 2 additions & 2 deletions src/utils.rs
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ pub fn number_to_bool_array(number: usize, length: usize) -> Vec<bool> {
for i in 0..length {
v.push(0 != number & (1 << i));
}
return v;
v
}

pub fn bool_array_to_number(bool_array: Vec<bool>) -> usize {
Expand All @@ -26,5 +26,5 @@ pub fn bool_array_to_number(bool_array: Vec<bool>) -> usize {
a += 1;
}
}
return a;
a
}
20 changes: 10 additions & 10 deletions src/wire.rs
Original file line number Diff line number Diff line change
Expand Up @@ -13,18 +13,18 @@ pub struct Wire {
pub preimages: Option<[[u8; 32]; 2]>,
pub hashes: [[u8; 32]; 2],
pub selector: Option<bool>,
pub index: usize,
pub index: Option<usize>,
}

impl Debug for Wire {
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
write!(f, "Wire[{}]: {:?}", self.index, self.selector)
write!(f, "Wire[{:?}]: {:?}", self.index, self.selector)
}
}

impl Default for Wire {
fn default() -> Self {
Self::new()
Self::new(0)
}
}

Expand All @@ -42,19 +42,19 @@ impl Wire {
preimages: Some([preimage1, preimage2]),
hashes: [hash1, hash2],
selector: None,
index,
};
index: Some(index),
}
}
}

impl WireTrait for Wire {
fn generate_anti_contradiction_script(&self) -> ScriptBuf {
Builder::new()
.push_opcode(OP_SHA256)
.push_slice(&self.hashes[0])
.push_slice(self.hashes[0])
.push_opcode(OP_EQUALVERIFY)
.push_opcode(OP_SHA256)
.push_slice(&self.hashes[1])
.push_slice(self.hashes[1])
.push_opcode(OP_EQUAL)
.into_script()
}
Expand All @@ -70,13 +70,13 @@ mod tests {
#[test]
fn test_wire() {
let wire = Wire::new(0);
assert_eq!(wire.preimages.is_some(), true);
assert_eq!(wire.selector.is_none(), true);
assert!(wire.preimages.is_some());
assert!(wire.selector.is_none());
}

#[test]
fn test_generate_anti_contradiction_script() {
let wire = Wire::new();
let wire = Wire::new(0);
let script = wire.generate_anti_contradiction_script();

let preimages_vec = if let Some(preimages) = wire.preimages {
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