Skip to content

Commit

Permalink
cpu: Sprinkled a few cycles
Browse files Browse the repository at this point in the history
Missing cycles were a problem for timing critical disk read/writes

Signed-off-by: Michel Pollet <[email protected]>
  • Loading branch information
buserror committed Feb 12, 2024
1 parent ad86adf commit f9b604c
Showing 1 changed file with 2 additions and 1 deletion.
3 changes: 2 additions & 1 deletion src/mii_65c02.c
Original file line number Diff line number Diff line change
Expand Up @@ -380,6 +380,7 @@ mii_cpu_run(
} break;
case 0x4A:
{ // LSR
_FETCH(cpu->PC);
cpu->P.C = !!(cpu->A & 0x01);
cpu->A >>= 1;
_NZ(cpu->A);
Expand Down Expand Up @@ -534,7 +535,7 @@ mii_cpu_run(
case 0x85: case 0x95: case 0x8D: case 0x9D:
case 0x99: case 0x81: case 0x91: case 0x92:
{ // STA
cpu->_D = cpu->A;
cpu->_D = cpu->A;cpu->cycle++;
} break;
case 0x86: case 0x96: case 0x8E:
{ // STX
Expand Down

0 comments on commit f9b604c

Please sign in to comment.