arm: Support hardware debugging of ARM architecture #15616
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Support hardware debugging of ARM architecture, and support smp mode.We can use "up_debugpoint_add" or "up_debugpoint_remove" to add breakpoints, and the hardware will jump into the interrupt after detecting it. It will not affect our program. Registration callback is not supported yet，the debug of arm32 jumps into the exception vector table, and it is also necessary to develop the jump function of the exception vector table in debug mode TODO: Support singlestep Signed-off-by: wangmingrong1 <[email protected]>
| @@ -43,7 +43,7 @@ CMN_ASRCS += arm_cpuhead.S arm_vectors.S arm_saveusercontext.S | |||
| # Common C source files | |||
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| CMN_CSRCS += arm_cache.c arm_cpuinfo.c arm_dataabort.c | |||
| CMN_CSRCS += arm_doirq.c arm_gicv2.c arm_gicv2_dump.c | |||
| CMN_CSRCS += arm_hwdebug.c arm_doirq.c arm_gicv2.c arm_gicv2_dump.c | |||
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add CONFIG_ARCH_HAVE_DEBUG to control
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I don't think this is necessary because this file is in armv7a and it definitely supports debug functionality
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Or should we add select ARCH_HAVE_DEBUG for the ARMv7a arch
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yes, need select ARCH_HAVE_DEBUG, since gdbstub depend on this.
| @@ -43,7 +43,7 @@ CMN_ASRCS += arm_cpuhead.S arm_vectors.S arm_saveusercontext.S | |||
| # Common C source files | |||
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| CMN_CSRCS += arm_cache.c arm_cpuinfo.c arm_dataabort.c | |||
| CMN_CSRCS += arm_doirq.c arm_gicv2.c arm_gicv2_dump.c | |||
| CMN_CSRCS += arm_hwdebug.c arm_doirq.c arm_gicv2.c arm_gicv2_dump.c | |||
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yes, need select ARCH_HAVE_DEBUG, since gdbstub depend on this.
| #define ARM_ADDBRP_EVENT 0 | ||
| #define ARM_ADDWRP_EVENT 1 | ||
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| /* Accessor macros for the debug registers. */ |
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add blank line after EACH comment
| static int arm_get_num_brp_resources(void) | ||
| { | ||
| uint32_t didr; | ||
| ARM_DBG_READ(c0, c0, 0, didr); |
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let' use cp15 approach which is more elegance:
https://github.com/apache/nuttx/blob/master/arch/arm/include/armv7-a/cp15.h#L71
| static int arm_get_num_brps(void) | ||
| { | ||
| int brps = arm_get_num_brp_resources(); | ||
| return core_has_mismatch_brps() ? brps - 1 : brps; |
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why remove one breakpoint if hardware suport more than one.
| { | ||
| uint32_t didr; | ||
| ARM_DBG_READ(c0, c0, 0, didr); | ||
| return ((didr >> 28) & 0xf) + 1; |
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let's define macro like cp15.h instead using magic number
| (bp->ctrl.len == ARM_BREAKPOINT_LEN_2) ? 2 : | ||
| (bp->ctrl.len == ARM_BREAKPOINT_LEN_4) ? 4 : 8)); | ||
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| memcpy(p, bp, sizeof(struct arm_hw_breakpoint)); |
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move beore line 329 and remove line 333-336
| size = arm_get_num_wrps(); | ||
| } | ||
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| for (i = 0; i < size; i++, p += sizeof(struct arm_hw_breakpoint)) |
| (bp->ctrl.len == ARM_BREAKPOINT_LEN_2) ? 2 : | ||
| (bp->ctrl.len == ARM_BREAKPOINT_LEN_4) ? 4 : 8)); | ||
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| memset(p, 0, sizeof(struct arm_hw_breakpoint)); |
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| bp->ctrl.enabled = 1; | ||
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| if (bp->ctrl.type == ARM_BREAKPOINT_EXECUTE) |
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why not reuse:
#define DEBUGPOINT_NONE 0x00
#define DEBUGPOINT_WATCHPOINT_RO 0x01
#define DEBUGPOINT_WATCHPOINT_WO 0x02
#define DEBUGPOINT_WATCHPOINT_RW 0x03
#define DEBUGPOINT_BREAKPOINT 0x04
#define DEBUGPOINT_STEPPOINT 0x05
| { | ||
| memset(bp, 0, sizeof(struct arm_hw_breakpoint)); | ||
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| bp->addr = (uint32_t)addr; |
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need mask the low 2bits
Note: Please adhere to Contributing Guidelines.
Summary
Support hardware debugging of ARM architecture, and support smp mode
We can use "up_debugpoint_add" or "up_debugpoint_remove" to add breakpoints, and the hardware will jump into the interrupt after detecting it.TODO:
Support singlestep
Impact
It will not affect our program.
Registration callback is not supported yet，the debug of arm32 jumps into the exception vector table, and it is also necessary to develop the jump function of the exception vector table in debug mode
Testing
Use arm32 boards, call "up_debugpoint_add", "up_debugpoint_remove" api, and set the breakpoint address.
log:
DFSR: 00000002 indicates that the abnormal debugging mode is entered