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* Adds arm32 device Adds zynq_7000 - new default arm32 device Adds default kernel and image for arm32 Adds new release tests Updates documentation and readme * Adds arm32 tests to pull-request workflow
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,39 @@ | ||
| :name: Zynq-7000 SoC | ||
| :description: This script runs Linux on Zynq-7000 SoC. | ||
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| using sysbus | ||
| $name?="Zynq" | ||
| mach create $name | ||
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| machine LoadPlatformDescription @action/device/zynq_7000/platform.repl | ||
| showAnalyzer uart0 | ||
| sysbus Redirect 0xC0000000 0x0 0x10000000 | ||
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| $bin?=@images/vmlinux | ||
| $rootfs?=@images/rootfs.cpio | ||
| $dtb?=@images/zynq-test.dtb | ||
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| # Set timer frequency | ||
| ttc0 Frequency 33333333 | ||
| ttc1 Frequency 33333333 | ||
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| # rootfs | ||
| machine LoadPlatformDescriptionFromString 'virtio: Storage.VirtIOBlockDevice @ sysbus 0xe0104000 { IRQ -> gic@63 }' | ||
| virtio LoadImage @images/rootfs.img | ||
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| # This setting increases emulation speed, thus mitigates networks errors and speedup user scripts. | ||
| machine SetAdvanceImmediately true | ||
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| # Set registers | ||
| cpu SetRegisterUnsafe 0 0x000 | ||
| cpu SetRegisterUnsafe 1 0xD32 # processor variant (cortex-a9) | ||
| cpu SetRegisterUnsafe 2 0x100 # device tree address | ||
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| macro reset | ||
| """ | ||
| sysbus LoadELF $bin | ||
| sysbus LoadFdt $dtb 0x100 "console=ttyPS0,115200 root=/dev/ram0 rw init=/init initrd=0x1a000000,32M" false | ||
| sysbus ZeroRange 0x1a000000 0x800000 | ||
| sysbus LoadBinary $rootfs 0x1a000000 | ||
| """ | ||
| runMacro $reset |
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,145 @@ | ||
| usbEhci2: USBDeprecated.EHCIHostController @ sysbus <0xE0003000, +0x1000> | ||
| -> gic@44 | ||
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| usbEhci: USBDeprecated.EHCIHostController @ sysbus <0xE0002000, +0x1000> | ||
| -> gic@21 | ||
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| pl310: Cache.PL310 @ sysbus <0xF8F02000, +0x1000> | ||
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| gem0: Network.CadenceGEM @ sysbus <0xE000B000, +0x1000> | ||
| -> gic@22 | ||
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| gem1: Network.CadenceGEM @ sysbus <0xE000C000, +0x1000> | ||
| -> gic@45 | ||
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| phy: Network.EthernetPhysicalLayer @ gem0 3 | ||
| BasicStatus: 0x62A4 | ||
| Id1: 0x0022 | ||
| Id2: 0x1611 | ||
| AutoNegotiationAdvertisement: 0x1e1 | ||
| AutoNegotiationLinkPartnerBasePageAbility: 0x1e1 | ||
| MasterSlaveControl: 0x300 | ||
| MasterSlaveStatus: 0x3000 | ||
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| uart0: UART.Cadence_UART @ sysbus 0xE0000000 | ||
| -> gic@27 | ||
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| uart1: UART.Cadence_UART @ sysbus 0xE0001000 | ||
| -> gic@50 | ||
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| i2c1: I2C.Cadence_I2C @ sysbus 0xE0005000 | ||
| -> gic@48 | ||
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| i2c0: I2C.Cadence_I2C @ sysbus 0xE0004000 | ||
| -> gic@25 | ||
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| spi0: SPI.Cadence_SPI @ sysbus 0xE0006000 | ||
| -> gic@26 | ||
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| spi1: SPI.Cadence_SPI @ sysbus 0xE0007000 | ||
| -> gic@49 | ||
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| sdhci0: SD.SDHCI @ sysbus <0xE0100000, +0x1000> | ||
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| sdhci1: SD.SDHCI @ sysbus <0xE0101000, +0x1000> | ||
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| memory: Memory.MappedMemory @ sysbus 0x0 | ||
| size: 0x40000000 | ||
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| onChipMemory: Memory.MappedMemory @ sysbus 0xFFFC0000 | ||
| size:0x40000 | ||
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| ttc0: Timers.Cadence_TTC @ sysbus 0xF8001000 | ||
| [0-2] -> gic@[10-12] | ||
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| ttc1: Timers.Cadence_TTC @ sysbus 0xF8002000 | ||
| [0-2] -> gic@[37-39] | ||
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| privateTimer: Timers.CortexAPrivateTimer @ sysbus <0xF8F00600, +0x200> | ||
| -> gic#0@29 | ||
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| globalTimer: Timers.CortexAGlobalTimer @ sysbus 0xF8F00200 | ||
| -> gic#0@27 | ||
| frequency: 433333333 | ||
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| gic: IRQControllers.GIC @ { | ||
| sysbus new Bus.BusMultiRegistration { address: 0xF8F01000; size: 0x1000; region: "distributor" }; | ||
| sysbus new Bus.BusMultiRegistration { address: 0xF8F00100; size: 0x100; region: "cpuInterface" } | ||
| } | ||
| 0 -> cpu@0 | ||
| numberOfCPUs: 1 | ||
| CpuInterfaceImplementer: 0x3901243B | ||
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| scu: Miscellaneous.SnoopControlUnit @ sysbus <0xF8F00000, +0x100> | ||
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| cpu: CPU.Arm @ sysbus | ||
| cpuType: "cortex-a9" | ||
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| qspi: SPI.XilinxQSPI @ sysbus <0xE000D000, +0x1000> | ||
| -> gic@19 | ||
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| gpio: GPIOPort.XilinxGPIOPS @ sysbus 0xE000A000 | ||
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| xadc: Analog.Xilinx_XADC @ sysbus 0xF8007100 | ||
| -> gic@7 | ||
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| armPllCtrl: Python.PythonPeripheral @ sysbus 0xF8000100 | ||
| size: 0x4 | ||
| initable: false | ||
| script: "request.value = 0x0001A008" | ||
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| ddrPllCtrl: Python.PythonPeripheral @ sysbus 0xF8000104 | ||
| size: 0x4 | ||
| initable: false | ||
| script: "request.value = 0x0001A008" | ||
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| ioPllCtrl: Python.PythonPeripheral @ sysbus 0xF8000108 | ||
| size: 0x4 | ||
| initable: false | ||
| script: "request.value = 0x0001A008" | ||
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| pllStatus: Python.PythonPeripheral @ sysbus 0xF800010C | ||
| size: 0x4 | ||
| initable: false | ||
| script: "request.value = 0x0000003F" | ||
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| armClkCtrl: Python.PythonPeripheral @ sysbus 0xF8000120 | ||
| size: 0x4 | ||
| initable: false | ||
| script: "request.value = 0x1F000400" | ||
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| ddrClkCtrl: Python.PythonPeripheral @ sysbus 0xF8000124 | ||
| size: 0x4 | ||
| initable: false | ||
| script: "request.value = 0x18400003" | ||
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| aperClkCtrl: Python.PythonPeripheral @ sysbus 0xF800012C | ||
| size: 0x4 | ||
| initable: false | ||
| script: "request.value = 0x01FFCCCD" | ||
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| sdioClkCtrl: Python.PythonPeripheral @ sysbus 0xF8000150 | ||
| size: 0x4 | ||
| initable: false | ||
| script: "request.value = 0x00001E03" | ||
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| gem0ClkCtrl: Python.PythonPeripheral @ sysbus 0xF8000140 | ||
| size: 0x4 | ||
| initable: false | ||
| script: "request.value = 0x00003C01" | ||
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| clk261True: Python.PythonPeripheral @ sysbus 0xF80001C4 | ||
| size: 0x4 | ||
| initable: false | ||
| script: "request.value = 1" | ||
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| nand: Python.PythonPeripheral @ sysbus 0xE000E000 | ||
| size: 0x4 | ||
| initable: false | ||
| script: "request.value = 0xFFFFFFFF" | ||
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| sysbus: | ||
| init: | ||
| Tag <0xF8000000,0xF8000FFF> "XSLCR" | ||
| Tag <0xF8007000,0xF8007FFF> "devcfg" | ||
| Tag <0xF8003000,0xF8003FFF> "pl330_dma" |
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