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Merge remote-tracking branch 'origin/solder_balls_height_control_with…
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…_simconfig' into solder_balls_height_control_with_simconfig
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@svandenb-dev
svandenb-dev committed Nov 24, 2023
2 parents e0bfa8a + adf92b0 commit 97cf455
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29 changes: 15 additions & 14 deletions _unittest/example_models/T20/test_cad.nas
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Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ GRID 17 -142.085-81.8469969.8416
GRID 18 338.1222.4335859436.2341
GRID 19 328.0788-91.8056 418.809
GRID 20 260.6554-89.1117 459.994
GRID 21 1574.546 -4.1-111484.805
GRID 21 1574.546 -34.1-11484.805
GRID 22 4411.665-98.6627 505.296
GRID 23 4410.392-95.7236504.7545
GRID 24 4412.102-93.0528505.4793
Expand All @@ -38,18 +38,18 @@ GRID 32 4410.434-95.7239504.6637
GRID 33 4414.683-98.9433506.4686
GRID 34 4416.393-96.2763507.1935
GRID 35 4413.413-96.0004505.9284
GRID 40 0.0 0.0 0.0
GRID 41 1.0 0.0 0.0
GRID 42 1.0 1.0 0.0
GRID 43 0.0 1.0 0.0
GRID 44 0.0 0.0 1.0
GRID 45 1.0 0.0 1.0
GRID 46 1.0 1.0 1.0
GRID 47 0.0 1.0 1.0
GRID 50 0.0 0.0 0.0
GRID 51 2.0 0.0 0.0
GRID 52 0.0 2.0 0.0
GRID 53 0.0 0.0 2.0
GRID 40 0.0 0.0 0.0
GRID 41 1.0 0.0 0.0
GRID 42 1.0 1.0 0.0
GRID 43 0.0 1.0 0.0
GRID 44 0.0 0.0 1.0
GRID 45 1.0 0.0 1.0
GRID 46 1.0 1.0 1.0
GRID 47 0.0 1.0 1.0
GRID 50 0.0 0.0 0.0
GRID 51 2.0 0.0 0.0
GRID 52 0.0 2.0 0.0
GRID 53 0.0 0.0 2.0
CTRIA3 92455 31 4 5 6
CTRIA3 92456 31 5 10 11
CTRIA3 92457 31 21 20 16
Expand All @@ -64,7 +64,8 @@ CPENTA 25229 9 27 22 28 33 29 35
CPENTA 25279 9 25 28 24 30 35 31
CPENTA 25284 9 26 27 28 34 33 35
CPENTA 25328 9 26 28 25 34 35 30
CHEXA 1 105 40 41 42 43 44 45 46 47
CHEXA 1 105 40 41 42 43 44 45
* 46 47
CTETRA 1 115 50 51 52 53

ENDDATA
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24 changes: 24 additions & 0 deletions _unittest/example_models/T20/test_cad_2.nas
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@@ -0,0 +1,24 @@
$
$ Settings :
$
$ Output format : MSC Nastran
$
$ Output : Visible
$
$
$
$
BEGIN BULK
GRID* 4 627.87512 568.96751*
* 1942.1985
GRID* 5 812.95973 486.74968*
* 1495.9564
GRID* 6 812.99916 484.24676*
* 1470.1764
CTRIA3* 75986 19 4 5
* 6


ENDDATA
$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
7 changes: 2 additions & 5 deletions _unittest/test_00_EDB.py
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Original file line number Diff line number Diff line change
Expand Up @@ -264,12 +264,10 @@ def test_009_vias_creation(self):
assert self.edbapp.padstacks.definitions["myVia"].hole_range == "through"
self.edbapp.padstacks.create(padstackname="myVia_bullet", antipad_shape="Bullet")
assert "myVia_bullet" in list(self.edbapp.padstacks.definitions.keys())

self.edbapp.add_design_variable("via_x", 5e-3)
self.edbapp["via_y"] = "1mm"
assert self.edbapp["via_y"].value == 1e-3
assert self.edbapp["via_y"].value_string == "1mm"

assert self.edbapp.padstacks.place(["via_x", "via_x+via_y"], "myVia", via_name="via_test1")
assert self.edbapp.padstacks.place(["via_x", "via_x+via_y*2"], "myVia_bullet")
self.edbapp.padstacks["via_test1"].net_name = "GND"
Expand Down Expand Up @@ -2921,9 +2919,8 @@ def test_147_find_dc_shorts(self):
edbapp.layout_validation.illegal_rlc_values(True)

# assert len(dc_shorts) == 20
assert ["LVDS_CH09_N", "GND"] in dc_shorts
assert ["LVDS_CH09_N", "DDR4_DM3"] in dc_shorts
assert ["DDR4_DM3", "LVDS_CH07_N"] in dc_shorts
assert ["SFPA_Tx_Fault", "PCIe_Gen4_CLKREQ_L"] in dc_shorts
assert ["VDD_DDR", "GND"] in dc_shorts
assert len(edbapp.nets["DDR4_DM3"].find_dc_short()) > 0
edbapp.nets["DDR4_DM3"].find_dc_short(True)
assert len(edbapp.nets["DDR4_DM3"].find_dc_short()) == 0
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18 changes: 6 additions & 12 deletions _unittest/test_12_PostProcessing.py
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Original file line number Diff line number Diff line change
Expand Up @@ -209,14 +209,9 @@ def test_09_manipulate_report_D(self, field_test):
def test_09_manipulate_report_E(self, field_test):
field_test.modeler.create_polyline([[0, 0, 0], [0, 5, 30]], name="Poly1", non_model=True)
variations2 = field_test.available_variations.nominal_w_values_dict
variations2["Theta"] = ["All"]
variations2["Phi"] = ["All"]
variations2["Freq"] = ["30GHz"]
variations2["Distance"] = ["All"]
assert field_test.post.create_report(

assert field_test.setups[0].create_report(
"Mag_E",
field_test.nominal_adaptive,
variations=variations2,
primary_sweep_variable="Distance",
context="Poly1",
report_category="Fields",
Expand All @@ -226,11 +221,10 @@ def test_09_manipulate_report_E(self, field_test):
new_report.polyline = "Poly1"
assert new_report.create()
new_report = field_test.post.reports_by_category.modal_solution("S(1,1)")
new_report.plot_type = "Smith Chart"
new_report.report_type = "Smith Chart"
assert new_report.create()
data = field_test.post.get_solution_data(
data = field_test.setups[0].get_solution_data(
"Mag_E",
field_test.nominal_adaptive,
variations=variations2,
primary_sweep_variable="Theta",
context="Poly1",
Expand Down Expand Up @@ -269,7 +263,7 @@ def test_17_circuit(self, circuit_test):
circuit_test.analyze_setup("LNA")
circuit_test.analyze_setup("Transient")
assert circuit_test.setups[0].is_solved
assert circuit_test.post.create_report(["dB(S(Port1, Port1))", "dB(S(Port1, Port2))"], "LNA")
assert circuit_test.setups[0].create_report(["dB(S(Port1, Port1))", "dB(S(Port1, Port2))"])
new_report = circuit_test.post.reports_by_category.standard(
["dB(S(Port1, Port1))", "dB(S(Port1, Port2))"], "LNA"
)
Expand Down Expand Up @@ -382,7 +376,7 @@ def test_55_time_plot(self, sbr_test):
assert sbr_test.setups[0].is_solved
solution_data = sbr_test.post.get_solution_data(
expressions=["NearEX", "NearEY", "NearEZ"],
variations={"_u": ["All"], "_v": ["All"], "Freq": ["All"]},
# variations={"_u": ["All"], "_v": ["All"], "Freq": ["All"]},
context="Near_Field",
report_category="Near Fields",
)
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11 changes: 9 additions & 2 deletions _unittest/test_20_HFSS.py
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Original file line number Diff line number Diff line change
Expand Up @@ -1421,9 +1421,11 @@ def test_58_create_near_field_line(self):
def test_59_test_nastran(self):
self.aedtapp.insert_design("Nas_teest")
example_project = os.path.join(local_path, "../_unittest/example_models", test_subfolder, "test_cad.nas")
example_project2 = os.path.join(local_path, "../_unittest/example_models", test_subfolder, "test_cad_2.nas")

cads = self.aedtapp.modeler.import_nastran(example_project)
assert len(cads) > 0
assert self.aedtapp.modeler.import_nastran(example_project2)

def test_60_set_variable(self):
self.aedtapp.variable_manager.set_variable("var_test", expression="123")
Expand Down Expand Up @@ -1481,8 +1483,13 @@ def test_63_set_phase_center_per_port(self):
name="Wave2",
renormalize=False,
)
assert self.aedtapp.set_phase_center_per_port()
assert self.aedtapp.set_phase_center_per_port(["Global", "Global"])
if self.aedtapp.desktop_class.is_grpc_api:
assert self.aedtapp.set_phase_center_per_port()
assert self.aedtapp.set_phase_center_per_port(["Global", "Global"])
else:
assert not self.aedtapp.set_phase_center_per_port()
assert not self.aedtapp.set_phase_center_per_port(["Global", "Global"])

assert not self.aedtapp.set_phase_center_per_port(["Global"])
assert not self.aedtapp.set_phase_center_per_port("Global")

Expand Down
2 changes: 1 addition & 1 deletion _unittest/test_98_Icepak.py
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Original file line number Diff line number Diff line change
Expand Up @@ -200,7 +200,7 @@ def test_12a_AssignMeshOperation(self):

@pytest.mark.skipif(config["use_grpc"], reason="GRPC usage leads to SystemExit.")
def test_12b_failing_AssignMeshOperation(self):
assert not self.aedtapp.mesh.assign_mesh_region("N0C0MP", 1, is_submodel=True)
assert self.aedtapp.mesh.assign_mesh_region("N0C0MP", 1, is_submodel=True)
test = self.aedtapp.mesh.assign_mesh_region(["USB_ID"], 1)
b = self.aedtapp.modeler.create_box([0, 0, 0], [1, 1, 1])
b.model = False
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2 changes: 1 addition & 1 deletion pyaedt/application/Analysis.py
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Original file line number Diff line number Diff line change
Expand Up @@ -1195,7 +1195,7 @@ def _create_setup(self, setupname="MySetupAuto", setuptype=None, props=None):
setup = SetupHFSSAuto(self, setuptype, name)
elif setuptype == 4:
setup = SetupSBR(self, setuptype, name)
elif setuptype in [5, 6, 7, 8, 9, 10]:
elif setuptype in [5, 6, 7, 8, 9, 10, 56]:
setup = SetupMaxwell(self, setuptype, name)
elif setuptype in [14]:
setup = SetupQ3D(self, setuptype, name)
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39 changes: 35 additions & 4 deletions pyaedt/application/design_solutions.py
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Original file line number Diff line number Diff line change
Expand Up @@ -110,15 +110,15 @@
"name": None,
"options": None,
"report_type": None,
"default_setup": None,
"default_setup": 8,
"default_adaptive": "LastAdaptive",
"intrinsics": ["Freq", "Phase"],
},
"DCConduction": {
"name": None,
"options": None,
"report_type": None,
"default_setup": None,
"default_setup": 8,
"default_adaptive": "LastAdaptive",
},
"ElectroDCConduction": {
Expand All @@ -138,13 +138,21 @@
},
},
"Twin Builder": {
"TR": {"name": None, "options": None, "report_type": "Standard", "default_setup": 35, "default_adaptive": None},
"TR": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 35,
"default_adaptive": None,
"intrinsics": ["Time"],
},
"AC": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": None,
"default_adaptive": None,
"intrinsics": ["Freq"],
},
"DC": {
"name": None,
Expand All @@ -161,6 +169,7 @@
"report_type": "Standard",
"default_setup": 15,
"default_adaptive": None,
"intrinsics": ["Freq"],
},
"NexximDC": {
"name": None,
Expand All @@ -175,85 +184,104 @@
"report_type": "Standard",
"default_setup": 17,
"default_adaptive": None,
"intrinsics": ["Time"],
},
"NexximVerifEye": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 19,
"default_adaptive": None,
"intrinsics": ["Time"],
},
"NexximQuickEye": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 18,
"default_adaptive": None,
"intrinsics": ["Time"],
},
"NexximAMI": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 20,
"default_adaptive": None,
"intrinsics": ["Time"],
},
"NexximOscillatorRSF": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 21,
"default_adaptive": None,
"intrinsics": ["Freq"],
},
"NexximOscillator1T": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 22,
"default_adaptive": None,
"intrinsics": ["Freq"],
},
"NexximOscillatorNT": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 23,
"default_adaptive": None,
"intrinsics": ["Freq"],
},
"NexximHarmonicBalance1T": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 24,
"default_adaptive": None,
"intrinsics": ["Freq"],
},
"NexximHarmonicBalanceNT": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 25,
"default_adaptive": None,
"intrinsics": ["Freq"],
},
"NexximSystem": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 26,
"default_adaptive": None,
"intrinsics": ["Time"],
},
"NexximTVNoise": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 27,
"default_adaptive": None,
"intrinsics": ["Freq"],
},
"HSPICE": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 28,
"default_adaptive": None,
"intrinsics": ["Time"],
},
"TR": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 17,
"default_adaptive": None,
"intrinsics": ["Time"],
},
"TR": {"name": None, "options": None, "report_type": "Standard", "default_setup": 17, "default_adaptive": None},
},
"2D Extractor": {
"Open": {
Expand Down Expand Up @@ -353,6 +381,7 @@
"report_type": "Modal Solution Data",
"default_setup": 4,
"default_adaptive": "Sweep",
"intrinsics": ["Freq", "Phase"],
},
},
"Icepak": {
Expand Down Expand Up @@ -439,13 +468,15 @@
"report_type": "Standard",
"default_setup": 41,
"default_adaptive": None,
"intrinsics": ["Freq"],
},
"LNA3DLayout": {
"name": None,
"options": None,
"report_type": "Standard",
"default_setup": 42,
"default_adaptive": None,
"intrinsics": ["Freq"],
},
},
"Mechanical": {
Expand Down
2 changes: 2 additions & 0 deletions pyaedt/desktop.py
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Original file line number Diff line number Diff line change
Expand Up @@ -833,6 +833,8 @@ def _init_dotnet(
): # pragma: no cover
import pythoncom

pythoncom.CoInitialize()

if is_linux:
raise Exception(
"PyAEDT supports COM initialization in Windows only. To use in Linux, upgrade to AEDT 2022 R2 or later."
Expand Down
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