util_axis_fifo_asym: Updates and fixes

- Fixed an issue with the start-stop mechanism - Added new parameters to the configuration file for more rigorous testing Signed-off-by: Istvan-Zsolt Szekely <[email protected]>
analogdevicesinc · Aug 6, 2024 · 7ff867d · 7ff867d
1 parent d5a925d
commit 7ff867d
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Showing 6 changed files with 51 additions and 13 deletions.
diff --git a/util_axis_fifo_asym/Makefile b/util_axis_fifo_asym/Makefile
@@ -19,6 +19,7 @@ SV_DEPS += ../common/sv/mailbox.sv
 SV_DEPS += ../common/sv/x_monitor.sv
 SV_DEPS += ../common/sv/scoreboard.sv
 SV_DEPS += ../common/sv/interfaces.svh
+SV_DEPS += ../common/sv/watchdog.sv
 SV_DEPS += environment.sv
 SV_DEPS += system_tb.sv
 

diff --git a/util_axis_fifo_asym/cfgs/cfg1.tcl b/util_axis_fifo_asym/cfgs/cfg1.tcl
@@ -1,7 +1,28 @@
 global ad_project_params
 
 set random_width [expr int(8*pow(2, int(7.0*rand()+1)))]
-set ad_project_params(INPUT_WIDTH) $random_width
+set INPUT_WIDTH $random_width
+set ad_project_params(INPUT_WIDTH) $INPUT_WIDTH
 
 set random_width [expr int(8*pow(2, int(7.0*rand()+1)))]
-set ad_project_params(OUTPUT_WIDTH) $random_width
+set OUTPUT_WIDTH $random_width
+set ad_project_params(OUTPUT_WIDTH) $OUTPUT_WIDTH
+
+set FIFO_LIMITED [expr int(rand()*2)]
+set ad_project_params(FIFO_LIMITED) $FIFO_LIMITED
+
+if {$FIFO_LIMITED} {
+    if {$INPUT_WIDTH > $OUTPUT_WIDTH} {
+        set RATIO $INPUT_WIDTH/$OUTPUT_WIDTH
+    } else {
+        set RATIO $OUTPUT_WIDTH/$INPUT_WIDTH
+    }
+} else {
+    set RATIO 1
+}
+
+set random_width [expr int(int(log($RATIO)/log(2))+4.0*rand()+1)]
+set ad_project_params(ADDRESS_WIDTH) $random_width
+
+set ad_project_params(INPUT_CLK) [expr int(rand()*9000)+1000]
+set ad_project_params(OUTPUT_CLK) [expr int(rand()*9000)+1000]
diff --git a/util_axis_fifo_asym/environment.sv b/util_axis_fifo_asym/environment.sv
@@ -118,8 +118,8 @@ package environment_pkg;
 
       super.start();
 
-      input_clk_if.start_clock($urandom_range(1000,10000));
-      output_clk_if.start_clock($urandom_range(1000,10000));
+      input_clk_if.start_clock(`INPUT_CLK);
+      output_clk_if.start_clock(`OUTPUT_CLK);
 
       input_axis_agent.start_master();
       output_axis_agent.start_slave();

diff --git a/util_axis_fifo_asym/system_bd.tcl b/util_axis_fifo_asym/system_bd.tcl
@@ -42,6 +42,8 @@ global ad_project_params
 
 set INPUT_WIDTH $ad_project_params(INPUT_WIDTH)
 set OUTPUT_WIDTH $ad_project_params(OUTPUT_WIDTH)
+set FIFO_LIMITED $ad_project_params(FIFO_LIMITED)
+set ADDRESS_WIDTH $ad_project_params(ADDRESS_WIDTH)
 
 # input clock and reset
 create_bd_port -dir I input_clk
@@ -53,14 +55,14 @@ create_bd_port -dir I output_clk
 ad_ip_instance util_axis_fifo_asym util_axis_fifo_asym_DUT [list \
   ASYNC_CLK 1 \
   S_DATA_WIDTH $INPUT_WIDTH \
-  ADDRESS_WIDTH 5 \
+  ADDRESS_WIDTH $ADDRESS_WIDTH \
   M_DATA_WIDTH $OUTPUT_WIDTH \
   M_AXIS_REGISTERED 1 \
   ALMOST_EMPTY_THRESHOLD 16 \
   ALMOST_FULL_THRESHOLD 16 \
   TLAST_EN 1 \
   TKEEP_EN 1 \
-  FIFO_LIMITED 1 \
+  FIFO_LIMITED $FIFO_LIMITED \
   ADDRESS_WIDTH_PERSPECTIVE 0 \
 ]
 

diff --git a/util_axis_fifo_asym/system_project.tcl b/util_axis_fifo_asym/system_project.tcl
@@ -36,6 +36,7 @@ adi_sim_project_files [list \
  "../common/sv/x_monitor.sv" \
  "../common/sv/scoreboard.sv" \
  "../common/sv/interfaces.svh" \
+ "../common/sv/watchdog.sv" \
  "environment.sv" \
  "tests/test_program.sv" \
  "system_tb.sv" \

diff --git a/util_axis_fifo_asym/tests/test_program.sv b/util_axis_fifo_asym/tests/test_program.sv
@@ -43,6 +43,7 @@ import logger_pkg::*;
 import environment_pkg::*;
 import m_axis_sequencer_pkg::*;
 import s_axis_sequencer_pkg::*;
+import watchdog_pkg::*;
 
 program test_program (
   clk_if input_clk_if,
@@ -51,6 +52,7 @@ program test_program (
   // declare the class instances
   environment env;
 
+  watchdog send_data_wd;
 
   initial begin
 
@@ -78,20 +80,31 @@ program test_program (
 
     env.run();
 
-    // stimulus
-    repeat($urandom_range(10,20)) begin
-      env.input_axis_seq.add_xfer_descriptor_packet_size($urandom_range(1,100), 1, 0);
+    send_data_wd = new(500000, "Send data");
+
+    send_data_wd.start();
 
-      env.input_axis_seq.start();
+    env.input_axis_seq.start();
+
+    // stimulus
+    repeat($urandom_range(5,13)) begin
+      send_data_wd.reset();
 
-      #($urandom_range(1,20)*1us);
+      repeat($urandom_range(1,5))
+        env.input_axis_seq.add_xfer_descriptor_packet_size($urandom_range(1,100), 1, 0);
+
+      #($urandom_range(1,10)*1us);
 
-      env.input_axis_seq.stop();
+      env.input_axis_seq.clear_queue();
 
-      env.input_axis_seq.packet_sent();
+      #1us;
 
       env.scoreboard_inst.wait_until_complete();
+
+      `INFOV(("Packet finished."), 5);
     end
+
+    send_data_wd.stop();
 
     env.stop();