fixup! peepopt: Add right-shift 'shiftmul' variant

YosysHQ · Aug 2, 2023 · 7e7917b · 7e7917b
1 parent c2eebb3
commit 7e7917b
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/passes/pmgen/peepopt_shiftmul_right.pmg b/passes/pmgen/peepopt_shiftmul_right.pmg
@@ -72,7 +72,7 @@ code
 
 	int factor_bits = ceil_log2(mul_const.as_int());
 	// make sure the multiplication never wraps around
-	if (GetSize(shift_amount) < factor_bits + GetSize(mul_din))
+	if (GetSize(shift_amount) + log2scale < factor_bits + GetSize(mul_din))
 		reject;
 
 	did_something = true;