Add RISC-V and RVV1.0 support into library

GraphBLAS/CMakeLists.txt

@@ -162,6 +162,26 @@ if ( DEFINED GBAVX512F )
     endif ( )
 endif ( )
 
+#-------------------------------------------------------------------------------
+# RISC-V 
+#-------------------------------------------------------------------------------
+
+if ( DEFINED GBRISCV64 )
+    if ( GBRISCV64 )
+        set ( CMAKE_C_FLAGS  "${CMAKE_C_FLAGS} -DGBRISCV64=1 " )
+    else ( )
+        set ( CMAKE_C_FLAGS  "${CMAKE_C_FLAGS} -DGBRISCV64=0 " )
+    endif ( )
+endif ( )
+
+if ( DEFINED GBRVV )
+    if ( GBRVV )
+        set ( CMAKE_C_FLAGS  "${CMAKE_C_FLAGS} -DGBRVV=1 " )
+    else ( )
+        set ( CMAKE_C_FLAGS  "${CMAKE_C_FLAGS} -DGBRVV=0 " )
+    endif ( )
+endif ( )
+
 #-------------------------------------------------------------------------------
 # check compiler features
 #-------------------------------------------------------------------------------

GraphBLAS/FactoryKernels/GB_AxB__plus_times_fp32.c

@@ -7,13 +7,24 @@
 
 //------------------------------------------------------------------------------
 
+#ifdef GBRISCV64
+#include <riscv_vector.h>
+#endif
 #include "GB.h"
 #include "GB_control.h"
 #include "mxm/GB_AxB_saxpy.h"
 #include "include/GB_unused.h"
 #include "assign/GB_bitmap_assign_methods.h"
 #include "FactoryKernels/GB_AxB__include2.h"
 
+// riscv intrinsics
+
+#define VSETVL(x) __riscv_vsetvl_e32m8(x)
+#define VLE(x,y) __riscv_vle32_v_f32m8(x, y)
+#define VFMACC(x,y,z,w) __riscv_vfmacc_vf_f32m8(x, y, z, w)
+#define VSE(x,y,z) __riscv_vse32_v_f32m8(x, y, z)
+#define VECTORTYPE vfloat32m8_t
+
 // semiring operators:
 #define GB_MULTADD(z,a,b,i,k,j) z += (a*b)
 #define GB_MULT(z,a,b,i,k,j)    z = (a*b)
@@ -43,6 +54,7 @@
 // special case semirings:
 
 #define GB_SEMIRING_HAS_AVX_IMPLEMENTATION 1
+#define GB_SEMIRING_HAS_RVV_IMPLEMENTATION 1
 
 // monoid properties:
 #define GB_Z_TYPE float
@@ -282,6 +294,27 @@ GrB_Info GB (_Asaxpy4B__plus_times_fp32)
 
         #endif
 
+        //----------------------------------------------------------------------
+        // saxpy5 method with RISC-V vectors
+        //---------------------------------------------------------------------
+
+        #if GB_COMPILER_SUPPORTS_RVV1
+
+            GB_TARGET_RVV1 static inline void GB_AxB_saxpy5_unrolled_rvv
+            (
+                GrB_Matrix C,
+                const GrB_Matrix A,
+                const GrB_Matrix B,
+                const int ntasks,
+                const int nthreads,
+                const int64_t *B_slice
+            )
+            {
+                #include "mxm/template/GB_AxB_saxpy5_lv.c"
+            }
+
+        #endif
+
         //----------------------------------------------------------------------
         // saxpy5 method unrolled, with no vectors
         //----------------------------------------------------------------------

GraphBLAS/FactoryKernels/GB_AxB__plus_times_fp64.c

@@ -7,13 +7,24 @@
 
 //------------------------------------------------------------------------------
 
+#ifdef GBRISCV64
+#include <riscv_vector.h>
+#endif
 #include "GB.h"
 #include "GB_control.h"
 #include "mxm/GB_AxB_saxpy.h"
 #include "include/GB_unused.h"
 #include "assign/GB_bitmap_assign_methods.h"
 #include "FactoryKernels/GB_AxB__include2.h"
 
+// riscv intrinsics
+
+#define VSETVL(x) __riscv_vsetvl_e64m8(x)
+#define VLE(x,y) __riscv_vle64_v_f64m8(x, y)
+#define VFMACC(x,y,z,w) __riscv_vfmacc_vf_f64m8(x, y, z, w)
+#define VSE(x,y,z) __riscv_vse64_v_f64m8(x, y, z)
+#define VECTORTYPE vfloat64m8_t
+
 // semiring operators:
 #define GB_MULTADD(z,a,b,i,k,j) z += (a*b)
 #define GB_MULT(z,a,b,i,k,j)    z = (a*b)
@@ -43,6 +54,7 @@
 // special case semirings:
 
 #define GB_SEMIRING_HAS_AVX_IMPLEMENTATION 1
+#define GB_SEMIRING_HAS_RVV_IMPLEMENTATION 1
 
 // monoid properties:
 #define GB_Z_TYPE double
@@ -282,6 +294,26 @@ GrB_Info GB (_Asaxpy4B__plus_times_fp64)
 
         #endif
 
+        //----------------------------------------------------------------------
+        // saxpy5 method with RISC-V vectors
+        //----------------------------------------------------------------------
+        #if GB_COMPILER_SUPPORTS_RVV1
+
+            GB_TARGET_RVV1 static inline void GB_AxB_saxpy5_unrolled_rvv
+            (
+                GrB_Matrix C,
+                const GrB_Matrix A,
+                const GrB_Matrix B,
+                const int ntasks,
+                const int nthreads,
+                const int64_t *B_slice
+            )
+            {
+                #include "mxm/template/GB_AxB_saxpy5_lv.c"
+            }
+
+        #endif
+
         //----------------------------------------------------------------------
         // saxpy5 method unrolled, with no vectors
         //----------------------------------------------------------------------

GraphBLAS/GraphBLAS/rename/GB_rename.h

@@ -389,6 +389,7 @@
 #define GB_Global_calloc_function_set GM_Global_calloc_function_set
 #define GB_Global_cpu_features_avx2 GM_Global_cpu_features_avx2
 #define GB_Global_cpu_features_avx512f GM_Global_cpu_features_avx512f
+#define GB_Global_cpu_features_rvv GM_Global_cpu_features_rvv
 #define GB_Global_cpu_features_query GM_Global_cpu_features_query
 #define GB_Global_flush_get GM_Global_flush_get
 #define GB_Global_flush_set GM_Global_flush_set

GraphBLAS/Source/codegen/Generator/GB_AxB.c

@@ -7,6 +7,9 @@
 
 //------------------------------------------------------------------------------
 
+#ifdef GBRISCV64
+#include <riscv_vector.h>
+#endif
 #include "GB.h"
 #include "GB_control.h"
 #include "mxm/GB_AxB_saxpy.h"
@@ -310,6 +313,28 @@ m4_divert(if_semiring_has_avx)
             }
 
         #endif
+m4_divert(if_semiring_has_rvv)
+        //----------------------------------------------------------------------
+        // saxpy5 method with RISC-V vectors
+        //----------------------------------------------------------------------
+
+        #if GB_COMPILER_SUPPORTS_RVV1
+
+            GB_TARGET_RVV1 static inline void GB_AxB_saxpy5_unrolled_rvv
+            (
+                GrB_Matrix C,
+                const GrB_Matrix A,
+                const GrB_Matrix B,
+                const int ntasks,
+                const int nthreads,
+                const int64_t *B_slice
+            )
+            {
+                #include "mxm/template/GB_AxB_saxpy5_lv.c"
+            }
+
+        #endif
+
 m4_divert(if_saxpy5_enabled)
 
         //----------------------------------------------------------------------

GraphBLAS/Source/cpu/GB_cpu_features_impl.c

@@ -41,6 +41,7 @@
     #include "src/impl_x86_freebsd.c"
     #include "src/impl_x86_linux_or_android.c"
     #include "src/impl_x86_windows.c"
+    #include "src/impl_riscv_linux.c"
     #if GBX86
         #if (defined(__apple__) || defined(__APPLE__) || defined(__MACH__))
         // needed for src/impl_x86_macos.c:

GraphBLAS/Source/global/GB_Global.c

@@ -131,6 +131,7 @@ typedef struct
 
     bool cpu_features_avx2 ;        // x86_64 with AVX2
     bool cpu_features_avx512f ;     // x86_64 with AVX512f
+    bool cpu_features_rvv ;         // RISC-V with RVV1.0
 
     //--------------------------------------------------------------------------
     // CUDA (DRAFT: in progress):
@@ -215,6 +216,7 @@ static GB_Global_struct GB_Global =
     // CPU features
     .cpu_features_avx2 = false,         // x86_64 with AVX2
     .cpu_features_avx512f = false,      // x86_64 with AVX512f
+    .cpu_features_rvv = false,          // RISC-V with RVV1.0
 
     // CUDA environment (DRAFT: in progress)
     .gpu_count = 0,                     // # of GPUs in the system
@@ -306,16 +308,36 @@ void GB_Global_cpu_features_query (void)
         }
         #endif
 
+    }
+    #elif GBRISCV64
+    {
+        //----------------------------------------------------------------------
+        // xRISC-V architecture: see if RVV1.0 is supported
+        //----------------------------------------------------------------------
+
+        #if defined ( GBRVV )
+        {
+                // the build system asserts whether or not RVV1.0 is available
+                GB_Global.cpu_features_rvv = (bool) (GBRVV) ;
+        }
+            #else
+            {
+                // RVV1.0 not available
+                GB_Global.cpu_features_rvv = false ;
+            }
+        #endif
+
     }
     #else
     {
 
         //----------------------------------------------------------------------
-        // not on the x86_64 architecture, so no AVX2 or AVX512F acceleration
+        // not on the x86_64 or RISC-V architecture, so no AVX2, AVX512F or RVV1.0 acceleration
         //----------------------------------------------------------------------
 
         GB_Global.cpu_features_avx2 = false ;
         GB_Global.cpu_features_avx512f = false ;
+        GB_Global.cpu_features_rvv = false ;
 
     }
     #endif
@@ -331,6 +353,11 @@ bool GB_Global_cpu_features_avx512f (void)
     return (GB_Global.cpu_features_avx512f) ;
 }
 
+bool GB_Global_cpu_features_rvv (void)
+{ 
+    return (GB_Global.cpu_features_rvv) ;
+}
+
 //------------------------------------------------------------------------------
 // hyper_switch
 //------------------------------------------------------------------------------

GraphBLAS/Source/global/GB_Global.h

@@ -17,6 +17,7 @@
 void     GB_Global_cpu_features_query (void) ;
 bool     GB_Global_cpu_features_avx2 (void) ;
 bool     GB_Global_cpu_features_avx512f (void) ;
+bool     GB_Global_cpu_features_rvv (void) ;
 
 void     GB_Global_mode_set (GrB_Mode mode) ;
 GrB_Mode GB_Global_mode_get (void) ;

GraphBLAS/Source/include/GB_compiler.h

@@ -245,6 +245,16 @@
 
 #endif
 
+#if !defined ( GBRISCV64 )
+
+    #if defined(__riscv)
+    #define GBRISCV64 1
+    #else
+    #define GBRISCV64 0
+    #endif
+
+#endif
+
 //------------------------------------------------------------------------------
 // AVX2 and AVX512F support for the x86_64 architecture
 //------------------------------------------------------------------------------
@@ -306,6 +316,31 @@
     #define GB_TARGET_AVX2
 #endif
 
+//------------------------------------------------------------------------------
+// RVV1.0 support for the RISC-V architecture
+//------------------------------------------------------------------------------
+
+#if GBRISCV64
+    #if GB_COMPILER_GCC
+    // TODO: add other compilers
+        #if __GNUC__ >= 13
+            #define GB_COMPILER_SUPPORTS_RVV1 1
+        #else
+            #define GB_COMPILER_SUPPORTS_RVV1 0
+        #endif
+    #endif
+#else
+    // non-RISC-V architecture
+    #define GB_COMPILER_SUPPORTS_RVV1 0
+#endif
+
+// prefix for function with target rvv1.0
+#if GB_COMPILER_SUPPORTS_RVV1
+        #define GB_TARGET_RVV1 __attribute__ ((target ("arch=rv64gcv")))
+#else
+    #define GB_TARGET_RVV1
+#endif
+
 //------------------------------------------------------------------------------
 // disable Google's cpu_featgures on some compilers
 //------------------------------------------------------------------------------

GraphBLAS/Source/jit_kernels/template/GB_jit_kernel_AxB_saxpy5.c

@@ -8,6 +8,9 @@
 //------------------------------------------------------------------------------
 
 #include "include/GB_AxB_saxpy3_template.h"
+#ifdef GBRISCV64
+#include <riscv_vector.h>
+#endif
 
 GB_JIT_GLOBAL GB_JIT_KERNEL_AXB_SAXPY5_PROTO (GB_jit_kernel) ;
 
@@ -82,6 +85,27 @@ GB_JIT_GLOBAL GB_JIT_KERNEL_AXB_SAXPY5_PROTO (GB_jit_kernel) ;
             }
 
         #endif
+
+        //----------------------------------------------------------------------
+        // saxpy5 method with RISC-V vectors
+        //----------------------------------------------------------------------
+
+        #if GB_COMPILER_SUPPORTS_RVV1
+
+            GB_TARGET_AVX2 static inline void GB_AxB_saxpy5_unrolled_rvv
+            (
+                GrB_Matrix C,
+                const GrB_Matrix A,
+                const GrB_Matrix B,
+                const int ntasks,
+                const int nthreads,
+                const int64_t *B_slice
+            )
+            {
+                #include "template/GB_AxB_saxpy5_lv.c"
+            }
+
+        #endif
 
     #endif
 
@@ -171,6 +195,20 @@ GB_JIT_GLOBAL GB_JIT_KERNEL_AXB_SAXPY5_PROTO (GB_jit_kernel)
         }
         #endif
 
+        #if GB_SEMIRING_HAS_RVV_IMPLEMENTATION
+        {
+            #if GB_COMPILER_SUPPORTS_RVV1
+            if (cpu_has_avx2)
+            {
+                // RISC-V64 with RVV1.0
+                GB_AxB_saxpy5_unrolled_rvv (C, A, B, ntasks, nthreads,
+                    B_slice) ;
+                return (GrB_SUCCESS) ;
+            }
+            #endif
+        }
+        #endif
+
         // any architecture and any semiring
         GB_AxB_saxpy5_unrolled_vanilla (C, A, B, ntasks, nthreads, B_slice) ;