[DRAFT] Support Add

Let's support Add

Signed-off-by: YongHyun An <[email protected]>

runtime/onert/core/include/ir/Operations.Include.h

@@ -16,6 +16,7 @@
 
 // This file has no ifdef guard intentionally
 
+#include "ir/operation/Add.h"
 #include "ir/operation/AddN.h"
 #include "ir/operation/ArgMinMax.h"
 #include "ir/operation/BatchMatMul.h"

runtime/onert/core/include/ir/Operations.lst

@@ -19,6 +19,7 @@
 #endif
 
 // Internal Name
+OP(Add)
 OP(AddN)
 OP(ArgMinMax)
 OP(BatchMatMul)

runtime/onert/core/include/ir/operation/Add.h

@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2020 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __ONERT_IR_OPERATION_ADD_H__
+#define __ONERT_IR_OPERATION_ADD_H__
+
+#include "ir/Operation.h"
+
+namespace onert
+{
+namespace ir
+{
+namespace operation
+{
+
+class Add : public Operation
+{
+public:
+  enum Input
+  {
+    LHS = 0,
+    RHS
+  };
+
+public:
+  Add(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  OpCode opcode() const final { return OpCode::Add; }
+};
+
+} // namespace operation
+} // namespace ir
+} // namespace onert
+
+#endif // __ONERT_IR_OPERATION_ADD_H__

runtime/onert/core/include/ir/train/Operations.Include.h

@@ -17,6 +17,7 @@
 #ifndef __ONERT_IR_TRAIN_OPERATIONS_OPERATION_INCLUDE_H__
 #define __ONERT_IR_TRAIN_OPERATIONS_OPERATION_INCLUDE_H__
 
+#include "ir/train/operation/Add.h"
 #include "ir/train/operation/Conv2D.h"
 #include "ir/train/operation/DepthwiseConv2D.h"
 #include "ir/train/operation/ElementwiseActivation.h"

runtime/onert/core/include/ir/train/Operations.lst

@@ -18,6 +18,7 @@
 #error Define OP before including this file
 #endif
 
+OP(Add)
 OP(Conv2D)
 OP(DepthwiseConv2D)
 OP(ElementwiseActivation)

runtime/onert/core/include/ir/train/operation/Add.h

@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2024 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __ONERT_IR_TRAIN_OPERATION_ADD_H__
+#define __ONERT_IR_TRAIN_OPERATION_ADD_H__
+
+#include "ir/operation/Add.h"
+#include "ir/train/ITrainableOperation.h"
+
+namespace onert
+{
+namespace ir
+{
+namespace train
+{
+namespace operation
+{
+
+class Add : public ir::operation::Add, public ITrainableOperation
+{
+private:
+  using OperationType = ir::operation::Add;
+
+public:
+  Add(const OperationType &operation);
+
+public:
+  std::unique_ptr<ITrainableOperation> clone() const override;
+  void accept(OperationVisitor &v) const override;
+  void accept(TrainableOperationVisitor &v) const override;
+};
+
+} // namespace operation
+} // namespace train
+} // namespace ir
+} // namespace onert
+
+#endif // __ONERT_IR_TRAIN_OPERATION_ADD_H__

runtime/onert/core/src/compiler/train/TrainableOperationConverter.cc

@@ -34,6 +34,11 @@ TrainableOperationConverter::TrainableOperationConverter(
   UNUSED_RELEASE(_training_info);
 }
 
+void TrainableOperationConverter::visit(const ir::operation::Add &node)
+{
+  _return_op = std::make_unique<ir::train::operation::Add>(node);
+}
+
 void TrainableOperationConverter::visit(const ir::operation::Conv2D &node)
 {
   _return_op = std::make_unique<ir::train::operation::Conv2D>(node);

runtime/onert/core/src/compiler/train/TrainableOperationConverter.h

@@ -37,6 +37,7 @@ class TrainableOperationConverter : public UntrainableOperationConverter
   using UntrainableOperationConverter::operator();
 
 private:
+  void visit(const ir::operation::Add &) override;
   void visit(const ir::operation::Conv2D &) override;
   void visit(const ir::operation::DepthwiseConv2D &) override;
   void visit(const ir::operation::ElementwiseActivation &) override;

runtime/onert/core/src/ir/operation/Add.cc

@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ir/operation/Add.h"
+#include "ir/OperationVisitor.h"
+
+namespace onert
+{
+namespace ir
+{
+namespace operation
+{
+
+void Add::accept(OperationVisitor &v) const { v.visit(*this); }
+
+Add::Add(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+  : Operation{OperandConstraint::createExact(2u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace ir
+} // namespace onert

runtime/onert/core/src/ir/train/operation/Add.h

@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2024 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ir/train/operation/Add.h"
+
+#include "ir/OperationVisitor.h"
+#include "ir/train/TrainableOperationVisitor.h"
+
+namespace onert
+{
+namespace ir
+{
+namespace train
+{
+namespace operation
+{
+
+std::unique_ptr<ITrainableOperation> Add::clone() const { return std::make_unique<Add>(*this); }
+
+void Add::accept(OperationVisitor &v) const { v.visit(*this); }
+
+void Add::accept(TrainableOperationVisitor &v) const { v.visit(*this); }
+
+Add::Add(const OperationType &operation)
+  : OperationType{operation.getInputs(), operation.getOutputs()}
+{
+  // DO NOTHING
+}
+
+} // namespace operation
+} // namespace train
+} // namespace ir
+} // namespace onert