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bsp: cvitek: fix cv18xx_risc-v and c906_little IRQ_MAX_NR error num #9261

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merged 2 commits into from
Aug 7, 2024
Merged

bsp: cvitek: fix cv18xx_risc-v and c906_little IRQ_MAX_NR error num #9261

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91f6ae2
bsp: cvitek: fix cv18xx_risc-v IRQ_MAX_NR error num
Z8MAN8 Jul 29, 2024
f35f06d
bsp: cvitek: fix c906_little IRQ_MAX_NR error num
Z8MAN8 Aug 6, 2024
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6 changes: 5 additions & 1 deletion bsp/cvitek/c906_little/.config
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Original file line number Diff line number Diff line change
Expand Up @@ -417,6 +417,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PARSON is not set
# CONFIG_PKG_USING_RYAN_JSON is not set
# end of JSON: JavaScript Object Notation, a lightweight data-interchange format

#
Expand Down Expand Up @@ -627,6 +628,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# STM32 HAL & SDK Drivers
#
# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
Expand Down Expand Up @@ -821,6 +824,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
# CONFIG_PKG_USING_BT_MX01 is not set
# CONFIG_PKG_USING_RGPOWER is not set
# CONFIG_PKG_USING_BT_MX02 is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set
# end of peripheral libraries and drivers

Expand Down Expand Up @@ -1177,7 +1181,7 @@ CONFIG_UART_IRQ_BASE=30

CONFIG_BSP_USING_C906_LITTLE=y
CONFIG_PLIC_PHY_ADDR=0x70000000
CONFIG_IRQ_MAX_NR=128
CONFIG_IRQ_MAX_NR=61
CONFIG_TIMER_CLK_FREQ=25000000
CONFIG_GPIO_IRQ_BASE=41
CONFIG_SYS_GPIO_IRQ_BASE=47
Expand Down
2 changes: 1 addition & 1 deletion bsp/cvitek/c906_little/Kconfig
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Expand Up @@ -24,7 +24,7 @@ config PLIC_PHY_ADDR

config IRQ_MAX_NR
int
default 128
default 61

config TIMER_CLK_FREQ
int
Expand Down
5 changes: 2 additions & 3 deletions bsp/cvitek/c906_little/board/interrupt.h
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Original file line number Diff line number Diff line change
Expand Up @@ -11,12 +11,11 @@
#ifndef __INTERRUPT_H__
#define __INTERRUPT_H__

#include <rtconfig.h>

#define NR_CPUS 1

#define IRQ_OFFSET 16
#ifndef IRQ_MAX_NR
#define IRQ_MAX_NR 207
#endif
#define INTERRUPTS_MAX (IRQ_OFFSET + IRQ_MAX_NR)

#define PLIC_BASE 0x70000000
Expand Down
2 changes: 1 addition & 1 deletion bsp/cvitek/c906_little/rtconfig.h
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Expand Up @@ -330,7 +330,7 @@
/* end of General Drivers Configuration */
#define BSP_USING_C906_LITTLE
#define PLIC_PHY_ADDR 0x70000000
#define IRQ_MAX_NR 128
#define IRQ_MAX_NR 61
#define TIMER_CLK_FREQ 25000000
#define GPIO_IRQ_BASE 41
#define SYS_GPIO_IRQ_BASE 47
Expand Down
7 changes: 6 additions & 1 deletion bsp/cvitek/cv18xx_risc-v/.config
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Expand Up @@ -301,6 +301,7 @@ CONFIG_NETDEV_USING_IFCONFIG=y
CONFIG_NETDEV_USING_PING=y
CONFIG_NETDEV_USING_NETSTAT=y
CONFIG_NETDEV_USING_AUTO_DEFAULT=y
# CONFIG_NETDEV_USING_LINK_STATUS_CALLBACK is not set
# CONFIG_NETDEV_USING_IPV6 is not set
CONFIG_NETDEV_IPV4=1
CONFIG_NETDEV_IPV6=0
Expand Down Expand Up @@ -561,6 +562,7 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PARSON is not set
# CONFIG_PKG_USING_RYAN_JSON is not set
# end of JSON: JavaScript Object Notation, a lightweight data-interchange format

#
Expand Down Expand Up @@ -771,6 +773,8 @@ CONFIG_RT_USING_ADT_REF=y
#
# STM32 HAL & SDK Drivers
#
# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
Expand Down Expand Up @@ -965,6 +969,7 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
# CONFIG_PKG_USING_BT_MX01 is not set
# CONFIG_PKG_USING_RGPOWER is not set
# CONFIG_PKG_USING_BT_MX02 is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set
# end of peripheral libraries and drivers

Expand Down Expand Up @@ -1323,7 +1328,7 @@ CONFIG_UART_IRQ_BASE=44

CONFIG_BSP_USING_CV18XX=y
CONFIG_C906_PLIC_PHY_ADDR=0x70000000
CONFIG_IRQ_MAX_NR=64
CONFIG_IRQ_MAX_NR=101
CONFIG_TIMER_CLK_FREQ=25000000
CONFIG_GPIO_IRQ_BASE=60
CONFIG_SYS_GPIO_IRQ_BASE=70
Expand Down
2 changes: 1 addition & 1 deletion bsp/cvitek/cv18xx_risc-v/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ config C906_PLIC_PHY_ADDR

config IRQ_MAX_NR
int
default 64
default 101

config TIMER_CLK_FREQ
int
Expand Down
2 changes: 1 addition & 1 deletion bsp/cvitek/cv18xx_risc-v/rtconfig.h
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Expand Up @@ -449,7 +449,7 @@
/* end of General Drivers Configuration */
#define BSP_USING_CV18XX
#define C906_PLIC_PHY_ADDR 0x70000000
#define IRQ_MAX_NR 64
#define IRQ_MAX_NR 101
#define TIMER_CLK_FREQ 25000000
#define GPIO_IRQ_BASE 60
#define SYS_GPIO_IRQ_BASE 70
Expand Down
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