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cpu/sam0_common: implement QSPI peripheral, add support to mtd_spi_nor #15300

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cpu/sam0_common: implement QSPI peripheral, add support to mtd_spi_nor #15300

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b046a01
cpu/sam0_common: add function to enable & disable CPU cache
benpicco Oct 25, 2020
2a3a56d
drivers/periph: add interface for QSPI
benpicco Oct 25, 2020
54abc50
cpu/sam0_common: implement QSPI peripheral
benpicco Oct 25, 2020
9d124d6
boards/same54-xpro: enable QSPI flash
benpicco Oct 25, 2020
ecc4b02
tests/periph_qspi: add QSPI test application
benpicco Oct 25, 2020
95d1fd4
drivers/mtd_spi_nor: add support for QSPI backend
benpicco Oct 25, 2020
6b93d0f
fixup! drivers/periph: add interface for QSPI
benpicco Oct 28, 2020
a228428
fixup! tests/periph_qspi: add QSPI test application
benpicco Oct 28, 2020
5671190
fixup! cpu/sam0_common: implement QSPI peripheral
benpicco Oct 28, 2020
fc053b0
fixup! drivers/mtd_spi_nor: add support for QSPI backend
benpicco Oct 28, 2020
35972c0
fixup! fixup! cpu/sam0_common: implement QSPI peripheral
benpicco Oct 28, 2020
a05e4e8
fixup! fixup! drivers/periph: add interface for QSPI
benpicco Oct 31, 2020
2836218
fixup! fixup! fixup! cpu/sam0_common: implement QSPI peripheral
benpicco Oct 31, 2020
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2 changes: 1 addition & 1 deletion boards/ikea-tradfri/board.c
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Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@ static const mtd_spi_nor_params_t _ikea_tradfri_nor_params = {
.wait_chip_wake_up = 1LU * US_PER_MS,
.clk = IKEA_TRADFRI_NOR_SPI_CLK,
.flag = IKEA_TRADFRI_NOR_FLAGS,
.spi = IKEA_TRADFRI_NOR_SPI_DEV,
.spi.spi = IKEA_TRADFRI_NOR_SPI_DEV,
.mode = IKEA_TRADFRI_NOR_SPI_MODE,
.cs = IKEA_TRADFRI_NOR_SPI_CS,
.addr_width = 3,
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4 changes: 2 additions & 2 deletions boards/mulle/board.c
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Expand Up @@ -36,7 +36,7 @@
static nvram_t mulle_nvram_dev;
nvram_t *mulle_nvram = &mulle_nvram_dev;
static nvram_spi_params_t nvram_spi_params = {
.spi = MULLE_NVRAM_SPI_DEV,
.spi.spi = MULLE_NVRAM_SPI_DEV,
.clk = MULLE_NVRAM_SPI_CLK,
.cs = MULLE_NVRAM_SPI_CS,
.address_count = MULLE_NVRAM_SPI_ADDRESS_COUNT,
Expand All @@ -54,7 +54,7 @@ static const mtd_spi_nor_params_t mulle_nor_params = {
.wait_sector_erase = 10LU * US_PER_MS,
.wait_32k_erase = 20LU * US_PER_MS,
.wait_chip_wake_up = 1LU * US_PER_MS,
.spi = MULLE_NOR_SPI_DEV,
.spi.spi = MULLE_NOR_SPI_DEV,
.cs = MULLE_NOR_SPI_CS,
.addr_width = 3,
.mode = SPI_MODE_3,
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2 changes: 1 addition & 1 deletion boards/nrf52840dk/mtd.c
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Expand Up @@ -35,7 +35,7 @@ static const mtd_spi_nor_params_t _nrf52840dk_nor_params = {
.wait_chip_wake_up = 35LU * US_PER_MS,
.clk = NRF52840DK_NOR_SPI_CLK,
.flag = NRF52840DK_NOR_FLAGS,
.spi = NRF52840DK_NOR_SPI_DEV,
.spi.spi = NRF52840DK_NOR_SPI_DEV,
.mode = NRF52840DK_NOR_SPI_MODE,
.cs = NRF52840DK_NOR_SPI_CS,
.addr_width = 3,
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2 changes: 1 addition & 1 deletion boards/pinetime/board.c
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Expand Up @@ -38,7 +38,7 @@ static const mtd_spi_nor_params_t _pinetime_nor_params = {
.wait_chip_wake_up = 1LU * US_PER_MS,
.clk = PINETIME_NOR_SPI_CLK,
.flag = PINETIME_NOR_FLAGS,
.spi = PINETIME_NOR_SPI_DEV,
.spi.spi = PINETIME_NOR_SPI_DEV,
.mode = PINETIME_NOR_SPI_MODE,
.cs = PINETIME_NOR_SPI_CS,
.addr_width = 3,
Expand Down
1 change: 1 addition & 0 deletions boards/same54-xpro/Kconfig
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Expand Up @@ -18,6 +18,7 @@ config BOARD_SAME54_XPRO
select HAS_PERIPH_RTT
select HAS_PERIPH_PWM
select HAS_PERIPH_SPI
select HAS_PERIPH_QSPI
select HAS_PERIPH_TIMER
select HAS_PERIPH_UART
select HAS_PERIPH_USBDEV
Expand Down
4 changes: 4 additions & 0 deletions boards/same54-xpro/Makefile.dep
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Expand Up @@ -5,3 +5,7 @@ endif
ifneq (,$(filter eui_provider,$(USEMODULE)))
USEMODULE += at24mac
endif

ifneq (,$(filter mtd,$(USEMODULE)))
USEMODULE += mtd_spi_nor_qspi
endif
1 change: 1 addition & 0 deletions boards/same54-xpro/Makefile.features
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Expand Up @@ -7,6 +7,7 @@ FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_qspi
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
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29 changes: 29 additions & 0 deletions boards/same54-xpro/board.c
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Expand Up @@ -20,6 +20,35 @@

#include "board.h"
#include "periph/gpio.h"
#include "mtd_spi_nor.h"
#include "timex.h"

#ifdef MODULE_MTD
/* N25Q256A */
static const mtd_spi_nor_params_t _same54_nor_params = {
.opcode = &mtd_spi_nor_opcode_qspi,
.wait_chip_erase = 240 * US_PER_SEC,
.wait_32k_erase = 700 * US_PER_MS,
.wait_sector_erase = 250 * US_PER_MS,
.wait_chip_wake_up = 1 * US_PER_MS,
.clk = MHZ(54),
.flag = (SPI_NOR_F_SECT_4K | SPI_NOR_F_SECT_64K | SPI_NOR_F_QSPI),
.spi.qspi = QSPI_DEV(0),
.mode = QSPI_MODE_0,
.addr_width = 4,
};

static mtd_spi_nor_t same54_nor_dev = {
.base = {
.driver = &mtd_spi_nor_driver,
.page_size = 256,
.pages_per_sector = 16,
},
.params = &_same54_nor_params,
};

mtd_dev_t *mtd0 = (mtd_dev_t *)&same54_nor_dev;
#endif /* MODULE_MTD */

void board_init(void)
{
Expand Down
9 changes: 9 additions & 0 deletions boards/same54-xpro/include/board.h
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Expand Up @@ -22,6 +22,7 @@

#include "cpu.h"
#include "at24mac.h"
#include "mtd.h"

#ifdef __cplusplus
extern "C" {
Expand Down Expand Up @@ -83,6 +84,14 @@ static inline int _at24mac_get_eui48(const void *arg, eui48_t *addr)
#define BTN0_MODE GPIO_IN_PU
/** @} */

/**
* @name MTD configuration
* @{
*/
extern mtd_dev_t *mtd0;
#define MTD_0 mtd0
/** @} */

/**
* @name Xtimer configuration
* @{
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2 changes: 1 addition & 1 deletion boards/serpente/board.c
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Expand Up @@ -36,7 +36,7 @@ static const mtd_spi_nor_params_t _serpente_nor_params = {
.wait_chip_wake_up = 1LU * US_PER_MS,
.clk = SERPENTE_NOR_SPI_CLK,
.flag = SERPENTE_NOR_FLAGS,
.spi = SERPENTE_NOR_SPI_DEV,
.spi.spi = SERPENTE_NOR_SPI_DEV,
.mode = SERPENTE_NOR_SPI_MODE,
.cs = SERPENTE_NOR_SPI_CS,
.addr_width = 3,
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2 changes: 1 addition & 1 deletion boards/weact-f411ce/board.c
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Expand Up @@ -35,7 +35,7 @@ static const mtd_spi_nor_params_t _weact_nor_params = {
.wait_chip_wake_up = 1LU * US_PER_MS,
.clk = WEACT_411CE_NOR_SPI_CLK,
.flag = WEACT_411CE_NOR_FLAGS,
.spi = WEACT_411CE_NOR_SPI_DEV,
.spi.spi = WEACT_411CE_NOR_SPI_DEV,
.mode = WEACT_411CE_NOR_SPI_MODE,
.cs = WEACT_411CE_NOR_SPI_CS,
.addr_width = 3,
Expand Down
35 changes: 35 additions & 0 deletions cpu/sam0_common/include/periph_cpu_common.h
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Expand Up @@ -377,6 +377,19 @@ typedef enum {
#define spi_pin_clk(dev) spi_config[dev].clk_pin
/** @} */

/**
* @brief Override QSPI modes
* @{
*/
#define HAVE_QSPI_MODE_T
typedef enum {
QSPI_MODE_0 = 0x0, /**< CPOL=0, CPHA=0 */
QSPI_MODE_1 = 0x2, /**< CPOL=0, CPHA=1 */
QSPI_MODE_2 = 0x1, /**< CPOL=1, CPHA=0 */
QSPI_MODE_3 = 0x3 /**< CPOL=1, CPHA=1 */
} qspi_mode_t;
/** @} */

#endif /* ndef DOXYGEN */

/**
Expand Down Expand Up @@ -536,6 +549,28 @@ static inline void sam0_cortexm_sleep(int deep)
#endif
}

/**
* @brief Enable CPU cache
*/
static inline void samd0_cache_enable(void)
{
#ifdef CMCC
CMCC->CTRL.bit.CEN = 1;
#endif
}

/**
* @brief Disable and clear CPU cache
*/
static inline void samd0_cache_disable(void)
{
#ifdef CMCC
CMCC->CTRL.bit.CEN = 0;
while (CMCC->SR.bit.CSTS) {}
CMCC->MAINT0.bit.INVALL = 1;
#endif
}

/**
* @brief Disable alternate function (PMUX setting) for a PORT pin
*
Expand Down
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