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feat(SRAMTemplate): Add parameter separateGateClock to control separate gating of RCLK and WCLK for double-port SRAM #4125

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@Lawrence-ID Lawrence-ID commented Jan 3, 2025

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…te gating of RCLK and WCLK for double-port SRAM
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[Generated by IPC robot]
commit: 2752cd6

commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
2752cd6 1.814 0.442 2.640 1.231 2.152 2.141 2.361 0.933 1.403 1.985 3.107 2.558 2.267 3.308

master branch:

commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
718a93f 0.442 2.639 1.231 2.361 0.933 1.407 2.558 3.308
2f0227e 1.814 0.442 2.640 1.231 2.152 2.141 2.361 0.933 1.406 1.985 3.107 2.558 2.267 3.308
ca892e7 1.814 0.442 2.639 1.231 2.152 2.141 2.360 0.933 1.406 1.985 3.107 2.558 2.267 3.308
51aa1b6 1.814 0.442 2.639 1.231 2.152 2.141 2.360 0.933 1.403 1.985 3.107 2.558 2.267 3.308
ae39693 1.814 0.442 2.639 1.231 2.152 2.141 2.361 0.933 1.403 1.985 3.107 2.558 2.267 3.308

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2 participants