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feat(XSNoCDiffTop): wrap XSNoCTop with Difftest Interface #4089
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May we can replace RELEASE_EXTRA_ARGS with better name. And add |
[Generated by IPC robot]
master branch:
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A better argName for "RELEASE_EXTRA_ARGS" is welcomed. It's just a demo name. BTW, if Perf Counter is fully tested in Palladium and bring no speed loss. We may remove PLDM_ARGS latter to make it aligned with SIM_ARGS. Note current PLDM=1 only works for |
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Mess of commit history. I will rebase it later. |
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This change support switching TOPMAIN_ARGS from RELEASE_ARGS to PLDM_ARGS by setting PLDM=1. For PLDM_ARGS, we make it consistent with DEBUG_ARGS by default. User can set PLDM_ARGS in command line to extend it. Examples as follows: 1. By set PLDM_ARGS="--fpga-platform" and PLDM=1, we will disable XSLog(including PerfCounters) for both verilog and sim-verilog. 2. By set PLDM_ARGS="--diffest-config ESBINP" and PLDM=1, we can accelerate Difftest in Palladium through some optimization feature.
To apply Difftest framework for CHI NoC, we wrapper lazy XSNoCTop inside XSNoCDiffTop when difftest enabled, and expose necessary soc/core/difftest IOs. Currently we use two-step flow for CHI-NoC-XS as follow: Step1. Generate single-core XSNoCDiffTop with JsonProfile, which support generate another DifftestEndpoint seperately. Step2. Generate n-core Difftest according to JsonProfile Step3. Connect XS and Difftest manually or by some scripts. As XSNoCDiffTop is only part of Difftest, we collect PerfCounters for each DiffTop, need control signals passed from Outer module. And to avoid potential connection problem, we add checker module and CI test. An example usage: make verilog PLDM=1 CONFIG=XSNoCTopConfig
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Co-authored-by: Kami <[email protected]>
[Generated by IPC robot]
master branch:
|
build(Makefile): support PLDM_ARGS for make verilog
For PLDM_ARGS, we make it consistent with DEBUG_ARGS by default. User can set PLDM_ARGS in command line to extend it.
Examples as follows:
XSLog(including PerfCounters) for both verilog and sim-verilog.
accelerate Difftest in Palladium through some optimization feature.
feat(XSNoCDiffTop): wrap XSNoCTop with Difftest Interface
To apply Difftest framework for CHI NoC, we wrapper lazy XSNoCTop inside XSNoCDiffTop when difftest enabled, and expose necessary soc/core/difftest IOs.
Currently we use two-step flow for CHI-NoC-XS as follow:
Step1. Generate single-core XSNoCDiffTop with JsonProfile, which support generate another DifftestEndpoint seperately.
Step2. Generate n-core Difftest according to JsonProfile
Step3. Connect XS and Difftest manually or by some scripts.
As XSNoCDiffTop is only part of Difftest, we collect PerfCounters for each DiffTop, need control signals passed from Outer module. And to avoid potential connection problem, we add checker module and CI test.
An example usage:
make verilog PLDM=1 PLDM_ARGS=“--difftest-config H” CONFIG=XSNoCTopConfig