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Auto merge of rust-lang#89698 - matthiaskrgr:rollup-gna54x6, r=matthi…
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Rollup of 10 pull requests

Successful merges:

 - rust-lang#88707 (String.split_terminator: Add an example when using a slice of chars)
 - rust-lang#89605 (Fix stabilization version for `bindings_after_at`)
 - rust-lang#89634 (rustc_driver: Enable the `WARN` log level by default)
 - rust-lang#89641 (make #[target_feature] work with `asm` register classes)
 - rust-lang#89678 (Fix minor std::thread documentation typo)
 - rust-lang#89684 (Fix asm docs typo)
 - rust-lang#89687 (Move `read2_abbreviated` function into read2.rs)
 - rust-lang#89693 (Add #[must_use] to stdin/stdout/stderr locks)
 - rust-lang#89694 (Add #[must_use] to string/char transformation methods)
 - rust-lang#89697 (Fix min LLVM version for bpf-types test)

Failed merges:

r? `@ghost`
`@rustbot` modify labels: rollup
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bors committed Oct 9, 2021
2 parents 910692d + 2e5a5e2 commit bb918d0
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Showing 26 changed files with 361 additions and 205 deletions.
64 changes: 2 additions & 62 deletions compiler/rustc_ast_lowering/src/asm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -202,39 +202,20 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {

let mut used_input_regs = FxHashMap::default();
let mut used_output_regs = FxHashMap::default();
let mut required_features: Vec<&str> = vec![];

for (idx, &(ref op, op_sp)) in operands.iter().enumerate() {
if let Some(reg) = op.reg() {
// Make sure we don't accidentally carry features from the
// previous iteration.
required_features.clear();

let reg_class = reg.reg_class();
if reg_class == asm::InlineAsmRegClass::Err {
continue;
}

// We ignore target feature requirements for clobbers: if the
// feature is disabled then the compiler doesn't care what we
// do with the registers.
//
// Note that this is only possible for explicit register
// operands, which cannot be used in the asm string.
let is_clobber = matches!(
op,
hir::InlineAsmOperand::Out {
reg: asm::InlineAsmRegOrRegClass::Reg(_),
late: _,
expr: None
}
);

// Some register classes can only be used as clobbers. This
// means that we disallow passing a value in/out of the asm and
// require that the operand name an explicit register, not a
// register class.
if reg_class.is_clobber_only(asm_arch.unwrap())
&& !(is_clobber && matches!(reg, asm::InlineAsmRegOrRegClass::Reg(_)))
&& !(op.is_clobber() && matches!(reg, asm::InlineAsmRegOrRegClass::Reg(_)))
{
let msg = format!(
"register class `{}` can only be used as a clobber, \
Expand All @@ -245,47 +226,6 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
continue;
}

if !is_clobber {
// Validate register classes against currently enabled target
// features. We check that at least one type is available for
// the current target.
for &(_, feature) in reg_class.supported_types(asm_arch.unwrap()) {
if let Some(feature) = feature {
if self.sess.target_features.contains(&Symbol::intern(feature)) {
required_features.clear();
break;
} else {
required_features.push(feature);
}
} else {
required_features.clear();
break;
}
}
// We are sorting primitive strs here and can use unstable sort here
required_features.sort_unstable();
required_features.dedup();
match &required_features[..] {
[] => {}
[feature] => {
let msg = format!(
"register class `{}` requires the `{}` target feature",
reg_class.name(),
feature
);
sess.struct_span_err(op_sp, &msg).emit();
}
features => {
let msg = format!(
"register class `{}` requires at least one target feature: {}",
reg_class.name(),
features.join(", ")
);
sess.struct_span_err(op_sp, &msg).emit();
}
}
}

// Check for conflicts between explicit register operands.
if let asm::InlineAsmRegOrRegClass::Reg(reg) = reg {
let (input, output) = match op {
Expand Down
9 changes: 4 additions & 5 deletions compiler/rustc_codegen_ssa/src/back/link.rs
Original file line number Diff line number Diff line change
Expand Up @@ -843,19 +843,18 @@ fn link_natively<'a, B: ArchiveBuilder<'a>>(
let msg_bus = "clang: error: unable to execute command: Bus error: 10";
if out.contains(msg_segv) || out.contains(msg_bus) {
warn!(
?cmd, %out,
"looks like the linker segfaulted when we tried to call it, \
automatically retrying again. cmd = {:?}, out = {}.",
cmd, out,
automatically retrying again",
);
continue;
}

if is_illegal_instruction(&output.status) {
warn!(
?cmd, %out, status = %output.status,
"looks like the linker hit an illegal instruction when we \
tried to call it, automatically retrying again. cmd = {:?}, ]\
out = {}, status = {}.",
cmd, out, output.status,
tried to call it, automatically retrying again.",
);
continue;
}
Expand Down
19 changes: 11 additions & 8 deletions compiler/rustc_driver/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1253,12 +1253,16 @@ pub fn init_rustc_env_logger() {
/// tracing crate version. In contrast to `init_rustc_env_logger` it allows you to choose an env var
/// other than `RUSTC_LOG`.
pub fn init_env_logger(env: &str) {
// Don't register a dispatcher if there's no filter to print anything
match std::env::var(env) {
Err(_) => return,
Ok(s) if s.is_empty() => return,
Ok(_) => {}
}
use tracing_subscriber::{
filter::{self, EnvFilter, LevelFilter},
layer::SubscriberExt,
};

let filter = match std::env::var(env) {
Ok(env) => EnvFilter::from_env(env),
_ => EnvFilter::default().add_directive(filter::Directive::from(LevelFilter::WARN)),
};

let color_logs = match std::env::var(String::from(env) + "_COLOR") {
Ok(value) => match value.as_ref() {
"always" => true,
Expand All @@ -1278,7 +1282,7 @@ pub fn init_env_logger(env: &str) {
"non-Unicode log color value: expected one of always, never, or auto",
),
};
let filter = tracing_subscriber::EnvFilter::from_env(env);

let layer = tracing_tree::HierarchicalLayer::default()
.with_writer(io::stderr)
.with_indent_lines(true)
Expand All @@ -1288,7 +1292,6 @@ pub fn init_env_logger(env: &str) {
#[cfg(parallel_compiler)]
let layer = layer.with_thread_ids(true).with_thread_names(true);

use tracing_subscriber::layer::SubscriberExt;
let subscriber = tracing_subscriber::Registry::default().with(filter).with(layer);
tracing::subscriber::set_global_default(subscriber).unwrap();
}
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_errors/src/emitter.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2308,7 +2308,7 @@ pub fn is_case_difference(sm: &SourceMap, suggested: &str, sp: Span) -> bool {
let found = match sm.span_to_snippet(sp) {
Ok(snippet) => snippet,
Err(e) => {
warn!("Invalid span {:?}. Err={:?}", sp, e);
warn!(error = ?e, "Invalid span {:?}", sp);
return false;
}
};
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_feature/src/accepted.rs
Original file line number Diff line number Diff line change
Expand Up @@ -288,7 +288,7 @@ declare_features! (
(accepted, member_constraints, "1.54.0", Some(61997), None),
/// Allows bindings in the subpattern of a binding pattern.
/// For example, you can write `x @ Some(y)`.
(accepted, bindings_after_at, "1.54.0", Some(65490), None),
(accepted, bindings_after_at, "1.56.0", Some(65490), None),
/// Allows calling `transmute` in const fn
(accepted, const_fn_transmute, "1.56.0", Some(53605), None),
/// Allows accessing fields of unions inside `const` functions.
Expand Down
7 changes: 7 additions & 0 deletions compiler/rustc_hir/src/hir.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2293,6 +2293,13 @@ impl<'hir> InlineAsmOperand<'hir> {
Self::Const { .. } | Self::Sym { .. } => None,
}
}

pub fn is_clobber(&self) -> bool {
matches!(
self,
InlineAsmOperand::Out { reg: InlineAsmRegOrRegClass::Reg(_), late: _, expr: None }
)
}
}

#[derive(Debug, HashStable_Generic)]
Expand Down
4 changes: 2 additions & 2 deletions compiler/rustc_mir_dataflow/src/rustc_peek.rs
Original file line number Diff line number Diff line change
Expand Up @@ -289,7 +289,7 @@ impl<'tcx> RustcPeekAt<'tcx> for MaybeMutBorrowedLocals<'_, 'tcx> {
flow_state: &BitSet<Local>,
call: PeekCall,
) {
warn!("peek_at: place={:?}", place);
info!(?place, "peek_at");
let local = if let Some(l) = place.as_local() {
l
} else {
Expand All @@ -311,7 +311,7 @@ impl<'tcx> RustcPeekAt<'tcx> for MaybeLiveLocals {
flow_state: &BitSet<Local>,
call: PeekCall,
) {
warn!("peek_at: place={:?}", place);
info!(?place, "peek_at");
let local = if let Some(l) = place.as_local() {
l
} else {
Expand Down
136 changes: 120 additions & 16 deletions compiler/rustc_passes/src/intrinsicck.rs
Original file line number Diff line number Diff line change
Expand Up @@ -141,6 +141,7 @@ impl ExprVisitor<'tcx> {
template: &[InlineAsmTemplatePiece],
is_input: bool,
tied_input: Option<(&hir::Expr<'tcx>, Option<InlineAsmType>)>,
target_features: &[Symbol],
) -> Option<InlineAsmType> {
// Check the type against the allowed types for inline asm.
let ty = self.typeck_results.expr_ty_adjusted(expr);
Expand Down Expand Up @@ -283,17 +284,20 @@ impl ExprVisitor<'tcx> {
};

// Check whether the selected type requires a target feature. Note that
// this is different from the feature check we did earlier in AST
// lowering. While AST lowering checked that this register class is
// usable at all with the currently enabled features, some types may
// only be usable with a register class when a certain feature is
// enabled. We check this here since it depends on the results of typeck.
// this is different from the feature check we did earlier. While the
// previous check checked that this register class is usable at all
// with the currently enabled features, some types may only be usable
// with a register class when a certain feature is enabled. We check
// this here since it depends on the results of typeck.
//
// Also note that this check isn't run when the operand type is never
// (!). In that case we still need the earlier check in AST lowering to
// verify that the register class is usable at all.
// (!). In that case we still need the earlier check to verify that the
// register class is usable at all.
if let Some(feature) = feature {
if !self.tcx.sess.target_features.contains(&Symbol::intern(feature)) {
let feat_sym = Symbol::intern(feature);
if !self.tcx.sess.target_features.contains(&feat_sym)
&& !target_features.contains(&feat_sym)
{
let msg = &format!("`{}` target feature is not enabled", feature);
let mut err = self.tcx.sess.struct_span_err(expr.span, msg);
err.note(&format!(
Expand Down Expand Up @@ -349,23 +353,122 @@ impl ExprVisitor<'tcx> {
Some(asm_ty)
}

fn check_asm(&self, asm: &hir::InlineAsm<'tcx>) {
for (idx, (op, _)) in asm.operands.iter().enumerate() {
fn check_asm(&self, asm: &hir::InlineAsm<'tcx>, hir_id: hir::HirId) {
let hir = self.tcx.hir();
let enclosing_id = hir.enclosing_body_owner(hir_id);
let enclosing_def_id = hir.local_def_id(enclosing_id).to_def_id();
let attrs = self.tcx.codegen_fn_attrs(enclosing_def_id);
for (idx, (op, op_sp)) in asm.operands.iter().enumerate() {
// Validate register classes against currently enabled target
// features. We check that at least one type is available for
// the enabled features.
//
// We ignore target feature requirements for clobbers: if the
// feature is disabled then the compiler doesn't care what we
// do with the registers.
//
// Note that this is only possible for explicit register
// operands, which cannot be used in the asm string.
if let Some(reg) = op.reg() {
if !op.is_clobber() {
let mut missing_required_features = vec![];
let reg_class = reg.reg_class();
for &(_, feature) in reg_class.supported_types(self.tcx.sess.asm_arch.unwrap())
{
match feature {
Some(feature) => {
let feat_sym = Symbol::intern(feature);
if self.tcx.sess.target_features.contains(&feat_sym)
|| attrs.target_features.contains(&feat_sym)
{
missing_required_features.clear();
break;
} else {
missing_required_features.push(feature);
}
}
None => {
missing_required_features.clear();
break;
}
}
}

// We are sorting primitive strs here and can use unstable sort here
missing_required_features.sort_unstable();
missing_required_features.dedup();
match &missing_required_features[..] {
[] => {}
[feature] => {
let msg = format!(
"register class `{}` requires the `{}` target feature",
reg_class.name(),
feature
);
self.tcx.sess.struct_span_err(*op_sp, &msg).emit();
// register isn't enabled, don't do more checks
continue;
}
features => {
let msg = format!(
"register class `{}` requires at least one of the following target features: {}",
reg_class.name(),
features.join(", ")
);
self.tcx.sess.struct_span_err(*op_sp, &msg).emit();
// register isn't enabled, don't do more checks
continue;
}
}
}
}

match *op {
hir::InlineAsmOperand::In { reg, ref expr } => {
self.check_asm_operand_type(idx, reg, expr, asm.template, true, None);
self.check_asm_operand_type(
idx,
reg,
expr,
asm.template,
true,
None,
&attrs.target_features,
);
}
hir::InlineAsmOperand::Out { reg, late: _, ref expr } => {
if let Some(expr) = expr {
self.check_asm_operand_type(idx, reg, expr, asm.template, false, None);
self.check_asm_operand_type(
idx,
reg,
expr,
asm.template,
false,
None,
&attrs.target_features,
);
}
}
hir::InlineAsmOperand::InOut { reg, late: _, ref expr } => {
self.check_asm_operand_type(idx, reg, expr, asm.template, false, None);
self.check_asm_operand_type(
idx,
reg,
expr,
asm.template,
false,
None,
&attrs.target_features,
);
}
hir::InlineAsmOperand::SplitInOut { reg, late: _, ref in_expr, ref out_expr } => {
let in_ty =
self.check_asm_operand_type(idx, reg, in_expr, asm.template, true, None);
let in_ty = self.check_asm_operand_type(
idx,
reg,
in_expr,
asm.template,
true,
None,
&attrs.target_features,
);
if let Some(out_expr) = out_expr {
self.check_asm_operand_type(
idx,
Expand All @@ -374,6 +477,7 @@ impl ExprVisitor<'tcx> {
asm.template,
false,
Some((in_expr, in_ty)),
&attrs.target_features,
);
}
}
Expand Down Expand Up @@ -422,7 +526,7 @@ impl Visitor<'tcx> for ExprVisitor<'tcx> {
}
}

hir::ExprKind::InlineAsm(asm) => self.check_asm(asm),
hir::ExprKind::InlineAsm(asm) => self.check_asm(asm, expr.hir_id),

_ => {}
}
Expand Down
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