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[pull] main from llvm:main #5550

Merged
merged 49 commits into from
Feb 7, 2025
Merged

[pull] main from llvm:main #5550

merged 49 commits into from
Feb 7, 2025

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artagnon and others added 30 commits February 7, 2025 13:19
…6055)

A new constraint is also added to restrict attributes values for SPIR-V
attributes. Ideally this should use `ConfinedAttr` with a custom
constraint directly on the operand, however it seems TableGen does not
allow using that with SPIR-V attributes. I suspect it is because SPIR-V
attributes do not derive from the generic MLIR attribute class -
TableGen complains about missing enum field.
This doesn't seem to do any good and breaks a few libc++ tests. Remove
the special case.
….cpp (#126139)

This test does succeed in MinGW configurations.
Fixes codeblock and inline code formatting for the `llvm.modf.*`
intrinsic.
Currently for the test the return address is written to the stack before
loading the argument from an aliasing stack slot.
The result of a call to ieee_support_halting is one of the components
that affect the result of a call to ieee_support_standard.
The type inference for `spv_resource_getpointer` must look at the uses
of the intrinsic. The type of the handle will be a scalar type, but it
can still be read or written as a vector of that type.

Fixes #124551.
When a def in a block A reaches another block B that is in A's iterated
dominance frontier, a phi node is added to B for the def register.

A clobbering def can be created at a call instruction, for a register
clobbered by a call.
However, phi nodes are not created for a register, when one of the
reaching defs of the register is a clobbering def.

This patch adds phi nodes for registers that have a clobbering reaching
def. These additional phis help in checking reaching defs for an
instruction in RDF based copy propagation and addressing mode
optimizations.
These instructions only have one register field in their encoding, so
both registers in the assembly must be the same.

Previously, we were accepting these instructions, but ignoring the
second register operand.

Fixes #126227
This PR adds a default constructor to `nvvm.barrier`, making it more
convenient to build the OP.
It turns out that the new implementation takes significantly more stack
memory for some reason.

This reverts commit 2696e4f.
Support true16 format for v_alignbyte_b32 in MC and CodeGen
This patch does not significantly change how the sequence container
benchmarks are done, but it adopts the same style as the associative
container benchmarks.

This commit does adjust how we were benchmarking push_back, where we
never really measured the overhead of the slow path of push_back (when
we need to reallocate).
…es. (#125434)

As exposed by #125094, we are
missing cost computation for some binary VPInstructions we created based
on original IR instructions. Their cost should be considered.

PR: #125434
This patch improves the GraphViz output of ViewOpGraph
(--view-op-graph).

- Switch to rectangular record-based nodes, inspired by a similar
visualization in [Glow](https://github.com/pytorch/glow). Rectangles
make more efficient use of space when printing text.
- Add input and output ports for each operand and result, and remove
edge labels.
- Switch to a muted color palette to reduce eye strain.
This patch fixes:

  llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp:749:13: error: unused
  variable 'ImageType' [-Werror,-Wunused-variable]
…6254)

vc-git-program is referenced but not defined -- vc-git provides the
definition.
Replace 'undef' with 'poison' based on commit f4e3b87
…ine (#126054)

Given a zext from an extract vector, with a shuffle mask like <4, 0, 0, 4> we
would previously recognize the top half as a deinterleave. In order to convert
into a uzp we should have been checking that the bottom half is also poison.

Fixes #125989
This patch adds intrinsics for tcgen05 wait,
fence and commit PTX instructions.

lit tests are added and verified with a
ptxas-12.8 executable.

Docs are updated in the NVPTXUsage.rst file.

Signed-off-by: Durgadoss R <[email protected]>
petrhosek and others added 19 commits February 7, 2025 08:49
Enable 2-stage builds with PGO.
…5122)

Provide a documentation for FixedPointLiteral explaining which literals
will be matched and which are not. This documentation is compatible with
53e92e4
change.

Co-authored-by: Vladislav Aranov <[email protected]>
…-land #118842 (#126258)

Implement HLSLElementwiseCast excluding support for splat cases
Do not support casting types that contain bitfields.
Partly closes #100609 and
partly closes #100619
Re-land #118842 after fixing warning as an error, found by a buildbot.
Summary:
This patch handles the use of `-Xarch_<arch> -Wl,foo` to send an
argument to the linker for the embedded offloading jobs in the linker
wrapper. This makes it equivalent to `-Xoffload-linker foo`.
I was able to reproduce the issue with the sanitizer buildbot scripts
and confirmed this fixes it.

The issue was the quotes, `"0"` is true in Python so we incorrectly
added the `spirv-tools` feature even when the CMake variable was false.
I don't know why it didn't always fail.

Also add the var to clang's `BUILD.gn` which matches what we do for
other similar variables, however I don't think it has any effect on CI
here.

Signed-off-by: Sarnie, Nick <[email protected]>
This PR adds a folder for `vector.extract(ub.poison) -> ub.poison`. It
also replaces `create` with `createOrFold` insert/extract ops in vector
unroll and transpose lowering patterns to trigger the poison foldings
introduced recently.
#125789)

The shape operand is changed to input shape type since V1.0

Change-Id: I508cc1d67e9b017048b3f29fecf202cb7d707110

Co-authored-by: Won Jeon <[email protected]>
So we can distinguish between debug info sections written to .dwo files
and those written to the object file.
…125613)

This is the first PR that introduces `ub.poison` vectors as part of a
rewrite/conversion pattern in the Vector dialect. It replaces the
`arith.constant dense<0>` vector initialization for
`vector.insert_slice` ops with a poison vector.

This PR depends on all the previous PRs that introduced support for
poison in Vector operations such as `vector.shuffle`, `vector.extract`,
`vector.insert`, including ODS, canonicalization and lowering support.

This PR may improve end-to-end compilation time through LLVM, depending
on the workloads.
`man 3 signal`'s declaration has a face _only a mother could love_.

sighandler_t and __sighandler_t are not defined in the C standard, or POSIX.

They are helpful typedefs provided by glibc and the Linux kernel UAPI headers
respectively since working with function pointers' syntax can be painful. But
we should not rely on them; in C++ we have `auto*` and `using` statements.

Remove the proxy header, and only include a typedef for sighandler_t when
targeting Linux, for compatibility with glibc.

Fixes: #125598
…pose (#126180)

This PR continues with the introduction of poison as initialization
vector, in this particular case, in LowerVectorBitCast,
LowerVectorBroadcast and LowerVectorTranspose.
We've gradually added more information to the RISCVOperand structure,
but the debug output has never caught up, which is quite confusing. This
adds printing for many of additional the fields in the structure, where
they are relevant.

In addition to this, we now have quite a lot of internal registers which
share names with each other - e.g. X0_H, X0_W, X0, X0_Pair all have the
same name - so also print the enum value to differentiate these.
I'm seeing build errors in a downstream project using torch-mlir that
are fixed by this change. See
iree-org/iree#19903 (comment) for
more context. The build error on MSVC is:
```
C:\home\runner\_work\iree\iree\third_party\llvm-project\mlir\include\mlir/Dialect/Tosa/Utils/ConversionUtils.h(148): error C2872: 'OpTrait': ambiguous symbol
C:\home\runner\_work\iree\iree\third_party\llvm-project\mlir\include\mlir/Dialect/Tosa/IR/TosaOps.h(49): note: could be 'mlir::OpTrait'
C:\home\runner\_work\iree\iree\third_party\torch-mlir\include\torch-mlir/Dialect/Torch/IR/TorchTraits.h(23): note: or       'mlir::torch::Torch::OpTrait'
C:\home\runner\_work\iree\iree\third_party\llvm-project\mlir\include\mlir/Dialect/Tosa/Utils/ConversionUtils.h(148): note: the template instantiation context (the oldest one first) is
C:\home\runner\_work\iree\iree\third_party\torch-mlir\lib\Conversion\TorchToTosa\TosaLegalizeCommon.cpp(126): note: see reference to function template instantiation 'TosaOp mlir::tosa::CreateOpAndInfer<mlir::tosa::MulOp,mlir::Value&,mlir::Value&,mlir::Value&>(mlir::PatternRewriter &,mlir::Location,mlir::Type,mlir::Value &,mlir::Value &,mlir::Value &)' being compiled
        with
        [
            TosaOp=mlir::tosa::MulOp
        ]
C:\home\runner\_work\iree\iree\third_party\torch-mlir\include\torch-mlir/Conversion/TorchToTosa/TosaLegalizeUtils.h(83): note: see reference to function template instantiation 'TosaOp mlir::tosa::CreateOpAndInfer<TosaOp,mlir::Value&,mlir::Value&,mlir::Value&>(mlir::ImplicitLocOpBuilder &,mlir::Type,mlir::Value &,mlir::Value &,mlir::Value &)' being compiled
        with
        [
            TosaOp=mlir::tosa::MulOp
        ]
C:\home\runner\_work\iree\iree\third_party\torch-mlir\include\torch-mlir/Conversion/TorchToTosa/TosaLegalizeUtils.h(76): note: see reference to function template instantiation 'TosaOp mlir::tosa::CreateOpAndInferShape<TosaOp,mlir::Value&,mlir::Value&,mlir::Value&>(mlir::ImplicitLocOpBuilder &,mlir::Type,mlir::Value &,mlir::Value &,mlir::Value &)' being compiled
        with
        [
            TosaOp=mlir::tosa::MulOp
        ]
```

I think the torch-mlir code here is causing the issue, but I'm not sure
why builds only started failing now:
https://github.com/llvm/torch-mlir/blob/main/include/torch-mlir/Dialect/Torch/IR/TorchTraits.h.
Given that `mlir::OpTrait` already exists, torch-mlir should not be
creating an ambiguous symbol `mlir::torch::Torch::OpTrait`. So while a
better fix would be to the downstream project, being explicit here
doesn't seem that unreasonable to me.
@pull pull bot added the ⤵️ pull label Feb 7, 2025
@pull pull bot merged commit 4df287a into Ericsson:main Feb 7, 2025
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