A thermal-aware optimization for component placement and routing for electronic parts in 3D spacce in order to design and create 3D circuits/PCBs. The main objective of the entire process is to minimize total routing length which corresponds to minimum resistance and signal delay.
The optimization process consists of two main stages.
The first stage is component placement in which a simulated annealing algorithm is used to place the electrical components in a pre-defined 3D container. The optimization process uses direct line distance between component pins.