diff --git a/boards/pimoroni/index.rst b/boards/pimoroni/index.rst new file mode 100644 index 000000000000..3ef61a5969de --- /dev/null +++ b/boards/pimoroni/index.rst @@ -0,0 +1,10 @@ +.. _boards-pimoroni: + +Pimoroni Ltd. +####################### + +.. toctree:: + :maxdepth: 1 + :glob: + + **/* diff --git a/boards/pimoroni/pico_plus2/Kconfig.defconfig b/boards/pimoroni/pico_plus2/Kconfig.defconfig new file mode 100644 index 000000000000..35cdf9270546 --- /dev/null +++ b/boards/pimoroni/pico_plus2/Kconfig.defconfig @@ -0,0 +1,9 @@ +# Copyright (c) 2024 TOKITA Hiroshi +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_PICO_PLUS2 + +config USB_SELF_POWERED + default n + +endif # BOARD_PICO_PLUS2 diff --git a/boards/pimoroni/pico_plus2/Kconfig.pico_plus2 b/boards/pimoroni/pico_plus2/Kconfig.pico_plus2 new file mode 100644 index 000000000000..cd30fda60aea --- /dev/null +++ b/boards/pimoroni/pico_plus2/Kconfig.pico_plus2 @@ -0,0 +1,5 @@ +# Copyright (c) 2024 TOKITA Hiroshi +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_PICO_PLUS2 + select SOC_RP2350B_M33 if BOARD_PICO_PLUS2_RP2350B_M33 diff --git a/boards/pimoroni/pico_plus2/board.cmake b/boards/pimoroni/pico_plus2/board.cmake new file mode 100644 index 000000000000..6de42450d892 --- /dev/null +++ b/boards/pimoroni/pico_plus2/board.cmake @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(openocd --cmd-pre-init "source [find interface/cmsis-dap.cfg]") +board_runner_args(openocd --cmd-pre-init "source [find target/rp2350.cfg]") + +# The adapter speed is expected to be set by interface configuration. +# The Raspberry Pi's OpenOCD fork doesn't, so match their documentation at +# https://www.raspberrypi.com/documentation/microcontrollers/debug-probe.html#debugging-with-swd +board_runner_args(openocd --cmd-pre-init "set_adapter_speed_if_not_set 5000") + +board_runner_args(uf2 "--board-id=RP2350") + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/uf2.board.cmake) diff --git a/boards/pimoroni/pico_plus2/board.yml b/boards/pimoroni/pico_plus2/board.yml new file mode 100644 index 000000000000..71acca8e80e8 --- /dev/null +++ b/boards/pimoroni/pico_plus2/board.yml @@ -0,0 +1,6 @@ +board: + name: pico_plus2 + full_name: Pimoroni Pico Plus2 + vendor: pimoroni + socs: + - name: rp2350b diff --git a/boards/pimoroni/pico_plus2/doc/img/pico_plus2.webp b/boards/pimoroni/pico_plus2/doc/img/pico_plus2.webp new file mode 100644 index 000000000000..4d4967b6a58d Binary files /dev/null and b/boards/pimoroni/pico_plus2/doc/img/pico_plus2.webp differ diff --git a/boards/pimoroni/pico_plus2/doc/index.rst b/boards/pimoroni/pico_plus2/doc/index.rst new file mode 100644 index 000000000000..814302fb850e --- /dev/null +++ b/boards/pimoroni/pico_plus2/doc/index.rst @@ -0,0 +1,111 @@ +.. zephyr:board:: pico_plus2 + +Overview +******** + +The `Pimoroni Pico Plus 2`_ is a compact and versatile board featuring the Raspberry Pi RP2350B SoC. +It includes USB Type-C, Qwiic/STEMMA QT connectors, SP/CE connectors, a debug connector, +a reset button, and a BOOT button. + +Hardware +******** + +- Dual Cortex-M33 or Hazard3 processors at up to 150MHz +- 520KB of SRAM, and 4MB of on-board flash memory +- 16MB of on-board QSPI flash (supports XiP) +- 8MB of PSRAM +- USB 1.1 with device and host support +- Low-power sleep and dormant modes +- Drag-and-drop programming using mass storage over USB +- 48 multi-function GPIO pins including 8 that can be used for ADC +- 2 SPI, 2 I2C, 2 UART, 3 12-bit 500ksps Analogue to Digital - Converter (ADC), 24 controllable PWM channels +- 2 Timer with 4 alarms, 1 AON Timer +- Temperature sensor +- 3 Programmable IO (PIO) blocks, 12 state machines total for custom peripheral support +- USB-C connector for power, programming, and data transfer +- Qwiic/STEMMA QT(Qw/ST) connector +- SP/CE connector +- 3-pin debug connector, this can use with `Raspberry Pi Debug Probe`_. +- Reset button and BOOT button (BOOT button also usable as a user switch) + +.. figure:: img/pico_plus2.webp + :align: center + :alt: Pimoroni Pico Plus 2 + + Pimoroni Pico Plus 2 (Image courtesy of Pimoroni) + +Supported Features +================== + +The Pimoroni Pico Plus 2 supports the following hardware features: + +.. list-table:: + :header-rows: 1 + + * - Peripheral + - Kconfig option + - Devicetree compatible + * - NVIC + - N/A + - :dtcompatible:`arm,v8m-nvic` + * - ADC + - :kconfig:option:`CONFIG_ADC` + - :dtcompatible:`raspberrypi,pico-adc` + * - Clock controller + - :kconfig:option:`CONFIG_CLOCK_CONTROL` + - :dtcompatible:`raspberrypi,pico-clock-controller` + * - Counter + - :kconfig:option:`CONFIG_COUNTER` + - :dtcompatible:`raspberrypi,pico-timer` + * - DMA + - :kconfig:option:`CONFIG_DMA` + - :dtcompatible:`raspberrypi,pico-dma` + * - GPIO + - :kconfig:option:`CONFIG_GPIO` + - :dtcompatible:`raspberrypi,pico-gpio` + * - HWINFO + - :kconfig:option:`CONFIG_HWINFO` + - N/A + * - I2C + - :kconfig:option:`CONFIG_I2C` + - :dtcompatible:`snps,designware-i2c` + * - PWM + - :kconfig:option:`CONFIG_PWM` + - :dtcompatible:`raspberrypi,pico-pwm` + * - SPI + - :kconfig:option:`CONFIG_SPI` + - :dtcompatible:`raspberrypi,pico-spi` + * - UART + - :kconfig:option:`CONFIG_SERIAL` + - :dtcompatible:`raspberrypi,pico-uart` + * - USB Device + - :kconfig:option:`CONFIG_USB_DEVICE_STACK` + - :dtcompatible:`raspberrypi,pico-usbd` + * - Watchdog Timer (WDT) + - :kconfig:option:`CONFIG_WATCHDOG` + - :dtcompatible:`raspberrypi,pico-watchdog` + +You can use peripherals that are made by using the PIO. +See :ref:`rpi_pico_pio_based_features` + + +Programming and Debugging +************************* + +The overall explanation regarding flashing and debugging is the same as or ``rpi_pico``. +See :ref:`rpi_pico_flashing_using_openocd` and :ref:`rpi_pico_flashing_using_uf2` +in ``rpi_pico`` documentation. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: pico_plus2 + :goals: build flash + :gen-args: -DOPENOCD=/usr/local/bin/openocd + +.. target-notes:: + +.. _Pimoroni Pico Plus 2: + https://shop.pimoroni.com/products/pimoroni-pico-plus-2 + +.. _Raspberry Pi Debug Probe: + https://www.raspberrypi.com/documentation/microcontrollers/debug-probe.html diff --git a/boards/pimoroni/pico_plus2/pico_plus2-pinctrl.dtsi b/boards/pimoroni/pico_plus2/pico_plus2-pinctrl.dtsi new file mode 100644 index 000000000000..4fac42ca4415 --- /dev/null +++ b/boards/pimoroni/pico_plus2/pico_plus2-pinctrl.dtsi @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2024 TOKITA Hiroshi + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + uart0_default: uart0_default { + group1 { + pinmux = ; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , ; + input-enable; + input-schmitt-enable; + }; + }; + + spi0_default: spi0_default { + group1 { + pinmux = , , ; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + pwm_ch4b_default: pwm_ch4b_default { + group1 { + pinmux = ; + }; + }; + + adc_default: adc_default { + group1 { + pinmux = , , , ; + input-enable; + }; + }; +}; diff --git a/boards/pimoroni/pico_plus2/pico_plus2.dtsi b/boards/pimoroni/pico_plus2/pico_plus2.dtsi new file mode 100644 index 000000000000..9681bf3b15ce --- /dev/null +++ b/boards/pimoroni/pico_plus2/pico_plus2.dtsi @@ -0,0 +1,174 @@ +/* + * Copyright (c) 2024 TOKITA Hiroshi + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include +#include +#include + +#include "pico_plus2-pinctrl.dtsi" + +/ { + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,code-partition = &code_partition; + }; + + aliases { + watchdog0 = &wdt0; + led0 = &led0; + pwm-led0 = &pwm_led0; + sw0 = &user_sw; + }; + + leds { + compatible = "gpio-leds"; + led0: led_0 { + gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>; + label = "LED"; + }; + }; + + pwm_leds { + compatible = "pwm-leds"; + status = "disabled"; + pwm_led0: pwm_led_0 { + pwms = <&pwm 9 PWM_MSEC(20) PWM_POLARITY_NORMAL>; + label = "PWM_LED"; + }; + }; + + buttons { + compatible = "gpio-keys"; + user_sw: user_sw { + gpios = <&gpio0_hi 13 (GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; + + pico_header: connector { + compatible = "raspberrypi,pico-header"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpio0 0 0>, /* GP0 */ + <1 0 &gpio0 1 0>, /* GP1 */ + <2 0 &gpio0 2 0>, /* GP2 */ + <3 0 &gpio0 3 0>, /* GP3 */ + <4 0 &gpio0 4 0>, /* GP4 */ + <5 0 &gpio0 5 0>, /* GP5 */ + <6 0 &gpio0 6 0>, /* GP6 */ + <7 0 &gpio0 7 0>, /* GP7 */ + <8 0 &gpio0 8 0>, /* GP8 */ + <9 0 &gpio0 9 0>, /* GP9 */ + <10 0 &gpio0 10 0>, /* GP10 */ + <11 0 &gpio0 11 0>, /* GP11 */ + <12 0 &gpio0 12 0>, /* GP12 */ + <13 0 &gpio0 13 0>, /* GP13 */ + <14 0 &gpio0 14 0>, /* GP14 */ + <15 0 &gpio0 15 0>, /* GP15 */ + <16 0 &gpio0 16 0>, /* GP16 */ + <17 0 &gpio0 17 0>, /* GP17 */ + <18 0 &gpio0 18 0>, /* GP18 */ + <19 0 &gpio0 19 0>, /* GP19 */ + <20 0 &gpio0 20 0>, /* GP20 */ + <21 0 &gpio0 21 0>, /* GP21 */ + <22 0 &gpio0 22 0>, /* GP22 */ + <26 0 &gpio0 26 0>, /* GP26 */ + <27 0 &gpio0 27 0>, /* GP27 */ + <28 0 &gpio0 28 0>; /* GP28 */ + }; +}; + +&flash0 { + reg = <0x10000000 DT_SIZE_M(16)>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Reserved memory for an image definition block. The block is much + * smaller than 256 bytes, but in practice the linker places the vector + * table at a much larger alignment offset. + */ + image_def: partition@0 { + label = "image_def"; + reg = <0x00000000 0x100>; + read-only; + }; + + /* + * Usable flash. Starts at 0x100, after the image definition block. + * The partition size is 16MB minus the 0x100 bytes taken by the + * image definition. + */ + code_partition: partition@100 { + label = "code-partition"; + reg = <0x100 (DT_SIZE_M(16) - 0x100)>; + read-only; + }; + }; +}; + +&uart0 { + current-speed = <115200>; + status = "okay"; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +gpio0_lo: &gpio0 { + status = "okay"; +}; + +&gpio0_hi { + status = "okay"; +}; + +&spi0 { + clock-frequency = ; + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; +}; + +&i2c0 { + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&adc { + pinctrl-0 = <&adc_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&pwm { + pinctrl-0 = <&pwm_ch4b_default>; + pinctrl-names = "default"; + divider-int-0 = <255>; +}; + +&timer0 { + status = "okay"; +}; + +zephyr_udc0: &usbd { + status = "okay"; +}; + + +pico_spi: &spi0 {}; +pico_i2c0: &i2c0 {}; +pico_i2c1: &i2c1 {}; +pico_serial: &uart0 {}; +stemma_qt_i2c: &i2c0 {}; diff --git a/boards/pimoroni/pico_plus2/pico_plus2_rp2350b_m33.dts b/boards/pimoroni/pico_plus2/pico_plus2_rp2350b_m33.dts new file mode 100644 index 000000000000..425c2237f735 --- /dev/null +++ b/boards/pimoroni/pico_plus2/pico_plus2_rp2350b_m33.dts @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2024 TOKITA Hiroshi + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +/* The build system assumes that there's a cpucluster-specific file. + * + * This file provides composition of the device tree: + * 1. The common features of the SoC + * 2. Core-specific configuration. + * 3. Board-specific configuration. + */ +#include +#include + +/* there's nothing specific to the Cortex-M33 cores vs the (not yet + * implemented) Hazard3 cores. + */ +#include "pico_plus2.dtsi" diff --git a/boards/pimoroni/pico_plus2/pico_plus2_rp2350b_m33.yaml b/boards/pimoroni/pico_plus2/pico_plus2_rp2350b_m33.yaml new file mode 100644 index 000000000000..c4a91adfac8c --- /dev/null +++ b/boards/pimoroni/pico_plus2/pico_plus2_rp2350b_m33.yaml @@ -0,0 +1,20 @@ +identifier: pico_plus2/rp2350b/m33 +name: Pimoroni Pico Plus 2 (Cortex-M33) +type: mcu +arch: arm +flash: 16384 +ram: 8192 +toolchain: + - zephyr + - gnuarmemb +supported: + - adc + - clock + - counter + - dma + - gpio + - hwinfo + - i2c + - pwm + - spi + - uart diff --git a/boards/pimoroni/pico_plus2/pico_plus2_rp2350b_m33_defconfig b/boards/pimoroni/pico_plus2/pico_plus2_rp2350b_m33_defconfig new file mode 100644 index 000000000000..8bd68e351139 --- /dev/null +++ b/boards/pimoroni/pico_plus2/pico_plus2_rp2350b_m33_defconfig @@ -0,0 +1,14 @@ +# This configuration is orthogonal to whether the Cortex-M33 or Hazard3 cores +# are in use, but Zephyr does not support providing a qualifier-agnostic +# _defconfig file. +CONFIG_BUILD_OUTPUT_HEX=y +CONFIG_BUILD_OUTPUT_UF2=y +CONFIG_CLOCK_CONTROL=y +CONFIG_CONSOLE=y +CONFIG_GPIO=y +CONFIG_RESET=y +CONFIG_SERIAL=y +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=150000000 +CONFIG_UART_CONSOLE=y +CONFIG_UART_INTERRUPT_DRIVEN=y +CONFIG_USE_DT_CODE_PARTITION=y diff --git a/boards/pimoroni/pico_plus2/support/openocd.cfg b/boards/pimoroni/pico_plus2/support/openocd.cfg new file mode 100644 index 000000000000..82666bb53314 --- /dev/null +++ b/boards/pimoroni/pico_plus2/support/openocd.cfg @@ -0,0 +1,11 @@ +# Copyright (c) 2024 TOKITA Hiroshi +# SPDX-License-Identifier: Apache-2.0 + +# Checking and set 'adapter speed'. +# Set the adaptor speed, if unset, and given as an argument. +proc set_adapter_speed_if_not_set { speed } { + puts "checking adapter speed..." + if { [catch {adapter speed} ret] } { + adapter speed $speed + } +} diff --git a/boards/raspberrypi/rpi_pico/doc/index.rst b/boards/raspberrypi/rpi_pico/doc/index.rst index 71f5b42003e3..ebee574d1962 100644 --- a/boards/raspberrypi/rpi_pico/doc/index.rst +++ b/boards/raspberrypi/rpi_pico/doc/index.rst @@ -3,16 +3,20 @@ Overview ******** -The Raspberry Pi Pico and Pico W are small, low-cost, versatile boards from -Raspberry Pi. They are equipped with an RP2040 SoC, an on-board LED, -a USB connector, and an SWD interface. The Pico W additionally contains an -Infineon CYW43439 2.4 GHz Wi-Fi/Bluetooth module. The USB bootloader allows the -ability to flash without any adapter, in a drag-and-drop manner. +The `Raspberry Pi Pico`_ and Pico W are small, low-cost, versatile boards from +Raspberry Pi. They are equipped with an `RP2040 `_ SoC, an on-board LED, +a USB connector, and an SWD interface. + +The Pico W additionally contains an `Infineon CYW43439`_ 2.4 GHz Wi-Fi/Bluetooth module. + +The USB bootloader allows the ability to flash without any adapter, +in a drag-and-drop manner. It is also possible to flash and debug the boards with their SWD interface, using an external adapter. Hardware ******** + - Dual core Arm Cortex-M0+ processor running up to 133MHz - 264KB on-chip SRAM - 2MB on-board QSPI flash with XIP capabilities @@ -44,7 +48,7 @@ Hardware Supported Features ================== -The rpi_pico board configuration supports the following +The ``rpi_pico`` board configuration supports the following hardware features: .. list-table:: @@ -85,16 +89,10 @@ hardware features: - :dtcompatible:`raspberrypi,pico-pwm` * - Flash - :kconfig:option:`CONFIG_FLASH` - - :dtcompatible:`raspberrypi,pico-flash` + - :dtcompatible:`raspberrypi,pico-flash-controller` * - Clock controller - :kconfig:option:`CONFIG_CLOCK_CONTROL` - :dtcompatible:`raspberrypi,pico-clock-controller` - * - UART (PIO) - - :kconfig:option:`CONFIG_SERIAL` - - :dtcompatible:`raspberrypi,pico-uart-pio` - * - SPI (PIO) - - :kconfig:option:`CONFIG_SPI` - - :dtcompatible:`raspberrypi,pico-spi-pio` .. _rpi_pico_pin_mapping: @@ -133,7 +131,8 @@ Default Zephyr Peripheral Mapping: Programmable I/O (PIO) ********************** -The RP2040 SoC comes with two PIO periherals. These are two simple + +The RP2040 SoC comes with two PIO peripherals. These are two simple co-processors that are designed for I/O operations. The PIOs run a custom instruction set, generated from a custom assembly language. PIO programs are assembled using :command:`pioasm`, a tool provided by Raspberry Pi. @@ -152,9 +151,33 @@ combination of GPIO pins for an SPI bus, as well as allowing up to four independent SPI buses on a single board (using the two SPI devices as well as both PIO devices). +.. _rpi_pico_pio_based_features: + +PIO Based Features +================== + +Raspberry Pi Pico's PIO is a programmable chip that can implement a variety of peripherals. + +.. list-table:: + :header-rows: 1 + + * - UART (PIO) + - :kconfig:option:`CONFIG_SERIAL` + - :dtcompatible:`raspberrypi,pico-uart-pio` + * - SPI (PIO) + - :kconfig:option:`CONFIG_SPI` + - :dtcompatible:`raspberrypi,pico-spi-pio` + * - WS2812 (PIO) + - :kconfig:option:`CONFIG_LED_STRIP` + - :dtcompatible:`worldsemi,ws2812-rpi_pico-pio` + Programming and Debugging ************************* +Applications for the ``rpi_pico`` board configuration can be built and +flashed in the usual way (see :ref:`build_an_application` and +:ref:`application_run` for more details). + System requirements =================== @@ -172,14 +195,32 @@ provided by Infineon. Run the command below to retrieve those files: It is recommended running the command above after :file:`west update`. +Debug Probe and Host Tools +-------------------------- + +Several debugging tools support the Raspberry Pi Pico. +The `Raspberry Pi Debug Probe`_ is an easy-to-obtain CMSIS-DAP adapter +officially provided by the Raspberry Pi Foundation, +making it a convenient choice for debugging ``rpi_pico``. + +It can be used with + +- :ref:`openocd-debug-host-tools` +- :ref:`pyocd-debug-host-tools` + +OpenOCD is the default for ``rpi_pico``. + +- `SEGGER J-Link`_ +- `Black Magic Debug Probe `_ + +are also you can use. +These are used with dedicated probes. + Flashing ======== -Using SEGGER JLink ------------------- - -You can Flash the rpi_pico with a SEGGER JLink debug probe as described in -:ref:`Building, Flashing and Debugging `. +The ``rpi_pico`` can flash with Zephyr's standard method. +See also :ref:`Building, Flashing and Debugging`. Here is an example of building and flashing the :zephyr:code-sample:`blinky` application. @@ -188,51 +229,42 @@ Here is an example of building and flashing the :zephyr:code-sample:`blinky` app :board: rpi_pico :goals: build -.. code-block:: bash +.. code-block:: console west flash --runner jlink -Using OpenOCD -------------- - -To use CMSIS-DAP, You must configure **udev**. -Create a file in /etc/udev.rules.d with any name, and write the line below. +.. _rpi_pico_flashing_using_openocd: -.. code-block:: bash - - ATTRS{idVendor}=="2e8a", ATTRS{idProduct}=="000c", MODE="660", GROUP="plugdev", TAG+="uaccess" +Using OpenOCD +------------- -This example is valid for the case that the user joins to ``plugdev`` groups. +To use a debugging adapter such as the Raspberry Pi Debug Probe, +You must configure **udev**. Refer to :ref:`setting-udev-rules` for details. The Raspberry Pi Pico has an SWD interface that can be used to program -and debug the on board RP2040. This interface can be utilized by OpenOCD. -To use it with the RP2040, OpenOCD version 0.12.0 or later is needed. +and debug the onboard SoC. This interface can be used with OpenOCD. +To use it, OpenOCD version 0.12.0 or later is needed. If you are using a Debian based system (including RaspberryPi OS, Ubuntu. and more), using the `pico_setup.sh`_ script is a convenient way to set up the forked version of OpenOCD. -Depending on the interface used (such as JLink), you might need to -checkout to a branch that supports this interface, before proceeding. -Build and install OpenOCD as described in the README. - Here is an example of building and flashing the :zephyr:code-sample:`blinky` application. .. zephyr-app-commands:: :zephyr-app: samples/basic/blinky :board: rpi_pico :goals: build flash - :gen-args: -DOPENOCD=/usr/local/bin/openocd -DOPENOCD_DEFAULT_PATH=/usr/local/share/openocd/scripts -DRPI_PICO_DEBUG_ADAPTER=cmsis-dap + :gen-args: -DOPENOCD=/usr/local/bin/openocd -DRPI_PICO_DEBUG_ADAPTER=cmsis-dap -Set the environment variables **OPENOCD** to :file:`/usr/local/bin/openocd` -and **OPENOCD_DEFAULT_PATH** to :file:`/usr/local/share/openocd/scripts`. This should work +Set the CMake option **OPENOCD** to :file:`/usr/local/bin/openocd`. This should work with the OpenOCD that was installed with the default configuration. This configuration also works with an environment that is set up by the `pico_setup.sh`_ script. **RPI_PICO_DEBUG_ADAPTER** specifies what debug adapter is used for debugging. -If **RPI_PICO_DEBUG_ADAPTER** was not assigned, ``cmsis-dap`` is used by default. -The other supported adapters are ``raspberrypi-swd``, ``jlink`` and ``blackmagicprobe``. +If **RPI_PICO_DEBUG_ADAPTER** was not set, ``cmsis-dap`` is used by default. +The ``raspberrypi-swd`` and ``jlink`` are verified to work. How to connect ``cmsis-dap`` and ``raspberrypi-swd`` is described in `Getting Started with Raspberry Pi Pico`_. Any other SWD debug adapter maybe also work with this configuration. @@ -243,12 +275,7 @@ The value of **RPI_PICO_DEBUG_ADAPTER** is cached, so it can be omitted from **RPI_PICO_DEBUG_ADAPTER** is used in an argument to OpenOCD as ``"source [find interface/${RPI_PICO_DEBUG_ADAPTER}.cfg]"``. Thus, **RPI_PICO_DEBUG_ADAPTER** needs to be assigned the file name of the debug adapter. -You can also flash the board with the following -command that directly calls OpenOCD (assuming a SEGGER JLink adapter is used): - -.. code-block:: console - - $ openocd -f interface/jlink.cfg -c 'transport select swd' -f target/rp2040.cfg -c "adapter speed 2000" -c 'targets rp2040.core0' -c 'program path/to/zephyr.elf verify reset exit' +.. _rpi_pico_flashing_using_uf2: Using UF2 --------- @@ -262,59 +289,48 @@ UF2 file should be drag-and-dropped to the device, which will flash the Pico. Debugging ========= -The SWD interface can also be used to debug the board. To achieve this, you can -either use SEGGER JLink or OpenOCD. - -Using SEGGER JLink ------------------- - -Use a SEGGER JLink debug probe and follow the instruction in -:ref:`Building, Flashing and Debugging`. - - -Using OpenOCD -------------- - -Install OpenOCD as described for flashing the board. - -Here is an example for debugging the :zephyr:code-sample:`blinky` application. +Like flashing, debugging can also be performed using Zephyr's standard method +(see :ref:`application_run`). +The following sample demonstrates how to debug using OpenOCD and +the `Raspberry Pi Debug Probe`_. .. zephyr-app-commands:: :zephyr-app: samples/basic/blinky :board: rpi_pico :maybe-skip-config: :goals: debug - :gen-args: -DOPENOCD=/usr/local/bin/openocd -DOPENOCD_DEFAULT_PATH=/usr/local/share/openocd/scripts -DRPI_PICO_DEBUG_ADAPTER=raspberrypi-swd - -As with flashing, you can specify the debug adapter by specifying **RPI_PICO_DEBUG_ADAPTER** -at ``west build`` time. No needs to specify it at ``west debug`` time. - -You can also debug with OpenOCD and gdb launching from command-line. -Run the following command: - -.. code-block:: console - - $ openocd -f interface/jlink.cfg -c 'transport select swd' -f target/rp2040.cfg -c "adapter speed 2000" -c 'targets rp2040.core0' + :gen-args: -DOPENOCD=/usr/local/bin/openocd -DRPI_PICO_DEBUG_ADAPTER=cmsis-dap -On another terminal, run: +The default debugging tool is ``openocd``. +If you use a different tool, specify it with the ``--runner``, +such as ``jlink``. -.. code-block:: console - - $ gdb-multiarch +If you use OpenOCD, see also the description about flashing :ref:`rpi_pico_flashing_using_uf2` +for more information. -Inside gdb, run: -.. code-block:: console +.. target-notes:: - (gdb) tar ext :3333 - (gdb) file path/to/zephyr.elf +.. _Raspberry Pi Pico: + https://www.raspberrypi.com/products/raspberry-pi-pico/ -You can then start debugging the board. +.. _RP2040 Datasheet: + https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf -.. target-notes:: +.. _Infineon CYW43439: + https://www.infineon.com/cms/en/product/wireless-connectivity/airoc-wi-fi-plus-bluetooth-combos/wi-fi-4-802.11n/cyw43439/ .. _pico_setup.sh: https://raw.githubusercontent.com/raspberrypi/pico-setup/master/pico_setup.sh .. _Getting Started with Raspberry Pi Pico: - https://datasheets.raspberrypi.com/pico/getting-started-with-pico.pdf + https://datasheets.raspberrypi.com/pico/getting-started-with-pico.pdf + +.. _Raspberry Pi Debug Probe: + https://www.raspberrypi.com/documentation/microcontrollers/debug-probe.html + +.. _SEGGER J-Link: + https://www.segger.com/products/debug-probes/j-link/ + +.. _Black Magic Debug: + https://black-magic.org/ diff --git a/boards/raspberrypi/rpi_pico2/rpi_pico2.dtsi b/boards/raspberrypi/rpi_pico2/rpi_pico2.dtsi index 85cdb97e8457..349cb28b8686 100644 --- a/boards/raspberrypi/rpi_pico2/rpi_pico2.dtsi +++ b/boards/raspberrypi/rpi_pico2/rpi_pico2.dtsi @@ -97,7 +97,7 @@ pinctrl-names = "default"; }; -&gpio0 { +gpio0_lo: &gpio0 { status = "okay"; }; diff --git a/doc/releases/migration-guide-4.1.rst b/doc/releases/migration-guide-4.1.rst index b11bb2ad5982..45db45d11436 100644 --- a/doc/releases/migration-guide-4.1.rst +++ b/doc/releases/migration-guide-4.1.rst @@ -215,6 +215,11 @@ GPIO * Renamed the device tree property ``off_val`` to ``off-val``. * Renamed the device tree property ``on_val`` to ``on-val``. * Renamed the ``compatible`` from ``ti,ads114s0x-gpio`` to :dtcompatible:`ti,ads1x4s0x-gpio`. +* To support the RP2350B, which has many pins, the RaspberryPi-GPIO configuration has + been changed. The previous role of :dtcompatible:`raspberrypi,rpi-gpio` has been migrated to + :dtcompatible:`raspberrypi,rpi-gpio-port`, and :dtcompatible:`raspberrypi,rpi-gpio` is + now left as a placeholder and mapper. + The labels have also been changed along, so no changes are necessary for regular use. HWSPINLOCK ========== diff --git a/drivers/gpio/Kconfig.rpi_pico b/drivers/gpio/Kconfig.rpi_pico index 64370be497c0..8d75fea44729 100644 --- a/drivers/gpio/Kconfig.rpi_pico +++ b/drivers/gpio/Kconfig.rpi_pico @@ -3,7 +3,7 @@ config GPIO_RPI_PICO default y - depends on DT_HAS_RASPBERRYPI_PICO_GPIO_ENABLED + depends on DT_HAS_RASPBERRYPI_PICO_GPIO_PORT_ENABLED select PICOSDK_USE_GPIO select PINCTRL bool "Raspberry Pi Pico GPIO driver" diff --git a/drivers/gpio/gpio_rpi_pico.c b/drivers/gpio/gpio_rpi_pico.c index 1950144cc726..783bfd79916a 100644 --- a/drivers/gpio/gpio_rpi_pico.c +++ b/drivers/gpio/gpio_rpi_pico.c @@ -15,40 +15,125 @@ #include -#define DT_DRV_COMPAT raspberrypi_pico_gpio +#define DT_DRV_COMPAT raspberrypi_pico_gpio_port #define ALL_EVENTS (GPIO_IRQ_EDGE_FALL | GPIO_IRQ_EDGE_RISE \ | GPIO_IRQ_LEVEL_LOW | GPIO_IRQ_LEVEL_HIGH) +#define GPIO_RPI_PINS_PER_PORT 32 + +#define ADDR_IS_ZERO(n, x) (DT_INST_REG_ADDR(n) == 0) | +#define ADDR_IS_NON_ZERO(n, x) (DT_INST_REG_ADDR(n) != 0) | +#define GPIO_RPI_LO_AVAILABLE (DT_INST_FOREACH_STATUS_OKAY_VARGS(ADDR_IS_ZERO) 0) +#define GPIO_RPI_HI_AVAILABLE (DT_INST_FOREACH_STATUS_OKAY_VARGS(ADDR_IS_NON_ZERO) 0) + +#if GPIO_RPI_HI_AVAILABLE +#define PORT_NO(port) ((((struct gpio_rpi_config *)port->config)->high_dev != NULL) ? 0 : 1) +#else +#define PORT_NO(port) ((int)port & 0) /* generate zero and suppress unused warning */ +#endif + struct gpio_rpi_config { struct gpio_driver_config common; void (*bank_config_func)(void); +#if GPIO_RPI_HI_AVAILABLE + const struct device *high_dev; +#endif }; struct gpio_rpi_data { struct gpio_driver_data common; sys_slist_t callbacks; - uint32_t int_enabled_mask; uint32_t single_ended_mask; uint32_t open_drain_mask; }; +static inline void gpio_set_dir_in_masked_n(uint n, uint32_t mask) +{ + if (!n) { + gpio_set_dir_in_masked(mask); + } else if (n == 1) { +#if PICO_USE_GPIO_COPROCESSOR + gpioc_hi_oe_clr(mask); +#else + sio_hw->gpio_hi_oe_clr = mask; +#endif + } +} + +static inline void gpio_set_dir_out_masked_n(uint n, uint32_t mask) +{ + if (!n) { + gpio_set_dir_out_masked(mask); + } else if (n == 1) { +#if PICO_USE_GPIO_COPROCESSOR + gpioc_hi_oe_set(mask); +#else + sio_hw->gpio_hi_oe_set = mask; +#endif + } +} + +static inline void gpio_set_dir_masked_n(uint n, uint32_t mask, uint32_t value) +{ + if (!n) { + gpio_set_dir_masked(mask, value); + } else if (n == 1) { +#if PICO_USE_GPIO_COPROCESSOR + gpioc_hi_oe_xor((gpioc_hi_oe_get() ^ value) & mask); +#else + sio_hw->gpio_oe_togl = (sio_hw->gpio_hi_oe ^ value) & mask; +#endif + } +} + +static inline uint32_t gpio_get_all_n(uint n) +{ + if (!n) { + return gpio_get_all(); + } else if (n == 1) { +#if PICO_USE_GPIO_COPROCESSOR + return gpioc_hi_in_get(); +#else + return sio_hw->gpio_hi_in; +#endif + } + + return 0; +} + +static inline void gpio_toggle_dir_masked_n(uint n, uint32_t mask) +{ + if (!n) { +#if PICO_USE_GPIO_COPROCESSOR + gpioc_lo_oe_xor(mask); +#else + sio_hw->gpio_oe_togl = mask; +#endif + } else if (n == 1) { +#if PICO_USE_GPIO_COPROCESSOR + gpioc_hi_oe_xor(mask); +#else + sio_hw->gpio_hi_oe_togl = mask; +#endif + } +} + static int gpio_rpi_configure(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags) { + const int offset = GPIO_RPI_PINS_PER_PORT * PORT_NO(dev); struct gpio_rpi_data *data = dev->data; if ((flags & GPIO_DIR_MASK) == GPIO_DISCONNECTED) { return -ENOTSUP; } - gpio_set_pulls(pin, - (flags & GPIO_PULL_UP) != 0U, - (flags & GPIO_PULL_DOWN) != 0U); + gpio_set_pulls(pin + offset, (flags & GPIO_PULL_UP) != 0U, (flags & GPIO_PULL_DOWN) != 0U); /* Avoid gpio_init, since that also clears previously set direction/high/low */ - gpio_set_function(pin, GPIO_FUNC_SIO); + gpio_set_function(pin + offset, GPIO_FUNC_SIO); if (flags & GPIO_OUTPUT) { if (flags & GPIO_SINGLE_ENDED) { @@ -61,32 +146,33 @@ static int gpio_rpi_configure(const struct device *dev, */ if (flags & GPIO_LINE_OPEN_DRAIN) { data->open_drain_mask |= BIT(pin); - gpio_put(pin, 0); - gpio_set_dir(pin, flags & GPIO_OUTPUT_INIT_LOW); + gpio_put(pin + offset, 0); + gpio_set_dir(pin + offset, flags & GPIO_OUTPUT_INIT_LOW); } else { data->open_drain_mask &= ~(BIT(pin)); - gpio_put(pin, 1); - gpio_set_dir(pin, flags & GPIO_OUTPUT_INIT_HIGH); + gpio_put(pin + offset, 1); + gpio_set_dir(pin + offset, flags & GPIO_OUTPUT_INIT_HIGH); } } else { data->single_ended_mask &= ~(BIT(pin)); if (flags & GPIO_OUTPUT_INIT_HIGH) { - gpio_put(pin, 1); + gpio_put(pin + offset, 1); } else if (flags & GPIO_OUTPUT_INIT_LOW) { - gpio_put(pin, 0); + gpio_put(pin + offset, 0); } - gpio_set_dir(pin, GPIO_OUT); + gpio_set_dir(pin + offset, GPIO_OUT); } } else if (flags & GPIO_INPUT) { - gpio_set_dir(pin, GPIO_IN); + gpio_set_dir(pin + offset, GPIO_IN); } return 0; } -static int gpio_rpi_port_get_raw(const struct device *dev, uint32_t *value) +static int gpio_rpi_port_get_raw(const struct device *port, uint32_t *value) { - *value = gpio_get_all(); + *value = gpio_get_all_n(PORT_NO(port)); + return 0; } @@ -94,12 +180,16 @@ static int gpio_rpi_port_set_masked_raw(const struct device *port, uint32_t mask, uint32_t value) { struct gpio_rpi_data *data = port->data; + /* First handle push-pull pins: */ - gpio_put_masked(mask & ~data->single_ended_mask, value); + gpio_put_masked_n(PORT_NO(port), mask & ~data->single_ended_mask, value); /* Then handle open-drain pins: */ - gpio_set_dir_masked(mask & data->single_ended_mask & data->open_drain_mask, ~value); + gpio_set_dir_masked_n(PORT_NO(port), mask & data->single_ended_mask & data->open_drain_mask, + ~value); /* Then handle open-source pins: */ - gpio_set_dir_masked(mask & data->single_ended_mask & ~data->open_drain_mask, value); + gpio_set_dir_masked_n(PORT_NO(port), + mask & data->single_ended_mask & ~data->open_drain_mask, value); + return 0; } @@ -107,12 +197,16 @@ static int gpio_rpi_port_set_bits_raw(const struct device *port, uint32_t pins) { struct gpio_rpi_data *data = port->data; + /* First handle push-pull pins: */ - gpio_set_mask(pins & ~data->single_ended_mask); + gpio_set_mask_n(PORT_NO(port), pins & ~data->single_ended_mask); /* Then handle open-drain pins: */ - gpio_set_dir_in_masked(pins & data->single_ended_mask & data->open_drain_mask); + gpio_set_dir_in_masked_n(PORT_NO(port), + pins & data->single_ended_mask & data->open_drain_mask); /* Then handle open-source pins: */ - gpio_set_dir_out_masked(pins & data->single_ended_mask & ~data->open_drain_mask); + gpio_set_dir_out_masked_n(PORT_NO(port), + pins & data->single_ended_mask & ~data->open_drain_mask); + return 0; } @@ -120,12 +214,16 @@ static int gpio_rpi_port_clear_bits_raw(const struct device *port, uint32_t pins) { struct gpio_rpi_data *data = port->data; + /* First handle push-pull pins: */ - gpio_clr_mask(pins & ~data->single_ended_mask); + gpio_clr_mask_n(PORT_NO(port), pins & ~data->single_ended_mask); /* Then handle open-drain pins: */ - gpio_set_dir_out_masked(pins & data->single_ended_mask & data->open_drain_mask); + gpio_set_dir_out_masked_n(PORT_NO(port), + pins & data->single_ended_mask & data->open_drain_mask); /* Then handle open-source pins: */ - gpio_set_dir_in_masked(pins & data->single_ended_mask & ~data->open_drain_mask); + gpio_set_dir_in_masked_n(PORT_NO(port), + pins & data->single_ended_mask & ~data->open_drain_mask); + return 0; } @@ -133,13 +231,12 @@ static int gpio_rpi_port_toggle_bits(const struct device *port, uint32_t pins) { struct gpio_rpi_data *data = port->data; + /* First handle push-pull pins: */ - gpio_xor_mask(pins & ~data->single_ended_mask); + gpio_xor_mask_n(PORT_NO(port), pins & ~data->single_ended_mask); /* Then handle single-ended pins: */ - /* (unfortunately there's no pico-sdk api call that can be used for this, - * but it's possible by accessing the registers directly) - */ - sio_hw->gpio_oe_togl = (pins & data->single_ended_mask); + gpio_toggle_dir_masked_n(PORT_NO(port), pins & data->single_ended_mask); + return 0; } @@ -148,10 +245,10 @@ static int gpio_rpi_pin_interrupt_configure(const struct device *dev, enum gpio_int_mode mode, enum gpio_int_trig trig) { - struct gpio_rpi_data *data = dev->data; + const int offset = GPIO_RPI_PINS_PER_PORT * PORT_NO(dev); uint32_t events = 0; - gpio_set_irq_enabled(pin, ALL_EVENTS, false); + gpio_set_irq_enabled(pin + offset, ALL_EVENTS, false); if (mode != GPIO_INT_DISABLE) { if (mode & GPIO_INT_EDGE) { if (trig & GPIO_INT_LOW_0) { @@ -168,9 +265,9 @@ static int gpio_rpi_pin_interrupt_configure(const struct device *dev, events |= GPIO_IRQ_LEVEL_HIGH; } } - gpio_set_irq_enabled(pin, events, true); + gpio_set_irq_enabled(pin + offset, events, true); } - WRITE_BIT(data->int_enabled_mask, pin, mode != GPIO_INT_DISABLE); + return 0; } @@ -207,6 +304,18 @@ static void gpio_rpi_isr(const struct device *dev) events = (*status_reg >> 4 * (pin % 8)) & ALL_EVENTS; if (events) { gpio_acknowledge_irq(pin, ALL_EVENTS); + +#if GPIO_RPI_HI_AVAILABLE + if (pin >= GPIO_RPI_PINS_PER_PORT) { + const struct gpio_rpi_config *config = dev->config; + struct gpio_rpi_data *high_data = config->high_dev->data; + + gpio_fire_callbacks(&high_data->callbacks, config->high_dev, + BIT(pin - GPIO_RPI_PINS_PER_PORT)); + continue; + } +#endif + gpio_fire_callbacks(&data->callbacks, dev, BIT(pin)); } } @@ -216,31 +325,56 @@ static int gpio_rpi_bank_init(const struct device *dev) { const struct gpio_rpi_config *config = dev->config; - config->bank_config_func(); + if (config->bank_config_func != NULL) { + config->bank_config_func(); + } + return 0; } -#define GPIO_RPI_INIT(idx) \ - static void bank_##idx##_config_func(void) \ - { \ - IRQ_CONNECT(DT_INST_IRQN(idx), DT_INST_IRQ(idx, priority), \ - gpio_rpi_isr, DEVICE_DT_INST_GET(idx), 0); \ - irq_enable(DT_INST_IRQN(idx)); \ - } \ - static const struct gpio_rpi_config gpio_rpi_##idx##_config = { \ - .bank_config_func = bank_##idx##_config_func, \ - .common = \ - { \ - .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(idx), \ - } \ - }; \ - \ - static struct gpio_rpi_data gpio_rpi_##idx##_data; \ - \ - DEVICE_DT_INST_DEFINE(idx, gpio_rpi_bank_init, NULL, \ - &gpio_rpi_##idx##_data, \ - &gpio_rpi_##idx##_config, \ - POST_KERNEL, CONFIG_GPIO_INIT_PRIORITY, \ - &gpio_rpi_driver_api); +#define GPIO_REG_0U 1 +#define IS_GPIO_RPI_LO_NODE(n) UTIL_CAT(GPIO_REG_, DT_REG_ADDR(n)) + +#define DEVICE_IF_GPIO_RPI_HI_NODE(n) COND_CODE_1(IS_GPIO_RPI_LO_NODE(n), (), (DEVICE_DT_GET(n))) + +#define FIND_GPIO_RPI_HI_DEVICE(n) \ + COND_CODE_1(UTIL_CAT(GPIO_REG_, DT_REG_ADDR(n)), \ + (DT_FOREACH_CHILD(DT_PARENT(n), DEVICE_IF_GPIO_RPI_HI_NODE)), (NULL)) + +#if GPIO_RPI_HI_AVAILABLE +#define GPIO_RPI_INIT_HIGH_DEV(idx) .high_dev = FIND_GPIO_RPI_HI_DEVICE(DT_DRV_INST(idx)), +#else +#define GPIO_RPI_INIT_HIGH_DEV(idx) +#endif + +#define GPIO_RPI_INIT(idx) \ + BUILD_ASSERT(DT_CHILD_NUM(DT_INST_PARENT(idx)) > 0 && \ + DT_CHILD_NUM(DT_INST_PARENT(idx)) <= 2, \ + "raspberrypi,pico-gpio node must have one or two child node."); \ + BUILD_ASSERT(GPIO_RPI_LO_AVAILABLE, \ + "raspberrypi,pico-gpio node must have reg=0 child node."); \ + IF_ENABLED(IS_GPIO_RPI_LO_NODE(DT_DRV_INST(idx)), ( \ + static void bank_##idx##_config_func(void) \ + { \ + IRQ_CONNECT(DT_IRQN(DT_INST_PARENT(idx)), \ + DT_IRQ(DT_INST_PARENT(idx), priority), \ + gpio_rpi_isr, DEVICE_DT_INST_GET(idx), 0); \ + irq_enable(DT_IRQN(DT_INST_PARENT(idx))); \ + } \ + )) \ + static const struct gpio_rpi_config gpio_rpi_##idx##_config = { \ + .common = { \ + .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(idx), \ + }, \ + IF_ENABLED(IS_GPIO_RPI_LO_NODE(DT_DRV_INST(idx)), ( \ + .bank_config_func = bank_##idx##_config_func, \ + )) \ + GPIO_RPI_INIT_HIGH_DEV(idx) \ + }; \ + static struct gpio_rpi_data gpio_rpi_##idx##_data; \ + \ + DEVICE_DT_INST_DEFINE(idx, gpio_rpi_bank_init, NULL, &gpio_rpi_##idx##_data, \ + &gpio_rpi_##idx##_config, POST_KERNEL, CONFIG_GPIO_INIT_PRIORITY, \ + &gpio_rpi_driver_api); DT_INST_FOREACH_STATUS_OKAY(GPIO_RPI_INIT) diff --git a/dts/arm/raspberrypi/rpi_pico/rp2040.dtsi b/dts/arm/raspberrypi/rpi_pico/rp2040.dtsi index 6398674e0e02..9c20584c710e 100644 --- a/dts/arm/raspberrypi/rpi_pico/rp2040.dtsi +++ b/dts/arm/raspberrypi/rpi_pico/rp2040.dtsi @@ -238,14 +238,27 @@ "gpin0", "gpin1"; }; - gpio0: gpio@40014000 { + gpio0_map: gpio@40014000 { compatible = "raspberrypi,pico-gpio"; reg = <0x40014000 DT_SIZE_K(4)>; interrupts = <13 RPI_PICO_DEFAULT_IRQ_PRIORITY>; - gpio-controller; + + gpio-map-mask = <0xffffffe0 0xffffffc0>; + gpio-map-pass-thru = <0x1f 0x3f>; + gpio-map = <0x0 0x0 &gpio0 0x0 0x0>; + #gpio-cells = <2>; - status = "disabled"; - ngpios = <30>; + #address-cells = <1>; + #size-cells = <0>; + + gpio0: gpio-port@0 { + compatible = "raspberrypi,pico-gpio-port"; + reg = <0x0>; + status = "disabled"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <30>; + }; }; uart0: uart@40034000 { diff --git a/dts/arm/raspberrypi/rpi_pico/rp2350.dtsi b/dts/arm/raspberrypi/rpi_pico/rp2350.dtsi index 687cafc19aad..4ddf435a7bca 100644 --- a/dts/arm/raspberrypi/rpi_pico/rp2350.dtsi +++ b/dts/arm/raspberrypi/rpi_pico/rp2350.dtsi @@ -235,13 +235,36 @@ "gpin0", "gpin1"; }; - gpio0: gpio@40028000 { + gpio0_map: gpio@40028000 { compatible = "raspberrypi,pico-gpio"; reg = <0x40028000 DT_SIZE_K(4)>; interrupts = <21 RPI_PICO_DEFAULT_IRQ_PRIORITY>; - gpio-controller; + + gpio-map-mask = <0xffffffe0 0xffffffc0>; + gpio-map-pass-thru = <0x1f 0x3f>; + gpio-map = <0x00 0x0 &gpio0 0x0 0x0 + 0x20 0x0 &gpio0_hi 0x0 0x0>; #gpio-cells = <2>; - status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + + gpio0: gpio-port@0 { + compatible = "raspberrypi,pico-gpio-port"; + reg = <0x0>; + status = "disabled"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + }; + + gpio0_hi: gpio-port@1 { + compatible = "raspberrypi,pico-gpio-port"; + reg = <0x1>; + status = "disabled"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + }; }; uart0: uart@40070000 { diff --git a/dts/arm/raspberrypi/rpi_pico/rp2350b.dtsi b/dts/arm/raspberrypi/rpi_pico/rp2350b.dtsi new file mode 100644 index 000000000000..55b67427237d --- /dev/null +++ b/dts/arm/raspberrypi/rpi_pico/rp2350b.dtsi @@ -0,0 +1,13 @@ +#include + +&gpio0 { + ngpios = <32>; +}; + +&gpio0_hi { + ngpios = <16>; +}; + +&die_temp { + io-channels = <&adc 8>; +}; diff --git a/dts/bindings/gpio/raspberrypi,pico-gpio-port.yaml b/dts/bindings/gpio/raspberrypi,pico-gpio-port.yaml new file mode 100644 index 000000000000..fb4c9e4e737f --- /dev/null +++ b/dts/bindings/gpio/raspberrypi,pico-gpio-port.yaml @@ -0,0 +1,19 @@ +# Copyright (c) 2021, Yonatan Schachter +# SPDX-License-Identifier: Apache-2.0 + +description: Raspberry Pi Pico GPIO Port + +compatible: "raspberrypi,pico-gpio-port" + +include: [gpio-controller.yaml, base.yaml] + +properties: + reg: + required: true + + "#gpio-cells": + const: 2 + +gpio-cells: + - pin + - flags diff --git a/dts/bindings/gpio/raspberrypi,pico-gpio.yaml b/dts/bindings/gpio/raspberrypi,pico-gpio.yaml index 89afb5084b57..dc441964a7bc 100644 --- a/dts/bindings/gpio/raspberrypi,pico-gpio.yaml +++ b/dts/bindings/gpio/raspberrypi,pico-gpio.yaml @@ -1,19 +1,8 @@ -# Copyright (c) 2021, Yonatan Schachter +# Copyright (c) 2024 TOKITA Hiroshi # SPDX-License-Identifier: Apache-2.0 description: Raspberry Pi Pico GPIO compatible: "raspberrypi,pico-gpio" -include: [gpio-controller.yaml, base.yaml] - -properties: - reg: - required: true - - "#gpio-cells": - const: 2 - -gpio-cells: - - pin - - flags +include: [gpio-nexus.yaml, base.yaml] diff --git a/dts/bindings/vendor-prefixes.txt b/dts/bindings/vendor-prefixes.txt index aed12fa9adbd..7782cbebb722 100644 --- a/dts/bindings/vendor-prefixes.txt +++ b/dts/bindings/vendor-prefixes.txt @@ -511,6 +511,7 @@ pervasive Pervasive Displays, Inc. phicomm PHICOMM Co., Ltd. phytec PHYTEC picochip Picochip Ltd +pimoroni Pimoroni Ltd. pine64 Pine64 pineriver Shenzhen PineRiver Designs Co., Ltd. pixart PixArt Imaging Inc. diff --git a/modules/hal_rpi_pico/CMakeLists.txt b/modules/hal_rpi_pico/CMakeLists.txt index 0de932595703..6b5f0d0ad6dd 100644 --- a/modules/hal_rpi_pico/CMakeLists.txt +++ b/modules/hal_rpi_pico/CMakeLists.txt @@ -63,6 +63,7 @@ if(CONFIG_HAS_RPI_PICO) ${rp2_common_dir}/hardware_watchdog/watchdog.c ${rp2_common_dir}/hardware_sync_spin_lock/sync_spin_lock.c ${rp2_common_dir}/hardware_ticks/ticks.c + ${rp2_common_dir}/hardware_xip_cache/xip_cache.c ${rp2_common_dir}/pico_bootrom/bootrom.c ${rp2xxx_dir}/pico_platform/platform.c ) @@ -82,6 +83,7 @@ if(CONFIG_HAS_RPI_PICO) ${rp2_common_dir}/hardware_boot_lock/include ${rp2_common_dir}/hardware_ticks/include ${rp2_common_dir}/hardware_sync_spin_lock/include + ${rp2_common_dir}/hardware_xip_cache/include ${rp2_common_dir}/pico_bootrom/include ${rp2_common_dir}/pico_flash/include ${rp2_common_dir}/pico_platform_compiler/include diff --git a/samples/drivers/adc/adc_dt/boards/pico_plus2_rp2350b_m33.overlay b/samples/drivers/adc/adc_dt/boards/pico_plus2_rp2350b_m33.overlay new file mode 100644 index 000000000000..abf2d227844b --- /dev/null +++ b/samples/drivers/adc/adc_dt/boards/pico_plus2_rp2350b_m33.overlay @@ -0,0 +1,24 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2024 TOKITA Hiroshi + */ + +/ { + zephyr,user { + io-channels = <&adc 0>; + }; +}; + +&adc { + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +}; diff --git a/samples/drivers/counter/alarm/src/main.c b/samples/drivers/counter/alarm/src/main.c index 7a345de8230b..132de7b023ad 100644 --- a/samples/drivers/counter/alarm/src/main.c +++ b/samples/drivers/counter/alarm/src/main.c @@ -54,7 +54,11 @@ struct counter_alarm_cfg alarm_cfg; #elif defined(CONFIG_COUNTER_SNPS_DW) #define TIMER DT_NODELABEL(timer0) #elif defined(CONFIG_COUNTER_TIMER_RPI_PICO) +#ifdef CONFIG_SOC_SERIES_RP2040 #define TIMER DT_NODELABEL(timer) +#elif CONFIG_SOC_SERIES_RP2350 +#define TIMER DT_NODELABEL(timer0) +#endif #elif defined(CONFIG_COUNTER_TIMER_MAX32) #define TIMER DT_NODELABEL(counter0) #elif defined(CONFIG_COUNTER_RA_AGT) diff --git a/samples/drivers/led/pwm/boards/pico_plus2_rp2350b_m33.overlay b/samples/drivers/led/pwm/boards/pico_plus2_rp2350b_m33.overlay new file mode 100644 index 000000000000..565dcd6fbbab --- /dev/null +++ b/samples/drivers/led/pwm/boards/pico_plus2_rp2350b_m33.overlay @@ -0,0 +1,15 @@ +/ { + leds { + status = "disabled"; + }; + + pwm_leds { + status = "okay"; + }; +}; + +&pwm { + status = "okay"; + divider-frac-4 = <15>; + divider-int-4 = <255>; +}; diff --git a/samples/sensor/die_temp_polling/boards/pico_plus2_rp2350b_m33.conf b/samples/sensor/die_temp_polling/boards/pico_plus2_rp2350b_m33.conf new file mode 100644 index 000000000000..488a81dca520 --- /dev/null +++ b/samples/sensor/die_temp_polling/boards/pico_plus2_rp2350b_m33.conf @@ -0,0 +1 @@ +CONFIG_ADC=y diff --git a/samples/sensor/die_temp_polling/boards/pico_plus2_rp2350b_m33.overlay b/samples/sensor/die_temp_polling/boards/pico_plus2_rp2350b_m33.overlay new file mode 100644 index 000000000000..38f5ece1c98a --- /dev/null +++ b/samples/sensor/die_temp_polling/boards/pico_plus2_rp2350b_m33.overlay @@ -0,0 +1,9 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2024 TOKITA Hiroshi + */ + +&die_temp { + status = "okay"; +}; diff --git a/soc/raspberrypi/rpi_pico/rp2350/Kconfig b/soc/raspberrypi/rpi_pico/rp2350/Kconfig index 2de28a5dd56f..28553021e2cb 100644 --- a/soc/raspberrypi/rpi_pico/rp2350/Kconfig +++ b/soc/raspberrypi/rpi_pico/rp2350/Kconfig @@ -18,6 +18,15 @@ config SOC_RP2350A_M33 select CPU_HAS_ARM_MPU select CPU_HAS_ARM_SAU +config SOC_RP2350B_M33 + select ARM + select ARM_TRUSTZONE_M + select CPU_CORTEX_M_HAS_SYSTICK + select CPU_CORTEX_M_HAS_VTOR + select CPU_CORTEX_M33 + select CPU_HAS_ARM_MPU + select CPU_HAS_ARM_SAU + config RP2_REQUIRES_IMAGE_DEFINITION_BLOCK bool default y diff --git a/soc/raspberrypi/rpi_pico/rp2350/Kconfig.soc b/soc/raspberrypi/rpi_pico/rp2350/Kconfig.soc index 19012bb5648a..069bc56cfbf3 100644 --- a/soc/raspberrypi/rpi_pico/rp2350/Kconfig.soc +++ b/soc/raspberrypi/rpi_pico/rp2350/Kconfig.soc @@ -20,5 +20,16 @@ config SOC_RP2350A_M33 help Use the RP2350A with a Cortex-M33 core in both 'sockets'. +config SOC_RP2350B + bool + select SOC_SERIES_RP2350 + +config SOC_RP2350B_M33 + bool + select SOC_RP2350B + help + Use the RP2350B with a Cortex-M33 core in both 'sockets'. + config SOC default "rp2350a" if SOC_RP2350A + default "rp2350b" if SOC_RP2350B diff --git a/soc/raspberrypi/rpi_pico/soc.yml b/soc/raspberrypi/rpi_pico/soc.yml index 32039c209440..fac2f36cd969 100644 --- a/soc/raspberrypi/rpi_pico/soc.yml +++ b/soc/raspberrypi/rpi_pico/soc.yml @@ -9,3 +9,6 @@ family: - name: rp2350a cpuclusters: - name: m33 + - name: rp2350b + cpuclusters: + - name: m33 diff --git a/tests/drivers/adc/adc_api/boards/pico_plus2_rp2350b_m33.overlay b/tests/drivers/adc/adc_api/boards/pico_plus2_rp2350b_m33.overlay new file mode 100644 index 000000000000..1de395543efa --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/pico_plus2_rp2350b_m33.overlay @@ -0,0 +1,33 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2024 TOKITA Hiroshi + */ + +/ { + zephyr,user { + io-channels = <&adc 0>, <&adc 1>; + }; +}; + +&adc { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +}; diff --git a/tests/drivers/dma/loop_transfer/boards/pico_plus2_rp2350b_m33.overlay b/tests/drivers/dma/loop_transfer/boards/pico_plus2_rp2350b_m33.overlay new file mode 100644 index 000000000000..35ee84e3c4ea --- /dev/null +++ b/tests/drivers/dma/loop_transfer/boards/pico_plus2_rp2350b_m33.overlay @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2023 Tokita, Hiroshi + * + * SPDX-License-Identifier: Apache-2.0 + */ + +tst_dma0: &dma { + status = "okay"; +}; diff --git a/tests/drivers/gpio/gpio_api_1pin/boards/pico_plus2_rp2350b_m33.overlay b/tests/drivers/gpio/gpio_api_1pin/boards/pico_plus2_rp2350b_m33.overlay new file mode 100644 index 000000000000..32d95560343d --- /dev/null +++ b/tests/drivers/gpio/gpio_api_1pin/boards/pico_plus2_rp2350b_m33.overlay @@ -0,0 +1,8 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2024 TOKITA Hiroshi + */ + +/* Pico Plus2 is pin-compatible with the RPi-Pico2, so reuse. */ +#include "rpi_pico2_rp2350a_m33.overlay" diff --git a/tests/drivers/gpio/gpio_basic_api/boards/pico_plus2_rp2350b_m33.overlay b/tests/drivers/gpio/gpio_basic_api/boards/pico_plus2_rp2350b_m33.overlay new file mode 100644 index 000000000000..3938f695d9d1 --- /dev/null +++ b/tests/drivers/gpio/gpio_basic_api/boards/pico_plus2_rp2350b_m33.overlay @@ -0,0 +1,8 @@ +/* + * Copyright (c) 2024 TOKITA Hiroshi + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Pico Plus2 is pin-compatible with the RPi-Pico, so reuse. */ +#include "rpi_pico.overlay" diff --git a/tests/drivers/spi/spi_loopback/boards/pico_plus2_rp2350b_m33.conf b/tests/drivers/spi/spi_loopback/boards/pico_plus2_rp2350b_m33.conf new file mode 100644 index 000000000000..53e8607eb619 --- /dev/null +++ b/tests/drivers/spi/spi_loopback/boards/pico_plus2_rp2350b_m33.conf @@ -0,0 +1 @@ +CONFIG_SPI_PL022_DMA=y diff --git a/tests/drivers/spi/spi_loopback/boards/pico_plus2_rp2350b_m33.overlay b/tests/drivers/spi/spi_loopback/boards/pico_plus2_rp2350b_m33.overlay new file mode 100644 index 000000000000..c6f4ecb40b61 --- /dev/null +++ b/tests/drivers/spi/spi_loopback/boards/pico_plus2_rp2350b_m33.overlay @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2022 TOKITA Hiroshi + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&dma { + status = "okay"; +}; + +&spi0 { + cs-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; + + dmas = <&dma 0 RPI_PICO_DMA_SLOT_SPI0_TX 0>, <&dma 1 RPI_PICO_DMA_SLOT_SPI0_RX 0>; + dma-names = "tx", "rx"; + + slow@0 { + compatible = "test-spi-loopback-slow"; + reg = <0>; + spi-max-frequency = <500000>; + }; + fast@0 { + compatible = "test-spi-loopback-fast"; + reg = <0>; + spi-max-frequency = <16000000>; + }; +}; diff --git a/west.yml b/west.yml index c005d3f727e8..144f26563adb 100644 --- a/west.yml +++ b/west.yml @@ -224,7 +224,7 @@ manifest: - hal - name: hal_rpi_pico path: modules/hal/rpi_pico - revision: 7b57b24588797e6e7bf18b6bda168e6b96374264 + revision: pull/9/head groups: - hal - name: hal_silabs