From 05f26444c76aebb3265a0e1ab1af9e514c5fee45 Mon Sep 17 00:00:00 2001 From: Cong Nguyen Huu Date: Wed, 25 Sep 2024 14:00:55 +0700 Subject: [PATCH] samples: boards: nxp: add sample for using psi5 driver Add sample for using psi5 driver on s32z Signed-off-by: Cong Nguyen Huu --- samples/boards/nxp/s32/psi5/CMakeLists.txt | 8 +++ samples/boards/nxp/s32/psi5/README.rst | 33 +++++++++++ .../boards/s32z2xxdc2_s32z270_rtu0.overlay | 58 +++++++++++++++++++ .../boards/s32z2xxdc2_s32z270_rtu1.overlay | 7 +++ samples/boards/nxp/s32/psi5/prj.conf | 3 + samples/boards/nxp/s32/psi5/sample.yaml | 14 +++++ samples/boards/nxp/s32/psi5/src/main.c | 48 +++++++++++++++ 7 files changed, 171 insertions(+) create mode 100644 samples/boards/nxp/s32/psi5/CMakeLists.txt create mode 100644 samples/boards/nxp/s32/psi5/README.rst create mode 100644 samples/boards/nxp/s32/psi5/boards/s32z2xxdc2_s32z270_rtu0.overlay create mode 100644 samples/boards/nxp/s32/psi5/boards/s32z2xxdc2_s32z270_rtu1.overlay create mode 100644 samples/boards/nxp/s32/psi5/prj.conf create mode 100644 samples/boards/nxp/s32/psi5/sample.yaml create mode 100644 samples/boards/nxp/s32/psi5/src/main.c diff --git a/samples/boards/nxp/s32/psi5/CMakeLists.txt b/samples/boards/nxp/s32/psi5/CMakeLists.txt new file mode 100644 index 00000000000000..cc19ea188af9b7 --- /dev/null +++ b/samples/boards/nxp/s32/psi5/CMakeLists.txt @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: Apache-2.0 + +cmake_minimum_required(VERSION 3.20.0) + +find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +project(psi5) + +target_sources(app PRIVATE src/main.c) diff --git a/samples/boards/nxp/s32/psi5/README.rst b/samples/boards/nxp/s32/psi5/README.rst new file mode 100644 index 00000000000000..2ae206a70cd255 --- /dev/null +++ b/samples/boards/nxp/s32/psi5/README.rst @@ -0,0 +1,33 @@ +.. zephyr:code-sample:: nxp_s32_psi5 + :name: NXP S32 Peripheral Sensor Interface (PSI5) + + Use NXP S32 Peripheral Sensor Interface (PSI5). + +Overview +******** + +The sample application shows how to use NXP S32 Peripheral Sensor Interface (PSI5): + +* Receive data +* Transmit data + +Requirements +************ + +This sample requires connecting a wire between pin PA6 (data reception pin) and sensor. + +Building, Flashing and Running +****************************** + +.. zephyr-app-commands:: + :zephyr-app: samples/boards/nxp/s32/psi5 + :board: s32z2xxdc2/s32z270/rtu0 + :goals: build flash + +Sample Output: + +.. code-block:: console + + Rx channel 1 completed + + Tx channel 2 completed diff --git a/samples/boards/nxp/s32/psi5/boards/s32z2xxdc2_s32z270_rtu0.overlay b/samples/boards/nxp/s32/psi5/boards/s32z2xxdc2_s32z270_rtu0.overlay new file mode 100644 index 00000000000000..82bedf73f37a1d --- /dev/null +++ b/samples/boards/nxp/s32/psi5/boards/s32z2xxdc2_s32z270_rtu0.overlay @@ -0,0 +1,58 @@ +/* + * Copyright 2025 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + psi5_0_default: psi5_0_default { + group1 { + pinmux = , ; + output-enable; + }; + group2 { + pinmux = , ; + input-enable; + }; + }; +}; + +&psi5_0 { + pinctrl-0 = <&psi5_0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&psi5_0_ch1 { + period-sync-pulse-us = <500>; + decoder-start-offset-us = <0>; + sync-pulse-width-0-us = <100>; + sync-pulse-width-1-us = <127>; + tx-mode = "long-frame-31"; + num-rx-buf = <32>; + rx-bitrate-kbps = <189>; + array-slot-duration-us = <150>; + array-slot-start-offset-us = <110>; + array-slot-data-length = <16>; + array-slot-data-msb-first = <0>; + array-slot-has-smc = <0>; + array-slot-has-parity = <0>; + status = "okay"; +}; + +&psi5_0_ch2 { + period-sync-pulse-us = <8>; + decoder-start-offset-us = <0>; + sync-pulse-width-0-us = <2>; + sync-pulse-width-1-us = <6>; + tx-mode = "long-frame-31"; + num-rx-buf = <32>; + rx-bitrate-kbps = <189>; + array-slot-duration-us = <500>; + array-slot-start-offset-us = <0>; + array-slot-data-length = <16>; + array-slot-data-msb-first = <0>; + array-slot-has-smc = <0>; + array-slot-has-parity = <0>; + status = "okay"; +}; diff --git a/samples/boards/nxp/s32/psi5/boards/s32z2xxdc2_s32z270_rtu1.overlay b/samples/boards/nxp/s32/psi5/boards/s32z2xxdc2_s32z270_rtu1.overlay new file mode 100644 index 00000000000000..0a3db999430256 --- /dev/null +++ b/samples/boards/nxp/s32/psi5/boards/s32z2xxdc2_s32z270_rtu1.overlay @@ -0,0 +1,7 @@ +/* + * Copyright 2025 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "s32z2xxdc2_s32z270_rtu0.overlay" diff --git a/samples/boards/nxp/s32/psi5/prj.conf b/samples/boards/nxp/s32/psi5/prj.conf new file mode 100644 index 00000000000000..bac255b3c7052b --- /dev/null +++ b/samples/boards/nxp/s32/psi5/prj.conf @@ -0,0 +1,3 @@ +CONFIG_PSI5=y +CONFIG_PSI5_LOG_LEVEL_DBG=y +CONFIG_LOG=y diff --git a/samples/boards/nxp/s32/psi5/sample.yaml b/samples/boards/nxp/s32/psi5/sample.yaml new file mode 100644 index 00000000000000..1fa21692904dce --- /dev/null +++ b/samples/boards/nxp/s32/psi5/sample.yaml @@ -0,0 +1,14 @@ +sample: + description: Sample for using PSI5 driver + name: NXP S32 PSI5 sample + +tests: + sample.boards.nxp_s32.psi5: + platform_allow: + - s32z2xxdc2/s32z270/rtu0 + - s32z2xxdc2/s32z270/rtu1 + - s32z2xxdc2@D/s32z270/rtu0 + - s32z2xxdc2@D/s32z270/rtu1 + depends_on: psi5 + tags: psi5 + harness: sensor diff --git a/samples/boards/nxp/s32/psi5/src/main.c b/samples/boards/nxp/s32/psi5/src/main.c new file mode 100644 index 00000000000000..213bc2b26de283 --- /dev/null +++ b/samples/boards/nxp/s32/psi5/src/main.c @@ -0,0 +1,48 @@ +/* + * Copyright 2025 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +LOG_MODULE_REGISTER(nxp_s32_psi5_sample, LOG_LEVEL_DBG); + +#include + +#include + +#define PSI5_NODE DT_INST(0, nxp_s32_psi5) + +void tx_cb(const struct device *dev, uint8_t channel_id, enum psi5_status status, void *user_data) +{ + LOG_INF("Tx channel %d completed\n", channel_id); +} + +void rx_cb(const struct device *dev, uint8_t channel_id, struct psi5_frame *frame, + enum psi5_status status, void *user_data) +{ + + LOG_INF("Rx channel %d completed\n", channel_id); +} + +int main(void) +{ + const struct device *const dev = DEVICE_DT_GET(PSI5_NODE); + uint64_t send_data = 0x1234; + + /* Test receive data */ + psi5_add_rx_callback(dev, 1, rx_cb, NULL); + + psi5_start_sync(dev, 1); + + k_sleep(K_MSEC(100)); + + psi5_stop_sync(dev, 1); + + /* Test send data */ + psi5_start_sync(dev, 2); + + psi5_send(dev, 2, send_data, K_MSEC(100), tx_cb, NULL); + + return 0; +}