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Thanks everybody for joining. We're going to talk about the data center modular hardware system specification updates today. And I'm Rob Nance with Jabil. Paul Artman with AMD is co-presenting with me.
So as most of you probably know, the DC-MHS is a group of specifications that define the major building blocks necessary to put together modular servers. We've got most of the members that you see down below at this point have created systems using these specifications. We at Jabil have one that's actually in production already. But we've been pretty happy with the variety of systems that have been created. You can see on the side over here we've got short depth edge systems, enterprise, OCP, hyperscale systems. So a good variety of system types have been created. But we are continuing to work on the specifications and try to broaden the scope. So what we're talking about today is a few new things that we're working on to add to these specifications. As you can see in the middle there, the systems that have been created so far were created with the two main board types, motherboard types, the M-HPM of M-DNO and M-FLW. So that stands for density optimized and full width. We're adding another classification called scalable DNO. So we'll talk about that today, the M-SDNO specification. And then a couple of others on the left-hand side over here, we're adding a shared infrastructure or MSIF specification to describe how to put together multi-node systems with these building blocks. And finally, plug and play. So MPNP is defining, we're working towards defining the interoperability, the interfaces and how things need to be interoperable between vendors. So you can put together systems with multi-vendor building blocks and everything eventually, at least everything will work together in a plug and play fashion.
And this is just another way to view the specifications just to it lets me show some leverage specifications a little easier. If you see on the right-hand side of the slide over here, there's a couple of specifications that are key to DC-MHS but are not under the umbrella of MHS. And that is the DC-SCM which is our pluggable management module and the OCP NIC, the OCP MHS card. So both of those are operating under their own work stream in OCP but we do leverage those into the MHS platforms as key building blocks. And on the bottom here, we just have a timeline of kind of where we're at with the specifications that were first created. The 1.0 version of the baseline specs were created in early 2023. It's no accident that on the far side over here, we're calling out Q3 of 2024 because that's the target, we're targeting the OCP Global Summit for having the 1.0 versions of the specs we're talking about today.
And so it kind of, I'll start a little history on that DNO. We had a type 1, 2 and 3 initially with those folks around 19-inch rack and then we went to a newer spec and started adding stuff around 21-inch and it got confusing.So I'll go through that in the next slide. But basically the DNO is a modular infrastructure. What we're showing here is for META. META actually is using that as is. So they can quickly get a board from AMD, from Intel, test it in Interposer and plug it in their chassis so it gives them a lot of flexibility by having known interfaces, known connectors. So for them it's easy to just really evaluate something quickly and very fast to scale into production.
I'll talk about the types a little bit. Initially the target of DC-MHS was 19-inch racks and that was what we initially came out with and we had something called type 1, type 2, type 3 and type 4. But then type 1 got killed and type 3 got killed and then we started adding type 5, 6 and 7 and 8 and it got really confusing. So we decided to change the nomenclature and add a little bit of flexibility out of it. So class A is a 210-millimeter wide. It's designed to have two of those in a 19-inch. Class B is 250-millimeters wide, designed to have two of those in a 21-inch. Class C is going to be the full width of that 19-inch and then class D is the full width of a 21-inch. And as we were looking at it, the actual widths were pretty easy to close on because it's just what fits in a 19-inch and a 21-inch. What we had a little bit harder time is what's the right depth. And so there was a lot of tension around 305 versus 335 and see what would fit the feature set. And then, you know, as we started looking at it, those are all about a single 9-chiper processor. We've lost track of those sometimes. And then once we go to a shatter design, how deep do we need to go? So what we did is we're going to find widths. We're going to have some recommended default length, ranges on length, but actually the length can be anything. So it just gives a lot of flexibility. And the goal is really to be able to leverage this across multiple platforms. What we've seen since the spec came out is we've seen a lot of what we originally called a type 2 but a class A and not a lot of FLWs. We're seeing the industry adopt the spec pretty strongly. And this just gives more flexibility in terms of how we grow it forward.
Kind of get some more details on how it would fit. Half-life would fit easily into a 19-inch rack. You put two of those in there. And then the class B, you put two of those in a 21-inch. We're seeing that class B is really interesting for high-thresholds. And we put two of those in a 21-inch. And it's also interesting for 19-inch because you can put one of those in there, a nice size in terms of panel size. Class D is where we go for the 21-inch full-width with the big board. And class C is kind of placeholder. Class C looks a lot like a FLW to a 19-inch full-width. We haven't seen a lot of support to use that yet. But we want to leave the flexibility so you can do a class C or an FLW around direct plug power supply. But most of the attention really has been around, I'd say, class D and D is probably going to fit.
Okay. Yeah, for plug and play, I wanted to spend some time on this. We at Jabil, as I mentioned before, we have a system that's in production. And we've started to do some interoperability work with that platform. We demonstrated at the OCP Global Summit last year that we successfully integrated an A-speed designed DC-SCM into our system. So we have a Jabil designed DC-SCM. The system can also operate with an A-speed designed DC-SCM. We -- this was kind of, you know, as you look across here, the base specs were 1.0 or 1.X. We've been talking about plug and code as the way to achieve interoperability. That's really what we had to do with -- that was kind of our phase two approach here. That's what we had to do on the Jabil side. It was really some co-design effort. This wasn't terribly difficult or didn't take a long time. I think we worked about six weeks on this. But it did take Jabil, AMI, and A-speed working together, engineers in the lab, in the same lab working together for three to four weeks pretty intensively to get this up and running. So that's kind of what we call plug and code. It's a fair amount of work, not terribly difficult. But it does require tight integration and tight synchronization between the companies. What we're working toward is to eventually get to the baseline, but we have a phase 2.5 where we're calling it plug and play light. So we're starting to work on now the power on boot and discovery of modules in the system. We're starting to work on how that's going to be facilitated with the interfaces that we have. And the goal is eventually to get to this baseline plug and play spec where you can put together a system with multiple vendors building blocks and the system will just work. We will be able to discover all of the various systems, what's in the system, and load the appropriate firmware BIOS and all of that code that makes the system work and the system will boot. So that's kind of our long-term goal that we're shooting for, but we're taking some steps to get there along the way.
So other than plug and play, there are a couple of new things that we're starting to work on. One is 48-volt power distribution. We have been 12-volt power distribution up until this point. We're now starting to do some work on 48-volt power distribution. The 48-volt sub-team is doing a lot of work with the M-HPM team at Workstream. Just to make sure that we have any implications or that we've thought through everything on the M-HPM side for implications there and that we're doing that. We're adding 48 to the support and we know how it's going to impact the M-HPM designs if it does. And then finally, MSIF, that's the shared infrastructure. Paul and I are going to be talking about that in the next session here, so stay around for that. We'll give some more details, but essentially the shared infrastructure, we're just trying to focus on the interoperability and the interfaces. We're not trying to define the chassis or the cooling and power, any of that kind of stuff. We're mainly focusing on what does it take to be interoperable between multiple nodes and the shared infrastructure that will be in that system, whether that's IO or whatever that might be, right, fans, cooling, and all that stuff. How is the interoperability going to work? What interfaces are used and what protocols are used over those interfaces? We'll give some more detail on that one in the next talk.
And so we have the call to action here. We have a lot of stuff posted on the OCP website, so anyone can go download these specs and read through them. We have a wiki out there as well, a lot of training material. So we encourage everyone to go out to the OCP website, download this, contact any of us, any of us that are in OCP or in DC-MHS, feel free to contact us with any questions you have.
Yeah, one thing I was going to add is in terms of DC-MHS, Jabil has done DC-MHS designs for Intel, AMD. We're seeing customers go to DC-MHS on SP5, which is our shipping silicon, and all our next generation silicon will have all the reference designs will be DC-MHS. So we're seeing this really be a tipping point where a lot of the customers are going to move this as kind of a reference design. It makes it consumable. I can take an Ampere design, an Intel design, an AIM design, put it in the same box with a little bit, very minor changes to cabling and other things. So we are seeing a lot of momentum here.
Yeah, good point. So yeah, any questions? If not, we can jump into our next one. We're a little bit ahead. Okay.