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I have been trying to build this project, but I am having problems with bitstream generation. The block_design seems to build just fine, but during the bitstream build, it seems to be looking into a folder that doesn't exist. Am I missing some files?
The exact missing folders are <block_design.gen> and <block_design.srcs>. I have looked inside the <block_design> folder and have only seen block_design.cache, block_design.xpr, block_design.hw, and block_design.ip_user_files.
****** Vivado v2024.1 (64-bit)
**** SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
**** IP Build 5075265 on Wed May 22 21:45:21 MDT 2024
**** SharedData Build 5076995 on Wed May 22 18:29:18 MDT 2024
**** Start of session at: Sat Feb 8 13:05:19 2025
** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
** Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
source make_bitstream.tcl -notrace
INFO: [filemgmt 56-3] Default IP Output Path : Could not find the directory '/users/<folder_name_1>/<folder_name_2>/<folder_name_3>/rfsoc_radio/boards/RFSoC4x2/rfsoc_radio/block_design/block_design.gen/sources_1'.
Scanning sources...
Finished scanning sources
open_project: Time (s): cpu = 00:00:06 ; elapsed = 00:00:06 . Memory (MB): peak = 1682.406 ; gain = 43.836 ; free physical = 23408 ; free virtual = 35868
ERROR: [BD 41-1296] Cannot read block design file <./block_design/block_design.srcs/sources_1/bd/rfsoc_radio/rfsoc_radio.bd>, check for the correct location of the file.
ERROR: [Common 17-39] 'open_bd_design' failed due to earlier errors.
while executing
"open_bd_design ./${overlay_name}/${overlay_name}.srcs/sources_1/bd/${design_name}/${design_name}.bd"
(file "make_bitstream.tcl" line 6)
INFO: [Common 17-206] Exiting Vivado at Sat Feb 8 13:05:30 2025...
make: *** [Makefile:8: bitstream] Error 1
ERROR_MSG_END
Thank you in advance,
Leon
The text was updated successfully, but these errors were encountered:
I have been trying to build this project, but I am having problems with bitstream generation. The block_design seems to build just fine, but during the bitstream build, it seems to be looking into a folder that doesn't exist. Am I missing some files?
The exact missing folders are <block_design.gen> and <block_design.srcs>. I have looked inside the <block_design> folder and have only seen block_design.cache, block_design.xpr, block_design.hw, and block_design.ip_user_files.
Here is the exact error I am getting :
ERROR_MSG_START:
vivado -mode batch -source make_bitstream.tcl -notrace
****** Vivado v2024.1 (64-bit)
**** SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
**** IP Build 5075265 on Wed May 22 21:45:21 MDT 2024
**** SharedData Build 5076995 on Wed May 22 18:29:18 MDT 2024
**** Start of session at: Sat Feb 8 13:05:19 2025
** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
** Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
source make_bitstream.tcl -notrace
INFO: [filemgmt 56-3] Default IP Output Path : Could not find the directory '/users/<folder_name_1>/<folder_name_2>/<folder_name_3>/rfsoc_radio/boards/RFSoC4x2/rfsoc_radio/block_design/block_design.gen/sources_1'.
Scanning sources...
Finished scanning sources
open_project: Time (s): cpu = 00:00:06 ; elapsed = 00:00:06 . Memory (MB): peak = 1682.406 ; gain = 43.836 ; free physical = 23408 ; free virtual = 35868
ERROR: [BD 41-1296] Cannot read block design file <./block_design/block_design.srcs/sources_1/bd/rfsoc_radio/rfsoc_radio.bd>, check for the correct location of the file.
ERROR: [Common 17-39] 'open_bd_design' failed due to earlier errors.
"open_bd_design ./${overlay_name}/${overlay_name}.srcs/sources_1/bd/${design_name}/${design_name}.bd"
(file "make_bitstream.tcl" line 6)
INFO: [Common 17-206] Exiting Vivado at Sat Feb 8 13:05:30 2025...
make: *** [Makefile:8: bitstream] Error 1
ERROR_MSG_END
Thank you in advance,
Leon
The text was updated successfully, but these errors were encountered: