diff --git a/README.md b/README.md
index 301f82dedc..3049961e18 100644
--- a/README.md
+++ b/README.md
@@ -368,6 +368,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :green_heart:  | STM32F401RB<br>STM32F401RC<br>STM32F401RD<br>STM32F401RE | Generic Board | *1.8.0* |  |
 | :green_heart:  | STM32F401VB<br>STM32F401VC<br>STM32F401VD<br>STM32F401VE | Generic Board | *2.0.0* |  |
 | :green_heart:  | STM32F405RG | Generic Board | *1.9.0* |  |
+| :yellow_heart:  | STM32F407IE<br>STM32F407IG | Generic Board | **2.10.0** |  |
 | :green_heart:  | STM32F407VE<br>STM32F407VG | Generic Board | *1.9.0* |  |
 | :green_heart:  | STM32F407ZE<br>STM32F407ZG | Generic Board | *2.0.0* |  |
 | :green_heart:  | STM32F410C8<br>STM32F410CB | Generic Board | *1.9.0* |  |
@@ -382,6 +383,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :green_heart:  | STM32F413RG<br>STM32F413RH | Generic Board | *1.9.0* |  |
 | :green_heart:  | STM32F413ZG<br>STM32F413ZH | Generic Board | *2.0.0* |  |
 | :green_heart:  | STM32F415RG | Generic Board | *1.9.0* |  |
+| :yellow_heart:  | STM32F417IE<br>STM32F417IG | Generic Board | **2.10.0** |  |
 | :green_heart:  | STM32F417VE<br>STM32F417VG | Generic Board | *1.9.0* |  |
 | :green_heart:  | STM32F417ZE<br>STM32F417ZG | Generic Board | *2.0.0* |  |
 | :green_heart:  | STM32F423CH | Generic Board | *1.9.0* |  |
diff --git a/boards.txt b/boards.txt
index a635b5b2e7..989ede4a88 100644
--- a/boards.txt
+++ b/boards.txt
@@ -4847,6 +4847,42 @@ GenF4.menu.pnum.GENERIC_F405RGTX.build.product_line=STM32F405xx
 GenF4.menu.pnum.GENERIC_F405RGTX.build.variant=STM32F4xx/F405RGT_F415RGT
 GenF4.menu.pnum.GENERIC_F405RGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F405.svd
 
+# Generic F407IEHx
+GenF4.menu.pnum.GENERIC_F407IEHX=Generic F407IEHx
+GenF4.menu.pnum.GENERIC_F407IEHX.upload.maximum_size=524288
+GenF4.menu.pnum.GENERIC_F407IEHX.upload.maximum_data_size=131072
+GenF4.menu.pnum.GENERIC_F407IEHX.build.board=GENERIC_F407IEHX
+GenF4.menu.pnum.GENERIC_F407IEHX.build.product_line=STM32F407xx
+GenF4.menu.pnum.GENERIC_F407IEHX.build.variant=STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)
+GenF4.menu.pnum.GENERIC_F407IEHX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F407.svd
+
+# Generic F407IETx
+GenF4.menu.pnum.GENERIC_F407IETX=Generic F407IETx
+GenF4.menu.pnum.GENERIC_F407IETX.upload.maximum_size=524288
+GenF4.menu.pnum.GENERIC_F407IETX.upload.maximum_data_size=131072
+GenF4.menu.pnum.GENERIC_F407IETX.build.board=GENERIC_F407IETX
+GenF4.menu.pnum.GENERIC_F407IETX.build.product_line=STM32F407xx
+GenF4.menu.pnum.GENERIC_F407IETX.build.variant=STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)
+GenF4.menu.pnum.GENERIC_F407IETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F407.svd
+
+# Generic F407IGHx
+GenF4.menu.pnum.GENERIC_F407IGHX=Generic F407IGHx
+GenF4.menu.pnum.GENERIC_F407IGHX.upload.maximum_size=1048576
+GenF4.menu.pnum.GENERIC_F407IGHX.upload.maximum_data_size=131072
+GenF4.menu.pnum.GENERIC_F407IGHX.build.board=GENERIC_F407IGHX
+GenF4.menu.pnum.GENERIC_F407IGHX.build.product_line=STM32F407xx
+GenF4.menu.pnum.GENERIC_F407IGHX.build.variant=STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)
+GenF4.menu.pnum.GENERIC_F407IGHX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F407.svd
+
+# Generic F407IGTx
+GenF4.menu.pnum.GENERIC_F407IGTX=Generic F407IGTx
+GenF4.menu.pnum.GENERIC_F407IGTX.upload.maximum_size=1048576
+GenF4.menu.pnum.GENERIC_F407IGTX.upload.maximum_data_size=131072
+GenF4.menu.pnum.GENERIC_F407IGTX.build.board=GENERIC_F407IGTX
+GenF4.menu.pnum.GENERIC_F407IGTX.build.product_line=STM32F407xx
+GenF4.menu.pnum.GENERIC_F407IGTX.build.variant=STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)
+GenF4.menu.pnum.GENERIC_F407IGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F407.svd
+
 # Generic F407VETx
 GenF4.menu.pnum.GENERIC_F407VETX=Generic F407VETx
 GenF4.menu.pnum.GENERIC_F407VETX.upload.maximum_size=524288
@@ -5216,6 +5252,42 @@ GenF4.menu.pnum.GENERIC_F415RGTX.build.product_line=STM32F415xx
 GenF4.menu.pnum.GENERIC_F415RGTX.build.variant=STM32F4xx/F405RGT_F415RGT
 GenF4.menu.pnum.GENERIC_F415RGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F415.svd
 
+# Generic F417IEHx
+GenF4.menu.pnum.GENERIC_F417IEHX=Generic F417IEHx
+GenF4.menu.pnum.GENERIC_F417IEHX.upload.maximum_size=524288
+GenF4.menu.pnum.GENERIC_F417IEHX.upload.maximum_data_size=131072
+GenF4.menu.pnum.GENERIC_F417IEHX.build.board=GENERIC_F417IEHX
+GenF4.menu.pnum.GENERIC_F417IEHX.build.product_line=STM32F417xx
+GenF4.menu.pnum.GENERIC_F417IEHX.build.variant=STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)
+GenF4.menu.pnum.GENERIC_F417IEHX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F417.svd
+
+# Generic F417IETx
+GenF4.menu.pnum.GENERIC_F417IETX=Generic F417IETx
+GenF4.menu.pnum.GENERIC_F417IETX.upload.maximum_size=524288
+GenF4.menu.pnum.GENERIC_F417IETX.upload.maximum_data_size=131072
+GenF4.menu.pnum.GENERIC_F417IETX.build.board=GENERIC_F417IETX
+GenF4.menu.pnum.GENERIC_F417IETX.build.product_line=STM32F417xx
+GenF4.menu.pnum.GENERIC_F417IETX.build.variant=STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)
+GenF4.menu.pnum.GENERIC_F417IETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F417.svd
+
+# Generic F417IGHx
+GenF4.menu.pnum.GENERIC_F417IGHX=Generic F417IGHx
+GenF4.menu.pnum.GENERIC_F417IGHX.upload.maximum_size=1048576
+GenF4.menu.pnum.GENERIC_F417IGHX.upload.maximum_data_size=131072
+GenF4.menu.pnum.GENERIC_F417IGHX.build.board=GENERIC_F417IGHX
+GenF4.menu.pnum.GENERIC_F417IGHX.build.product_line=STM32F417xx
+GenF4.menu.pnum.GENERIC_F417IGHX.build.variant=STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)
+GenF4.menu.pnum.GENERIC_F417IGHX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F417.svd
+
+# Generic F417IGTx
+GenF4.menu.pnum.GENERIC_F417IGTX=Generic F417IGTx
+GenF4.menu.pnum.GENERIC_F417IGTX.upload.maximum_size=1048576
+GenF4.menu.pnum.GENERIC_F417IGTX.upload.maximum_data_size=131072
+GenF4.menu.pnum.GENERIC_F417IGTX.build.board=GENERIC_F417IGTX
+GenF4.menu.pnum.GENERIC_F417IGTX.build.product_line=STM32F417xx
+GenF4.menu.pnum.GENERIC_F417IGTX.build.variant=STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)
+GenF4.menu.pnum.GENERIC_F417IGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F417.svd
+
 # Generic F417VETx
 GenF4.menu.pnum.GENERIC_F417VETX=Generic F417VETx
 GenF4.menu.pnum.GENERIC_F417VETX.upload.maximum_size=524288
diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake
index 40181d8660..cd9d6504a7 100644
--- a/cmake/boards_db.cmake
+++ b/cmake/boards_db.cmake
@@ -38936,5087 +38936,6079 @@ target_link_options(GENERIC_F405RGTX_hid INTERFACE
 )
 
 
-# GENERIC_F407VETX
+# GENERIC_F407IEHX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F407VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T")
-set(GENERIC_F407VETX_MAXSIZE 524288)
-set(GENERIC_F407VETX_MAXDATASIZE 131072)
-set(GENERIC_F407VETX_MCU cortex-m4)
-set(GENERIC_F407VETX_FPCONF "-")
-add_library(GENERIC_F407VETX INTERFACE)
-target_compile_options(GENERIC_F407VETX INTERFACE
+set(GENERIC_F407IEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F407IEHX_MAXSIZE 524288)
+set(GENERIC_F407IEHX_MAXDATASIZE 131072)
+set(GENERIC_F407IEHX_MCU cortex-m4)
+set(GENERIC_F407IEHX_FPCONF "-")
+add_library(GENERIC_F407IEHX INTERFACE)
+target_compile_options(GENERIC_F407IEHX INTERFACE
   "SHELL:-DSTM32F407xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407VETX_MCU}
+  -mcpu=${GENERIC_F407IEHX_MCU}
 )
-target_compile_definitions(GENERIC_F407VETX INTERFACE
+target_compile_definitions(GENERIC_F407IEHX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F407VETX"
-	"BOARD_NAME=\"GENERIC_F407VETX\""
-	"BOARD_ID=GENERIC_F407VETX"
+	"ARDUINO_GENERIC_F407IEHX"
+	"BOARD_NAME=\"GENERIC_F407IEHX\""
+	"BOARD_ID=GENERIC_F407IEHX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F407VETX INTERFACE
+target_include_directories(GENERIC_F407IEHX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F407VETX_VARIANT_PATH}
+  ${GENERIC_F407IEHX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F407VETX INTERFACE
-  "LINKER:--default-script=${GENERIC_F407VETX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407IEHX INTERFACE
+  "LINKER:--default-script=${GENERIC_F407IEHX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407VETX_MCU}
+  -mcpu=${GENERIC_F407IEHX_MCU}
 )
 
-add_library(GENERIC_F407VETX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F407VETX_serial_disabled INTERFACE
+add_library(GENERIC_F407IEHX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F407IEHX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F407VETX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F407VETX_serial_generic INTERFACE
+add_library(GENERIC_F407IEHX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F407IEHX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F407VETX_serial_none INTERFACE)
-target_compile_options(GENERIC_F407VETX_serial_none INTERFACE
+add_library(GENERIC_F407IEHX_serial_none INTERFACE)
+target_compile_options(GENERIC_F407IEHX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F407VETX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F407VETX_usb_CDC INTERFACE
+add_library(GENERIC_F407IEHX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F407IEHX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F407VETX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F407VETX_usb_CDCgen INTERFACE
+add_library(GENERIC_F407IEHX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F407IEHX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F407VETX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F407VETX_usb_HID INTERFACE
+add_library(GENERIC_F407IEHX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F407IEHX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F407VETX_usb_none INTERFACE)
-target_compile_options(GENERIC_F407VETX_usb_none INTERFACE
+add_library(GENERIC_F407IEHX_usb_none INTERFACE)
+target_compile_options(GENERIC_F407IEHX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F407VETX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F407VETX_xusb_FS INTERFACE
+add_library(GENERIC_F407IEHX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F407IEHX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F407VETX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F407VETX_xusb_HS INTERFACE
+add_library(GENERIC_F407IEHX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F407IEHX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F407VETX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F407VETX_xusb_HSFS INTERFACE
+add_library(GENERIC_F407IEHX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F407IEHX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F407VETX_hid
+# GENERIC_F407IEHX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F407VETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T")
-set(GENERIC_F407VETX_hid_MAXSIZE 524288)
-set(GENERIC_F407VETX_hid_MAXDATASIZE 131072)
-set(GENERIC_F407VETX_hid_MCU cortex-m4)
-set(GENERIC_F407VETX_hid_FPCONF "-")
-add_library(GENERIC_F407VETX_hid INTERFACE)
-target_compile_options(GENERIC_F407VETX_hid INTERFACE
+set(GENERIC_F407IEHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F407IEHX_hid_MAXSIZE 524288)
+set(GENERIC_F407IEHX_hid_MAXDATASIZE 131072)
+set(GENERIC_F407IEHX_hid_MCU cortex-m4)
+set(GENERIC_F407IEHX_hid_FPCONF "-")
+add_library(GENERIC_F407IEHX_hid INTERFACE)
+target_compile_options(GENERIC_F407IEHX_hid INTERFACE
   "SHELL:-DSTM32F407xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407VETX_hid_MCU}
+  -mcpu=${GENERIC_F407IEHX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F407VETX_hid INTERFACE
+target_compile_definitions(GENERIC_F407IEHX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F407VETX"
-	"BOARD_NAME=\"GENERIC_F407VETX\""
-	"BOARD_ID=GENERIC_F407VETX"
+	"ARDUINO_GENERIC_F407IEHX"
+	"BOARD_NAME=\"GENERIC_F407IEHX\""
+	"BOARD_ID=GENERIC_F407IEHX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F407VETX_hid INTERFACE
+target_include_directories(GENERIC_F407IEHX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F407VETX_hid_VARIANT_PATH}
+  ${GENERIC_F407IEHX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F407VETX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F407VETX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407IEHX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F407IEHX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407VETX_hid_MCU}
+  -mcpu=${GENERIC_F407IEHX_hid_MCU}
 )
 
 
-# GENERIC_F407VGTX
+# GENERIC_F407IETX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F407VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T")
-set(GENERIC_F407VGTX_MAXSIZE 1048576)
-set(GENERIC_F407VGTX_MAXDATASIZE 131072)
-set(GENERIC_F407VGTX_MCU cortex-m4)
-set(GENERIC_F407VGTX_FPCONF "-")
-add_library(GENERIC_F407VGTX INTERFACE)
-target_compile_options(GENERIC_F407VGTX INTERFACE
+set(GENERIC_F407IETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F407IETX_MAXSIZE 524288)
+set(GENERIC_F407IETX_MAXDATASIZE 131072)
+set(GENERIC_F407IETX_MCU cortex-m4)
+set(GENERIC_F407IETX_FPCONF "-")
+add_library(GENERIC_F407IETX INTERFACE)
+target_compile_options(GENERIC_F407IETX INTERFACE
   "SHELL:-DSTM32F407xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407VGTX_MCU}
+  -mcpu=${GENERIC_F407IETX_MCU}
 )
-target_compile_definitions(GENERIC_F407VGTX INTERFACE
+target_compile_definitions(GENERIC_F407IETX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F407VGTX"
-	"BOARD_NAME=\"GENERIC_F407VGTX\""
-	"BOARD_ID=GENERIC_F407VGTX"
+	"ARDUINO_GENERIC_F407IETX"
+	"BOARD_NAME=\"GENERIC_F407IETX\""
+	"BOARD_ID=GENERIC_F407IETX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F407VGTX INTERFACE
+target_include_directories(GENERIC_F407IETX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F407VGTX_VARIANT_PATH}
+  ${GENERIC_F407IETX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F407VGTX INTERFACE
-  "LINKER:--default-script=${GENERIC_F407VGTX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407IETX INTERFACE
+  "LINKER:--default-script=${GENERIC_F407IETX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407VGTX_MCU}
+  -mcpu=${GENERIC_F407IETX_MCU}
 )
 
-add_library(GENERIC_F407VGTX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F407VGTX_serial_disabled INTERFACE
+add_library(GENERIC_F407IETX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F407IETX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F407VGTX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F407VGTX_serial_generic INTERFACE
+add_library(GENERIC_F407IETX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F407IETX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F407VGTX_serial_none INTERFACE)
-target_compile_options(GENERIC_F407VGTX_serial_none INTERFACE
+add_library(GENERIC_F407IETX_serial_none INTERFACE)
+target_compile_options(GENERIC_F407IETX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F407VGTX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F407VGTX_usb_CDC INTERFACE
+add_library(GENERIC_F407IETX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F407IETX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F407VGTX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F407VGTX_usb_CDCgen INTERFACE
+add_library(GENERIC_F407IETX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F407IETX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F407VGTX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F407VGTX_usb_HID INTERFACE
+add_library(GENERIC_F407IETX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F407IETX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F407VGTX_usb_none INTERFACE)
-target_compile_options(GENERIC_F407VGTX_usb_none INTERFACE
+add_library(GENERIC_F407IETX_usb_none INTERFACE)
+target_compile_options(GENERIC_F407IETX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F407VGTX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F407VGTX_xusb_FS INTERFACE
+add_library(GENERIC_F407IETX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F407IETX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F407VGTX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F407VGTX_xusb_HS INTERFACE
+add_library(GENERIC_F407IETX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F407IETX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F407VGTX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F407VGTX_xusb_HSFS INTERFACE
+add_library(GENERIC_F407IETX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F407IETX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F407VGTX_hid
+# GENERIC_F407IETX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F407VGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T")
-set(GENERIC_F407VGTX_hid_MAXSIZE 1048576)
-set(GENERIC_F407VGTX_hid_MAXDATASIZE 131072)
-set(GENERIC_F407VGTX_hid_MCU cortex-m4)
-set(GENERIC_F407VGTX_hid_FPCONF "-")
-add_library(GENERIC_F407VGTX_hid INTERFACE)
-target_compile_options(GENERIC_F407VGTX_hid INTERFACE
+set(GENERIC_F407IETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F407IETX_hid_MAXSIZE 524288)
+set(GENERIC_F407IETX_hid_MAXDATASIZE 131072)
+set(GENERIC_F407IETX_hid_MCU cortex-m4)
+set(GENERIC_F407IETX_hid_FPCONF "-")
+add_library(GENERIC_F407IETX_hid INTERFACE)
+target_compile_options(GENERIC_F407IETX_hid INTERFACE
   "SHELL:-DSTM32F407xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407VGTX_hid_MCU}
+  -mcpu=${GENERIC_F407IETX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F407VGTX_hid INTERFACE
+target_compile_definitions(GENERIC_F407IETX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F407VGTX"
-	"BOARD_NAME=\"GENERIC_F407VGTX\""
-	"BOARD_ID=GENERIC_F407VGTX"
+	"ARDUINO_GENERIC_F407IETX"
+	"BOARD_NAME=\"GENERIC_F407IETX\""
+	"BOARD_ID=GENERIC_F407IETX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F407VGTX_hid INTERFACE
+target_include_directories(GENERIC_F407IETX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F407VGTX_hid_VARIANT_PATH}
+  ${GENERIC_F407IETX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F407VGTX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F407VGTX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407IETX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F407IETX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407VGTX_hid_MCU}
+  -mcpu=${GENERIC_F407IETX_hid_MCU}
 )
 
 
-# GENERIC_F407ZETX
+# GENERIC_F407IGHX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F407ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T")
-set(GENERIC_F407ZETX_MAXSIZE 524288)
-set(GENERIC_F407ZETX_MAXDATASIZE 131072)
-set(GENERIC_F407ZETX_MCU cortex-m4)
-set(GENERIC_F407ZETX_FPCONF "-")
-add_library(GENERIC_F407ZETX INTERFACE)
-target_compile_options(GENERIC_F407ZETX INTERFACE
+set(GENERIC_F407IGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F407IGHX_MAXSIZE 1048576)
+set(GENERIC_F407IGHX_MAXDATASIZE 131072)
+set(GENERIC_F407IGHX_MCU cortex-m4)
+set(GENERIC_F407IGHX_FPCONF "-")
+add_library(GENERIC_F407IGHX INTERFACE)
+target_compile_options(GENERIC_F407IGHX INTERFACE
   "SHELL:-DSTM32F407xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407ZETX_MCU}
+  -mcpu=${GENERIC_F407IGHX_MCU}
 )
-target_compile_definitions(GENERIC_F407ZETX INTERFACE
+target_compile_definitions(GENERIC_F407IGHX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F407ZETX"
-	"BOARD_NAME=\"GENERIC_F407ZETX\""
-	"BOARD_ID=GENERIC_F407ZETX"
+	"ARDUINO_GENERIC_F407IGHX"
+	"BOARD_NAME=\"GENERIC_F407IGHX\""
+	"BOARD_ID=GENERIC_F407IGHX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F407ZETX INTERFACE
+target_include_directories(GENERIC_F407IGHX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F407ZETX_VARIANT_PATH}
+  ${GENERIC_F407IGHX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F407ZETX INTERFACE
-  "LINKER:--default-script=${GENERIC_F407ZETX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407IGHX INTERFACE
+  "LINKER:--default-script=${GENERIC_F407IGHX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407ZETX_MCU}
+  -mcpu=${GENERIC_F407IGHX_MCU}
 )
 
-add_library(GENERIC_F407ZETX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F407ZETX_serial_disabled INTERFACE
+add_library(GENERIC_F407IGHX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F407IGHX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F407ZETX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F407ZETX_serial_generic INTERFACE
+add_library(GENERIC_F407IGHX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F407IGHX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F407ZETX_serial_none INTERFACE)
-target_compile_options(GENERIC_F407ZETX_serial_none INTERFACE
+add_library(GENERIC_F407IGHX_serial_none INTERFACE)
+target_compile_options(GENERIC_F407IGHX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F407ZETX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F407ZETX_usb_CDC INTERFACE
+add_library(GENERIC_F407IGHX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F407IGHX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F407ZETX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F407ZETX_usb_CDCgen INTERFACE
+add_library(GENERIC_F407IGHX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F407IGHX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F407ZETX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F407ZETX_usb_HID INTERFACE
+add_library(GENERIC_F407IGHX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F407IGHX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F407ZETX_usb_none INTERFACE)
-target_compile_options(GENERIC_F407ZETX_usb_none INTERFACE
+add_library(GENERIC_F407IGHX_usb_none INTERFACE)
+target_compile_options(GENERIC_F407IGHX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F407ZETX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F407ZETX_xusb_FS INTERFACE
+add_library(GENERIC_F407IGHX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F407IGHX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F407ZETX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F407ZETX_xusb_HS INTERFACE
+add_library(GENERIC_F407IGHX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F407IGHX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F407ZETX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F407ZETX_xusb_HSFS INTERFACE
+add_library(GENERIC_F407IGHX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F407IGHX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F407ZETX_hid
+# GENERIC_F407IGHX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F407ZETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T")
-set(GENERIC_F407ZETX_hid_MAXSIZE 524288)
-set(GENERIC_F407ZETX_hid_MAXDATASIZE 131072)
-set(GENERIC_F407ZETX_hid_MCU cortex-m4)
-set(GENERIC_F407ZETX_hid_FPCONF "-")
-add_library(GENERIC_F407ZETX_hid INTERFACE)
-target_compile_options(GENERIC_F407ZETX_hid INTERFACE
+set(GENERIC_F407IGHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F407IGHX_hid_MAXSIZE 1048576)
+set(GENERIC_F407IGHX_hid_MAXDATASIZE 131072)
+set(GENERIC_F407IGHX_hid_MCU cortex-m4)
+set(GENERIC_F407IGHX_hid_FPCONF "-")
+add_library(GENERIC_F407IGHX_hid INTERFACE)
+target_compile_options(GENERIC_F407IGHX_hid INTERFACE
   "SHELL:-DSTM32F407xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407ZETX_hid_MCU}
+  -mcpu=${GENERIC_F407IGHX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F407ZETX_hid INTERFACE
+target_compile_definitions(GENERIC_F407IGHX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F407ZETX"
-	"BOARD_NAME=\"GENERIC_F407ZETX\""
-	"BOARD_ID=GENERIC_F407ZETX"
+	"ARDUINO_GENERIC_F407IGHX"
+	"BOARD_NAME=\"GENERIC_F407IGHX\""
+	"BOARD_ID=GENERIC_F407IGHX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F407ZETX_hid INTERFACE
+target_include_directories(GENERIC_F407IGHX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F407ZETX_hid_VARIANT_PATH}
+  ${GENERIC_F407IGHX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F407ZETX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F407ZETX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407IGHX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F407IGHX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407ZETX_hid_MCU}
+  -mcpu=${GENERIC_F407IGHX_hid_MCU}
 )
 
 
-# GENERIC_F407ZGTX
+# GENERIC_F407IGTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F407ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T")
-set(GENERIC_F407ZGTX_MAXSIZE 1048576)
-set(GENERIC_F407ZGTX_MAXDATASIZE 131072)
-set(GENERIC_F407ZGTX_MCU cortex-m4)
-set(GENERIC_F407ZGTX_FPCONF "-")
-add_library(GENERIC_F407ZGTX INTERFACE)
-target_compile_options(GENERIC_F407ZGTX INTERFACE
+set(GENERIC_F407IGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F407IGTX_MAXSIZE 1048576)
+set(GENERIC_F407IGTX_MAXDATASIZE 131072)
+set(GENERIC_F407IGTX_MCU cortex-m4)
+set(GENERIC_F407IGTX_FPCONF "-")
+add_library(GENERIC_F407IGTX INTERFACE)
+target_compile_options(GENERIC_F407IGTX INTERFACE
   "SHELL:-DSTM32F407xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407ZGTX_MCU}
+  -mcpu=${GENERIC_F407IGTX_MCU}
 )
-target_compile_definitions(GENERIC_F407ZGTX INTERFACE
+target_compile_definitions(GENERIC_F407IGTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F407ZGTX"
-	"BOARD_NAME=\"GENERIC_F407ZGTX\""
-	"BOARD_ID=GENERIC_F407ZGTX"
+	"ARDUINO_GENERIC_F407IGTX"
+	"BOARD_NAME=\"GENERIC_F407IGTX\""
+	"BOARD_ID=GENERIC_F407IGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F407ZGTX INTERFACE
+target_include_directories(GENERIC_F407IGTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F407ZGTX_VARIANT_PATH}
+  ${GENERIC_F407IGTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F407ZGTX INTERFACE
-  "LINKER:--default-script=${GENERIC_F407ZGTX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407IGTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F407IGTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407ZGTX_MCU}
+  -mcpu=${GENERIC_F407IGTX_MCU}
 )
 
-add_library(GENERIC_F407ZGTX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F407ZGTX_serial_disabled INTERFACE
+add_library(GENERIC_F407IGTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F407IGTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F407ZGTX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F407ZGTX_serial_generic INTERFACE
+add_library(GENERIC_F407IGTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F407IGTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F407ZGTX_serial_none INTERFACE)
-target_compile_options(GENERIC_F407ZGTX_serial_none INTERFACE
+add_library(GENERIC_F407IGTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F407IGTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F407ZGTX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F407ZGTX_usb_CDC INTERFACE
+add_library(GENERIC_F407IGTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F407IGTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F407ZGTX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F407ZGTX_usb_CDCgen INTERFACE
+add_library(GENERIC_F407IGTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F407IGTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F407ZGTX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F407ZGTX_usb_HID INTERFACE
+add_library(GENERIC_F407IGTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F407IGTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F407ZGTX_usb_none INTERFACE)
-target_compile_options(GENERIC_F407ZGTX_usb_none INTERFACE
+add_library(GENERIC_F407IGTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F407IGTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F407ZGTX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F407ZGTX_xusb_FS INTERFACE
+add_library(GENERIC_F407IGTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F407IGTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F407ZGTX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F407ZGTX_xusb_HS INTERFACE
+add_library(GENERIC_F407IGTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F407IGTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F407ZGTX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F407ZGTX_xusb_HSFS INTERFACE
+add_library(GENERIC_F407IGTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F407IGTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F407ZGTX_hid
+# GENERIC_F407IGTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F407ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T")
-set(GENERIC_F407ZGTX_hid_MAXSIZE 1048576)
-set(GENERIC_F407ZGTX_hid_MAXDATASIZE 131072)
-set(GENERIC_F407ZGTX_hid_MCU cortex-m4)
-set(GENERIC_F407ZGTX_hid_FPCONF "-")
-add_library(GENERIC_F407ZGTX_hid INTERFACE)
-target_compile_options(GENERIC_F407ZGTX_hid INTERFACE
+set(GENERIC_F407IGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F407IGTX_hid_MAXSIZE 1048576)
+set(GENERIC_F407IGTX_hid_MAXDATASIZE 131072)
+set(GENERIC_F407IGTX_hid_MCU cortex-m4)
+set(GENERIC_F407IGTX_hid_FPCONF "-")
+add_library(GENERIC_F407IGTX_hid INTERFACE)
+target_compile_options(GENERIC_F407IGTX_hid INTERFACE
   "SHELL:-DSTM32F407xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407ZGTX_hid_MCU}
+  -mcpu=${GENERIC_F407IGTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F407ZGTX_hid INTERFACE
+target_compile_definitions(GENERIC_F407IGTX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F407ZGTX"
-	"BOARD_NAME=\"GENERIC_F407ZGTX\""
-	"BOARD_ID=GENERIC_F407ZGTX"
+	"ARDUINO_GENERIC_F407IGTX"
+	"BOARD_NAME=\"GENERIC_F407IGTX\""
+	"BOARD_ID=GENERIC_F407IGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F407ZGTX_hid INTERFACE
+target_include_directories(GENERIC_F407IGTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F407ZGTX_hid_VARIANT_PATH}
+  ${GENERIC_F407IGTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F407ZGTX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F407ZGTX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407IGTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F407IGTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F407ZGTX_hid_MCU}
+  -mcpu=${GENERIC_F407IGTX_hid_MCU}
 )
 
 
-# GENERIC_F410C8TX
+# GENERIC_F407VETX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)T")
-set(GENERIC_F410C8TX_MAXSIZE 65536)
-set(GENERIC_F410C8TX_MAXDATASIZE 32768)
-set(GENERIC_F410C8TX_MCU cortex-m4)
-set(GENERIC_F410C8TX_FPCONF "-")
-add_library(GENERIC_F410C8TX INTERFACE)
-target_compile_options(GENERIC_F410C8TX INTERFACE
-  "SHELL:-DSTM32F410Cx   "
+set(GENERIC_F407VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T")
+set(GENERIC_F407VETX_MAXSIZE 524288)
+set(GENERIC_F407VETX_MAXDATASIZE 131072)
+set(GENERIC_F407VETX_MCU cortex-m4)
+set(GENERIC_F407VETX_FPCONF "-")
+add_library(GENERIC_F407VETX INTERFACE)
+target_compile_options(GENERIC_F407VETX INTERFACE
+  "SHELL:-DSTM32F407xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410C8TX_MCU}
+  -mcpu=${GENERIC_F407VETX_MCU}
 )
-target_compile_definitions(GENERIC_F410C8TX INTERFACE
+target_compile_definitions(GENERIC_F407VETX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410C8TX"
-	"BOARD_NAME=\"GENERIC_F410C8TX\""
-	"BOARD_ID=GENERIC_F410C8TX"
+	"ARDUINO_GENERIC_F407VETX"
+	"BOARD_NAME=\"GENERIC_F407VETX\""
+	"BOARD_ID=GENERIC_F407VETX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410C8TX INTERFACE
+target_include_directories(GENERIC_F407VETX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410C8TX_VARIANT_PATH}
+  ${GENERIC_F407VETX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410C8TX INTERFACE
-  "LINKER:--default-script=${GENERIC_F410C8TX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407VETX INTERFACE
+  "LINKER:--default-script=${GENERIC_F407VETX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=65536"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410C8TX_MCU}
+  -mcpu=${GENERIC_F407VETX_MCU}
 )
 
-add_library(GENERIC_F410C8TX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F410C8TX_serial_disabled INTERFACE
+add_library(GENERIC_F407VETX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F407VETX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410C8TX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F410C8TX_serial_generic INTERFACE
+add_library(GENERIC_F407VETX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F407VETX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F410C8TX_serial_none INTERFACE)
-target_compile_options(GENERIC_F410C8TX_serial_none INTERFACE
+add_library(GENERIC_F407VETX_serial_none INTERFACE)
+target_compile_options(GENERIC_F407VETX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F410C8TX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F410C8TX_usb_CDC INTERFACE
+add_library(GENERIC_F407VETX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F407VETX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F410C8TX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F410C8TX_usb_CDCgen INTERFACE
+add_library(GENERIC_F407VETX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F407VETX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F410C8TX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F410C8TX_usb_HID INTERFACE
+add_library(GENERIC_F407VETX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F407VETX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F410C8TX_usb_none INTERFACE)
-target_compile_options(GENERIC_F410C8TX_usb_none INTERFACE
+add_library(GENERIC_F407VETX_usb_none INTERFACE)
+target_compile_options(GENERIC_F407VETX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410C8TX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F410C8TX_xusb_FS INTERFACE
+add_library(GENERIC_F407VETX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F407VETX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410C8TX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F410C8TX_xusb_HS INTERFACE
+add_library(GENERIC_F407VETX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F407VETX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F410C8TX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F410C8TX_xusb_HSFS INTERFACE
+add_library(GENERIC_F407VETX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F407VETX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F410C8TX_hid
+# GENERIC_F407VETX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410C8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)T")
-set(GENERIC_F410C8TX_hid_MAXSIZE 65536)
-set(GENERIC_F410C8TX_hid_MAXDATASIZE 32768)
-set(GENERIC_F410C8TX_hid_MCU cortex-m4)
-set(GENERIC_F410C8TX_hid_FPCONF "-")
-add_library(GENERIC_F410C8TX_hid INTERFACE)
-target_compile_options(GENERIC_F410C8TX_hid INTERFACE
-  "SHELL:-DSTM32F410Cx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F407VETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T")
+set(GENERIC_F407VETX_hid_MAXSIZE 524288)
+set(GENERIC_F407VETX_hid_MAXDATASIZE 131072)
+set(GENERIC_F407VETX_hid_MCU cortex-m4)
+set(GENERIC_F407VETX_hid_FPCONF "-")
+add_library(GENERIC_F407VETX_hid INTERFACE)
+target_compile_options(GENERIC_F407VETX_hid INTERFACE
+  "SHELL:-DSTM32F407xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410C8TX_hid_MCU}
+  -mcpu=${GENERIC_F407VETX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F410C8TX_hid INTERFACE
+target_compile_definitions(GENERIC_F407VETX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410C8TX"
-	"BOARD_NAME=\"GENERIC_F410C8TX\""
-	"BOARD_ID=GENERIC_F410C8TX"
+	"ARDUINO_GENERIC_F407VETX"
+	"BOARD_NAME=\"GENERIC_F407VETX\""
+	"BOARD_ID=GENERIC_F407VETX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410C8TX_hid INTERFACE
+target_include_directories(GENERIC_F407VETX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410C8TX_hid_VARIANT_PATH}
+  ${GENERIC_F407VETX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410C8TX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F410C8TX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407VETX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F407VETX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=65536"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410C8TX_hid_MCU}
+  -mcpu=${GENERIC_F407VETX_hid_MCU}
 )
 
 
-# GENERIC_F410C8UX
+# GENERIC_F407VGTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)U")
-set(GENERIC_F410C8UX_MAXSIZE 65536)
-set(GENERIC_F410C8UX_MAXDATASIZE 32768)
-set(GENERIC_F410C8UX_MCU cortex-m4)
-set(GENERIC_F410C8UX_FPCONF "-")
-add_library(GENERIC_F410C8UX INTERFACE)
-target_compile_options(GENERIC_F410C8UX INTERFACE
-  "SHELL:-DSTM32F410Cx   "
+set(GENERIC_F407VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T")
+set(GENERIC_F407VGTX_MAXSIZE 1048576)
+set(GENERIC_F407VGTX_MAXDATASIZE 131072)
+set(GENERIC_F407VGTX_MCU cortex-m4)
+set(GENERIC_F407VGTX_FPCONF "-")
+add_library(GENERIC_F407VGTX INTERFACE)
+target_compile_options(GENERIC_F407VGTX INTERFACE
+  "SHELL:-DSTM32F407xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410C8UX_MCU}
+  -mcpu=${GENERIC_F407VGTX_MCU}
 )
-target_compile_definitions(GENERIC_F410C8UX INTERFACE
+target_compile_definitions(GENERIC_F407VGTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410C8UX"
-	"BOARD_NAME=\"GENERIC_F410C8UX\""
-	"BOARD_ID=GENERIC_F410C8UX"
+	"ARDUINO_GENERIC_F407VGTX"
+	"BOARD_NAME=\"GENERIC_F407VGTX\""
+	"BOARD_ID=GENERIC_F407VGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410C8UX INTERFACE
+target_include_directories(GENERIC_F407VGTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410C8UX_VARIANT_PATH}
+  ${GENERIC_F407VGTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410C8UX INTERFACE
-  "LINKER:--default-script=${GENERIC_F410C8UX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407VGTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F407VGTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=65536"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410C8UX_MCU}
+  -mcpu=${GENERIC_F407VGTX_MCU}
 )
 
-add_library(GENERIC_F410C8UX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F410C8UX_serial_disabled INTERFACE
+add_library(GENERIC_F407VGTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F407VGTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410C8UX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F410C8UX_serial_generic INTERFACE
+add_library(GENERIC_F407VGTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F407VGTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F410C8UX_serial_none INTERFACE)
-target_compile_options(GENERIC_F410C8UX_serial_none INTERFACE
+add_library(GENERIC_F407VGTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F407VGTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F410C8UX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F410C8UX_usb_CDC INTERFACE
+add_library(GENERIC_F407VGTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F407VGTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F410C8UX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F410C8UX_usb_CDCgen INTERFACE
+add_library(GENERIC_F407VGTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F407VGTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F410C8UX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F410C8UX_usb_HID INTERFACE
+add_library(GENERIC_F407VGTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F407VGTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F410C8UX_usb_none INTERFACE)
-target_compile_options(GENERIC_F410C8UX_usb_none INTERFACE
+add_library(GENERIC_F407VGTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F407VGTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410C8UX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F410C8UX_xusb_FS INTERFACE
+add_library(GENERIC_F407VGTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F407VGTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410C8UX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F410C8UX_xusb_HS INTERFACE
+add_library(GENERIC_F407VGTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F407VGTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F410C8UX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F410C8UX_xusb_HSFS INTERFACE
+add_library(GENERIC_F407VGTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F407VGTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F410C8UX_hid
+# GENERIC_F407VGTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410C8UX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)U")
-set(GENERIC_F410C8UX_hid_MAXSIZE 65536)
-set(GENERIC_F410C8UX_hid_MAXDATASIZE 32768)
-set(GENERIC_F410C8UX_hid_MCU cortex-m4)
-set(GENERIC_F410C8UX_hid_FPCONF "-")
-add_library(GENERIC_F410C8UX_hid INTERFACE)
-target_compile_options(GENERIC_F410C8UX_hid INTERFACE
-  "SHELL:-DSTM32F410Cx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F407VGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T")
+set(GENERIC_F407VGTX_hid_MAXSIZE 1048576)
+set(GENERIC_F407VGTX_hid_MAXDATASIZE 131072)
+set(GENERIC_F407VGTX_hid_MCU cortex-m4)
+set(GENERIC_F407VGTX_hid_FPCONF "-")
+add_library(GENERIC_F407VGTX_hid INTERFACE)
+target_compile_options(GENERIC_F407VGTX_hid INTERFACE
+  "SHELL:-DSTM32F407xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410C8UX_hid_MCU}
+  -mcpu=${GENERIC_F407VGTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F410C8UX_hid INTERFACE
+target_compile_definitions(GENERIC_F407VGTX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410C8UX"
-	"BOARD_NAME=\"GENERIC_F410C8UX\""
-	"BOARD_ID=GENERIC_F410C8UX"
+	"ARDUINO_GENERIC_F407VGTX"
+	"BOARD_NAME=\"GENERIC_F407VGTX\""
+	"BOARD_ID=GENERIC_F407VGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410C8UX_hid INTERFACE
+target_include_directories(GENERIC_F407VGTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410C8UX_hid_VARIANT_PATH}
+  ${GENERIC_F407VGTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410C8UX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F410C8UX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407VGTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F407VGTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=65536"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410C8UX_hid_MCU}
+  -mcpu=${GENERIC_F407VGTX_hid_MCU}
 )
 
 
-# GENERIC_F410CBTX
+# GENERIC_F407ZETX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)T")
-set(GENERIC_F410CBTX_MAXSIZE 131072)
-set(GENERIC_F410CBTX_MAXDATASIZE 32768)
-set(GENERIC_F410CBTX_MCU cortex-m4)
-set(GENERIC_F410CBTX_FPCONF "-")
-add_library(GENERIC_F410CBTX INTERFACE)
-target_compile_options(GENERIC_F410CBTX INTERFACE
-  "SHELL:-DSTM32F410Cx   "
+set(GENERIC_F407ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T")
+set(GENERIC_F407ZETX_MAXSIZE 524288)
+set(GENERIC_F407ZETX_MAXDATASIZE 131072)
+set(GENERIC_F407ZETX_MCU cortex-m4)
+set(GENERIC_F407ZETX_FPCONF "-")
+add_library(GENERIC_F407ZETX INTERFACE)
+target_compile_options(GENERIC_F407ZETX INTERFACE
+  "SHELL:-DSTM32F407xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410CBTX_MCU}
+  -mcpu=${GENERIC_F407ZETX_MCU}
 )
-target_compile_definitions(GENERIC_F410CBTX INTERFACE
+target_compile_definitions(GENERIC_F407ZETX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410CBTX"
-	"BOARD_NAME=\"GENERIC_F410CBTX\""
-	"BOARD_ID=GENERIC_F410CBTX"
+	"ARDUINO_GENERIC_F407ZETX"
+	"BOARD_NAME=\"GENERIC_F407ZETX\""
+	"BOARD_ID=GENERIC_F407ZETX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410CBTX INTERFACE
+target_include_directories(GENERIC_F407ZETX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410CBTX_VARIANT_PATH}
+  ${GENERIC_F407ZETX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410CBTX INTERFACE
-  "LINKER:--default-script=${GENERIC_F410CBTX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407ZETX INTERFACE
+  "LINKER:--default-script=${GENERIC_F407ZETX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=131072"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410CBTX_MCU}
+  -mcpu=${GENERIC_F407ZETX_MCU}
 )
 
-add_library(GENERIC_F410CBTX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F410CBTX_serial_disabled INTERFACE
+add_library(GENERIC_F407ZETX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F407ZETX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410CBTX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F410CBTX_serial_generic INTERFACE
+add_library(GENERIC_F407ZETX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F407ZETX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F410CBTX_serial_none INTERFACE)
-target_compile_options(GENERIC_F410CBTX_serial_none INTERFACE
+add_library(GENERIC_F407ZETX_serial_none INTERFACE)
+target_compile_options(GENERIC_F407ZETX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F410CBTX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F410CBTX_usb_CDC INTERFACE
+add_library(GENERIC_F407ZETX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F407ZETX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F410CBTX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F410CBTX_usb_CDCgen INTERFACE
+add_library(GENERIC_F407ZETX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F407ZETX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F410CBTX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F410CBTX_usb_HID INTERFACE
+add_library(GENERIC_F407ZETX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F407ZETX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F410CBTX_usb_none INTERFACE)
-target_compile_options(GENERIC_F410CBTX_usb_none INTERFACE
+add_library(GENERIC_F407ZETX_usb_none INTERFACE)
+target_compile_options(GENERIC_F407ZETX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410CBTX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F410CBTX_xusb_FS INTERFACE
+add_library(GENERIC_F407ZETX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F407ZETX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410CBTX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F410CBTX_xusb_HS INTERFACE
+add_library(GENERIC_F407ZETX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F407ZETX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F410CBTX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F410CBTX_xusb_HSFS INTERFACE
+add_library(GENERIC_F407ZETX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F407ZETX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F410CBTX_hid
+# GENERIC_F407ZETX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410CBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)T")
-set(GENERIC_F410CBTX_hid_MAXSIZE 131072)
-set(GENERIC_F410CBTX_hid_MAXDATASIZE 32768)
-set(GENERIC_F410CBTX_hid_MCU cortex-m4)
-set(GENERIC_F410CBTX_hid_FPCONF "-")
-add_library(GENERIC_F410CBTX_hid INTERFACE)
-target_compile_options(GENERIC_F410CBTX_hid INTERFACE
-  "SHELL:-DSTM32F410Cx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F407ZETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T")
+set(GENERIC_F407ZETX_hid_MAXSIZE 524288)
+set(GENERIC_F407ZETX_hid_MAXDATASIZE 131072)
+set(GENERIC_F407ZETX_hid_MCU cortex-m4)
+set(GENERIC_F407ZETX_hid_FPCONF "-")
+add_library(GENERIC_F407ZETX_hid INTERFACE)
+target_compile_options(GENERIC_F407ZETX_hid INTERFACE
+  "SHELL:-DSTM32F407xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410CBTX_hid_MCU}
+  -mcpu=${GENERIC_F407ZETX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F410CBTX_hid INTERFACE
+target_compile_definitions(GENERIC_F407ZETX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410CBTX"
-	"BOARD_NAME=\"GENERIC_F410CBTX\""
-	"BOARD_ID=GENERIC_F410CBTX"
+	"ARDUINO_GENERIC_F407ZETX"
+	"BOARD_NAME=\"GENERIC_F407ZETX\""
+	"BOARD_ID=GENERIC_F407ZETX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410CBTX_hid INTERFACE
+target_include_directories(GENERIC_F407ZETX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410CBTX_hid_VARIANT_PATH}
+  ${GENERIC_F407ZETX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410CBTX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F410CBTX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407ZETX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F407ZETX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=131072"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410CBTX_hid_MCU}
+  -mcpu=${GENERIC_F407ZETX_hid_MCU}
 )
 
 
-# GENERIC_F410CBUX
+# GENERIC_F407ZGTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)U")
-set(GENERIC_F410CBUX_MAXSIZE 131072)
-set(GENERIC_F410CBUX_MAXDATASIZE 32768)
-set(GENERIC_F410CBUX_MCU cortex-m4)
-set(GENERIC_F410CBUX_FPCONF "-")
-add_library(GENERIC_F410CBUX INTERFACE)
-target_compile_options(GENERIC_F410CBUX INTERFACE
-  "SHELL:-DSTM32F410Cx   "
+set(GENERIC_F407ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T")
+set(GENERIC_F407ZGTX_MAXSIZE 1048576)
+set(GENERIC_F407ZGTX_MAXDATASIZE 131072)
+set(GENERIC_F407ZGTX_MCU cortex-m4)
+set(GENERIC_F407ZGTX_FPCONF "-")
+add_library(GENERIC_F407ZGTX INTERFACE)
+target_compile_options(GENERIC_F407ZGTX INTERFACE
+  "SHELL:-DSTM32F407xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410CBUX_MCU}
+  -mcpu=${GENERIC_F407ZGTX_MCU}
 )
-target_compile_definitions(GENERIC_F410CBUX INTERFACE
+target_compile_definitions(GENERIC_F407ZGTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410CBUX"
-	"BOARD_NAME=\"GENERIC_F410CBUX\""
-	"BOARD_ID=GENERIC_F410CBUX"
+	"ARDUINO_GENERIC_F407ZGTX"
+	"BOARD_NAME=\"GENERIC_F407ZGTX\""
+	"BOARD_ID=GENERIC_F407ZGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410CBUX INTERFACE
+target_include_directories(GENERIC_F407ZGTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410CBUX_VARIANT_PATH}
+  ${GENERIC_F407ZGTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410CBUX INTERFACE
-  "LINKER:--default-script=${GENERIC_F410CBUX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407ZGTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F407ZGTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=131072"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410CBUX_MCU}
+  -mcpu=${GENERIC_F407ZGTX_MCU}
 )
 
-add_library(GENERIC_F410CBUX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F410CBUX_serial_disabled INTERFACE
+add_library(GENERIC_F407ZGTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F407ZGTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410CBUX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F410CBUX_serial_generic INTERFACE
+add_library(GENERIC_F407ZGTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F407ZGTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F410CBUX_serial_none INTERFACE)
-target_compile_options(GENERIC_F410CBUX_serial_none INTERFACE
+add_library(GENERIC_F407ZGTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F407ZGTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F410CBUX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F410CBUX_usb_CDC INTERFACE
+add_library(GENERIC_F407ZGTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F407ZGTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F410CBUX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F410CBUX_usb_CDCgen INTERFACE
+add_library(GENERIC_F407ZGTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F407ZGTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F410CBUX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F410CBUX_usb_HID INTERFACE
+add_library(GENERIC_F407ZGTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F407ZGTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F410CBUX_usb_none INTERFACE)
-target_compile_options(GENERIC_F410CBUX_usb_none INTERFACE
+add_library(GENERIC_F407ZGTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F407ZGTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410CBUX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F410CBUX_xusb_FS INTERFACE
+add_library(GENERIC_F407ZGTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F407ZGTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410CBUX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F410CBUX_xusb_HS INTERFACE
+add_library(GENERIC_F407ZGTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F407ZGTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F410CBUX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F410CBUX_xusb_HSFS INTERFACE
+add_library(GENERIC_F407ZGTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F407ZGTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F410CBUX_hid
+# GENERIC_F407ZGTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410CBUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)U")
-set(GENERIC_F410CBUX_hid_MAXSIZE 131072)
-set(GENERIC_F410CBUX_hid_MAXDATASIZE 32768)
-set(GENERIC_F410CBUX_hid_MCU cortex-m4)
-set(GENERIC_F410CBUX_hid_FPCONF "-")
-add_library(GENERIC_F410CBUX_hid INTERFACE)
-target_compile_options(GENERIC_F410CBUX_hid INTERFACE
-  "SHELL:-DSTM32F410Cx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F407ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T")
+set(GENERIC_F407ZGTX_hid_MAXSIZE 1048576)
+set(GENERIC_F407ZGTX_hid_MAXDATASIZE 131072)
+set(GENERIC_F407ZGTX_hid_MCU cortex-m4)
+set(GENERIC_F407ZGTX_hid_FPCONF "-")
+add_library(GENERIC_F407ZGTX_hid INTERFACE)
+target_compile_options(GENERIC_F407ZGTX_hid INTERFACE
+  "SHELL:-DSTM32F407xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410CBUX_hid_MCU}
+  -mcpu=${GENERIC_F407ZGTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F410CBUX_hid INTERFACE
+target_compile_definitions(GENERIC_F407ZGTX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410CBUX"
-	"BOARD_NAME=\"GENERIC_F410CBUX\""
-	"BOARD_ID=GENERIC_F410CBUX"
+	"ARDUINO_GENERIC_F407ZGTX"
+	"BOARD_NAME=\"GENERIC_F407ZGTX\""
+	"BOARD_ID=GENERIC_F407ZGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410CBUX_hid INTERFACE
+target_include_directories(GENERIC_F407ZGTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410CBUX_hid_VARIANT_PATH}
+  ${GENERIC_F407ZGTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410CBUX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F410CBUX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F407ZGTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F407ZGTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=131072"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410CBUX_hid_MCU}
+  -mcpu=${GENERIC_F407ZGTX_hid_MCU}
 )
 
 
-# GENERIC_F410R8IX
+# GENERIC_F410C8TX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410R8IX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
-set(GENERIC_F410R8IX_MAXSIZE 65536)
-set(GENERIC_F410R8IX_MAXDATASIZE 32768)
-set(GENERIC_F410R8IX_MCU cortex-m4)
-set(GENERIC_F410R8IX_FPCONF "-")
-add_library(GENERIC_F410R8IX INTERFACE)
-target_compile_options(GENERIC_F410R8IX INTERFACE
-  "SHELL:-DSTM32F410Rx   "
+set(GENERIC_F410C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)T")
+set(GENERIC_F410C8TX_MAXSIZE 65536)
+set(GENERIC_F410C8TX_MAXDATASIZE 32768)
+set(GENERIC_F410C8TX_MCU cortex-m4)
+set(GENERIC_F410C8TX_FPCONF "-")
+add_library(GENERIC_F410C8TX INTERFACE)
+target_compile_options(GENERIC_F410C8TX INTERFACE
+  "SHELL:-DSTM32F410Cx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410R8IX_MCU}
+  -mcpu=${GENERIC_F410C8TX_MCU}
 )
-target_compile_definitions(GENERIC_F410R8IX INTERFACE
+target_compile_definitions(GENERIC_F410C8TX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410R8IX"
-	"BOARD_NAME=\"GENERIC_F410R8IX\""
-	"BOARD_ID=GENERIC_F410R8IX"
+	"ARDUINO_GENERIC_F410C8TX"
+	"BOARD_NAME=\"GENERIC_F410C8TX\""
+	"BOARD_ID=GENERIC_F410C8TX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410R8IX INTERFACE
+target_include_directories(GENERIC_F410C8TX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410R8IX_VARIANT_PATH}
+  ${GENERIC_F410C8TX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410R8IX INTERFACE
-  "LINKER:--default-script=${GENERIC_F410R8IX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410C8TX INTERFACE
+  "LINKER:--default-script=${GENERIC_F410C8TX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=65536"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410R8IX_MCU}
+  -mcpu=${GENERIC_F410C8TX_MCU}
 )
 
-add_library(GENERIC_F410R8IX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F410R8IX_serial_disabled INTERFACE
+add_library(GENERIC_F410C8TX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F410C8TX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410R8IX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F410R8IX_serial_generic INTERFACE
+add_library(GENERIC_F410C8TX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F410C8TX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F410R8IX_serial_none INTERFACE)
-target_compile_options(GENERIC_F410R8IX_serial_none INTERFACE
+add_library(GENERIC_F410C8TX_serial_none INTERFACE)
+target_compile_options(GENERIC_F410C8TX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F410R8IX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F410R8IX_usb_CDC INTERFACE
+add_library(GENERIC_F410C8TX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F410C8TX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F410R8IX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F410R8IX_usb_CDCgen INTERFACE
+add_library(GENERIC_F410C8TX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F410C8TX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F410R8IX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F410R8IX_usb_HID INTERFACE
+add_library(GENERIC_F410C8TX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F410C8TX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F410R8IX_usb_none INTERFACE)
-target_compile_options(GENERIC_F410R8IX_usb_none INTERFACE
+add_library(GENERIC_F410C8TX_usb_none INTERFACE)
+target_compile_options(GENERIC_F410C8TX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410R8IX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F410R8IX_xusb_FS INTERFACE
+add_library(GENERIC_F410C8TX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F410C8TX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410R8IX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F410R8IX_xusb_HS INTERFACE
+add_library(GENERIC_F410C8TX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F410C8TX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F410R8IX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F410R8IX_xusb_HSFS INTERFACE
+add_library(GENERIC_F410C8TX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F410C8TX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F410R8IX_hid
+# GENERIC_F410C8TX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410R8IX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
-set(GENERIC_F410R8IX_hid_MAXSIZE 65536)
-set(GENERIC_F410R8IX_hid_MAXDATASIZE 32768)
-set(GENERIC_F410R8IX_hid_MCU cortex-m4)
-set(GENERIC_F410R8IX_hid_FPCONF "-")
-add_library(GENERIC_F410R8IX_hid INTERFACE)
-target_compile_options(GENERIC_F410R8IX_hid INTERFACE
-  "SHELL:-DSTM32F410Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F410C8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)T")
+set(GENERIC_F410C8TX_hid_MAXSIZE 65536)
+set(GENERIC_F410C8TX_hid_MAXDATASIZE 32768)
+set(GENERIC_F410C8TX_hid_MCU cortex-m4)
+set(GENERIC_F410C8TX_hid_FPCONF "-")
+add_library(GENERIC_F410C8TX_hid INTERFACE)
+target_compile_options(GENERIC_F410C8TX_hid INTERFACE
+  "SHELL:-DSTM32F410Cx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410R8IX_hid_MCU}
+  -mcpu=${GENERIC_F410C8TX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F410R8IX_hid INTERFACE
+target_compile_definitions(GENERIC_F410C8TX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410R8IX"
-	"BOARD_NAME=\"GENERIC_F410R8IX\""
-	"BOARD_ID=GENERIC_F410R8IX"
+	"ARDUINO_GENERIC_F410C8TX"
+	"BOARD_NAME=\"GENERIC_F410C8TX\""
+	"BOARD_ID=GENERIC_F410C8TX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410R8IX_hid INTERFACE
+target_include_directories(GENERIC_F410C8TX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410R8IX_hid_VARIANT_PATH}
+  ${GENERIC_F410C8TX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410R8IX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F410R8IX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410C8TX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F410C8TX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=65536"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410R8IX_hid_MCU}
+  -mcpu=${GENERIC_F410C8TX_hid_MCU}
 )
 
 
-# GENERIC_F410R8TX
+# GENERIC_F410C8UX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
-set(GENERIC_F410R8TX_MAXSIZE 65536)
-set(GENERIC_F410R8TX_MAXDATASIZE 32768)
-set(GENERIC_F410R8TX_MCU cortex-m4)
-set(GENERIC_F410R8TX_FPCONF "-")
-add_library(GENERIC_F410R8TX INTERFACE)
-target_compile_options(GENERIC_F410R8TX INTERFACE
-  "SHELL:-DSTM32F410Rx   "
+set(GENERIC_F410C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)U")
+set(GENERIC_F410C8UX_MAXSIZE 65536)
+set(GENERIC_F410C8UX_MAXDATASIZE 32768)
+set(GENERIC_F410C8UX_MCU cortex-m4)
+set(GENERIC_F410C8UX_FPCONF "-")
+add_library(GENERIC_F410C8UX INTERFACE)
+target_compile_options(GENERIC_F410C8UX INTERFACE
+  "SHELL:-DSTM32F410Cx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410R8TX_MCU}
+  -mcpu=${GENERIC_F410C8UX_MCU}
 )
-target_compile_definitions(GENERIC_F410R8TX INTERFACE
+target_compile_definitions(GENERIC_F410C8UX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410R8TX"
-	"BOARD_NAME=\"GENERIC_F410R8TX\""
-	"BOARD_ID=GENERIC_F410R8TX"
+	"ARDUINO_GENERIC_F410C8UX"
+	"BOARD_NAME=\"GENERIC_F410C8UX\""
+	"BOARD_ID=GENERIC_F410C8UX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410R8TX INTERFACE
+target_include_directories(GENERIC_F410C8UX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410R8TX_VARIANT_PATH}
+  ${GENERIC_F410C8UX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410R8TX INTERFACE
-  "LINKER:--default-script=${GENERIC_F410R8TX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410C8UX INTERFACE
+  "LINKER:--default-script=${GENERIC_F410C8UX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=65536"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410R8TX_MCU}
+  -mcpu=${GENERIC_F410C8UX_MCU}
 )
 
-add_library(GENERIC_F410R8TX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F410R8TX_serial_disabled INTERFACE
+add_library(GENERIC_F410C8UX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F410C8UX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410R8TX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F410R8TX_serial_generic INTERFACE
+add_library(GENERIC_F410C8UX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F410C8UX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F410R8TX_serial_none INTERFACE)
-target_compile_options(GENERIC_F410R8TX_serial_none INTERFACE
+add_library(GENERIC_F410C8UX_serial_none INTERFACE)
+target_compile_options(GENERIC_F410C8UX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F410R8TX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F410R8TX_usb_CDC INTERFACE
+add_library(GENERIC_F410C8UX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F410C8UX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F410R8TX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F410R8TX_usb_CDCgen INTERFACE
+add_library(GENERIC_F410C8UX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F410C8UX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F410R8TX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F410R8TX_usb_HID INTERFACE
+add_library(GENERIC_F410C8UX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F410C8UX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F410R8TX_usb_none INTERFACE)
-target_compile_options(GENERIC_F410R8TX_usb_none INTERFACE
+add_library(GENERIC_F410C8UX_usb_none INTERFACE)
+target_compile_options(GENERIC_F410C8UX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410R8TX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F410R8TX_xusb_FS INTERFACE
+add_library(GENERIC_F410C8UX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F410C8UX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410R8TX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F410R8TX_xusb_HS INTERFACE
+add_library(GENERIC_F410C8UX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F410C8UX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F410R8TX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F410R8TX_xusb_HSFS INTERFACE
+add_library(GENERIC_F410C8UX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F410C8UX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F410R8TX_hid
+# GENERIC_F410C8UX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410R8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
-set(GENERIC_F410R8TX_hid_MAXSIZE 65536)
-set(GENERIC_F410R8TX_hid_MAXDATASIZE 32768)
-set(GENERIC_F410R8TX_hid_MCU cortex-m4)
-set(GENERIC_F410R8TX_hid_FPCONF "-")
-add_library(GENERIC_F410R8TX_hid INTERFACE)
-target_compile_options(GENERIC_F410R8TX_hid INTERFACE
-  "SHELL:-DSTM32F410Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F410C8UX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)U")
+set(GENERIC_F410C8UX_hid_MAXSIZE 65536)
+set(GENERIC_F410C8UX_hid_MAXDATASIZE 32768)
+set(GENERIC_F410C8UX_hid_MCU cortex-m4)
+set(GENERIC_F410C8UX_hid_FPCONF "-")
+add_library(GENERIC_F410C8UX_hid INTERFACE)
+target_compile_options(GENERIC_F410C8UX_hid INTERFACE
+  "SHELL:-DSTM32F410Cx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410R8TX_hid_MCU}
+  -mcpu=${GENERIC_F410C8UX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F410R8TX_hid INTERFACE
+target_compile_definitions(GENERIC_F410C8UX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410R8TX"
-	"BOARD_NAME=\"GENERIC_F410R8TX\""
-	"BOARD_ID=GENERIC_F410R8TX"
+	"ARDUINO_GENERIC_F410C8UX"
+	"BOARD_NAME=\"GENERIC_F410C8UX\""
+	"BOARD_ID=GENERIC_F410C8UX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410R8TX_hid INTERFACE
+target_include_directories(GENERIC_F410C8UX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410R8TX_hid_VARIANT_PATH}
+  ${GENERIC_F410C8UX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410R8TX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F410R8TX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410C8UX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F410C8UX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=65536"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410R8TX_hid_MCU}
+  -mcpu=${GENERIC_F410C8UX_hid_MCU}
 )
 
 
-# GENERIC_F410RBIX
+# GENERIC_F410CBTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410RBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
-set(GENERIC_F410RBIX_MAXSIZE 131072)
-set(GENERIC_F410RBIX_MAXDATASIZE 32768)
-set(GENERIC_F410RBIX_MCU cortex-m4)
-set(GENERIC_F410RBIX_FPCONF "-")
-add_library(GENERIC_F410RBIX INTERFACE)
-target_compile_options(GENERIC_F410RBIX INTERFACE
-  "SHELL:-DSTM32F410Rx   "
+set(GENERIC_F410CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)T")
+set(GENERIC_F410CBTX_MAXSIZE 131072)
+set(GENERIC_F410CBTX_MAXDATASIZE 32768)
+set(GENERIC_F410CBTX_MCU cortex-m4)
+set(GENERIC_F410CBTX_FPCONF "-")
+add_library(GENERIC_F410CBTX INTERFACE)
+target_compile_options(GENERIC_F410CBTX INTERFACE
+  "SHELL:-DSTM32F410Cx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410RBIX_MCU}
+  -mcpu=${GENERIC_F410CBTX_MCU}
 )
-target_compile_definitions(GENERIC_F410RBIX INTERFACE
+target_compile_definitions(GENERIC_F410CBTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410RBIX"
-	"BOARD_NAME=\"GENERIC_F410RBIX\""
-	"BOARD_ID=GENERIC_F410RBIX"
+	"ARDUINO_GENERIC_F410CBTX"
+	"BOARD_NAME=\"GENERIC_F410CBTX\""
+	"BOARD_ID=GENERIC_F410CBTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410RBIX INTERFACE
+target_include_directories(GENERIC_F410CBTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410RBIX_VARIANT_PATH}
+  ${GENERIC_F410CBTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410RBIX INTERFACE
-  "LINKER:--default-script=${GENERIC_F410RBIX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410CBTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F410CBTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=131072"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410RBIX_MCU}
+  -mcpu=${GENERIC_F410CBTX_MCU}
 )
 
-add_library(GENERIC_F410RBIX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F410RBIX_serial_disabled INTERFACE
+add_library(GENERIC_F410CBTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F410CBTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410RBIX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F410RBIX_serial_generic INTERFACE
+add_library(GENERIC_F410CBTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F410CBTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F410RBIX_serial_none INTERFACE)
-target_compile_options(GENERIC_F410RBIX_serial_none INTERFACE
+add_library(GENERIC_F410CBTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F410CBTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F410RBIX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F410RBIX_usb_CDC INTERFACE
+add_library(GENERIC_F410CBTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F410CBTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F410RBIX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F410RBIX_usb_CDCgen INTERFACE
+add_library(GENERIC_F410CBTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F410CBTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F410RBIX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F410RBIX_usb_HID INTERFACE
+add_library(GENERIC_F410CBTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F410CBTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F410RBIX_usb_none INTERFACE)
-target_compile_options(GENERIC_F410RBIX_usb_none INTERFACE
+add_library(GENERIC_F410CBTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F410CBTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410RBIX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F410RBIX_xusb_FS INTERFACE
+add_library(GENERIC_F410CBTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F410CBTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410RBIX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F410RBIX_xusb_HS INTERFACE
+add_library(GENERIC_F410CBTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F410CBTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F410RBIX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F410RBIX_xusb_HSFS INTERFACE
+add_library(GENERIC_F410CBTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F410CBTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F410RBIX_hid
+# GENERIC_F410CBTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410RBIX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
-set(GENERIC_F410RBIX_hid_MAXSIZE 131072)
-set(GENERIC_F410RBIX_hid_MAXDATASIZE 32768)
-set(GENERIC_F410RBIX_hid_MCU cortex-m4)
-set(GENERIC_F410RBIX_hid_FPCONF "-")
-add_library(GENERIC_F410RBIX_hid INTERFACE)
-target_compile_options(GENERIC_F410RBIX_hid INTERFACE
-  "SHELL:-DSTM32F410Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F410CBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)T")
+set(GENERIC_F410CBTX_hid_MAXSIZE 131072)
+set(GENERIC_F410CBTX_hid_MAXDATASIZE 32768)
+set(GENERIC_F410CBTX_hid_MCU cortex-m4)
+set(GENERIC_F410CBTX_hid_FPCONF "-")
+add_library(GENERIC_F410CBTX_hid INTERFACE)
+target_compile_options(GENERIC_F410CBTX_hid INTERFACE
+  "SHELL:-DSTM32F410Cx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410RBIX_hid_MCU}
+  -mcpu=${GENERIC_F410CBTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F410RBIX_hid INTERFACE
+target_compile_definitions(GENERIC_F410CBTX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410RBIX"
-	"BOARD_NAME=\"GENERIC_F410RBIX\""
-	"BOARD_ID=GENERIC_F410RBIX"
+	"ARDUINO_GENERIC_F410CBTX"
+	"BOARD_NAME=\"GENERIC_F410CBTX\""
+	"BOARD_ID=GENERIC_F410CBTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410RBIX_hid INTERFACE
+target_include_directories(GENERIC_F410CBTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410RBIX_hid_VARIANT_PATH}
+  ${GENERIC_F410CBTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410RBIX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F410RBIX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410CBTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F410CBTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=131072"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410RBIX_hid_MCU}
+  -mcpu=${GENERIC_F410CBTX_hid_MCU}
 )
 
 
-# GENERIC_F410RBTX
+# GENERIC_F410CBUX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
-set(GENERIC_F410RBTX_MAXSIZE 131072)
-set(GENERIC_F410RBTX_MAXDATASIZE 32768)
-set(GENERIC_F410RBTX_MCU cortex-m4)
-set(GENERIC_F410RBTX_FPCONF "-")
-add_library(GENERIC_F410RBTX INTERFACE)
-target_compile_options(GENERIC_F410RBTX INTERFACE
-  "SHELL:-DSTM32F410Rx   "
+set(GENERIC_F410CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)U")
+set(GENERIC_F410CBUX_MAXSIZE 131072)
+set(GENERIC_F410CBUX_MAXDATASIZE 32768)
+set(GENERIC_F410CBUX_MCU cortex-m4)
+set(GENERIC_F410CBUX_FPCONF "-")
+add_library(GENERIC_F410CBUX INTERFACE)
+target_compile_options(GENERIC_F410CBUX INTERFACE
+  "SHELL:-DSTM32F410Cx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410RBTX_MCU}
+  -mcpu=${GENERIC_F410CBUX_MCU}
 )
-target_compile_definitions(GENERIC_F410RBTX INTERFACE
+target_compile_definitions(GENERIC_F410CBUX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410RBTX"
-	"BOARD_NAME=\"GENERIC_F410RBTX\""
-	"BOARD_ID=GENERIC_F410RBTX"
+	"ARDUINO_GENERIC_F410CBUX"
+	"BOARD_NAME=\"GENERIC_F410CBUX\""
+	"BOARD_ID=GENERIC_F410CBUX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410RBTX INTERFACE
+target_include_directories(GENERIC_F410CBUX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410RBTX_VARIANT_PATH}
+  ${GENERIC_F410CBUX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410RBTX INTERFACE
-  "LINKER:--default-script=${GENERIC_F410RBTX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410CBUX INTERFACE
+  "LINKER:--default-script=${GENERIC_F410CBUX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=131072"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410RBTX_MCU}
+  -mcpu=${GENERIC_F410CBUX_MCU}
 )
 
-add_library(GENERIC_F410RBTX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F410RBTX_serial_disabled INTERFACE
+add_library(GENERIC_F410CBUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F410CBUX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410RBTX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F410RBTX_serial_generic INTERFACE
+add_library(GENERIC_F410CBUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F410CBUX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F410RBTX_serial_none INTERFACE)
-target_compile_options(GENERIC_F410RBTX_serial_none INTERFACE
+add_library(GENERIC_F410CBUX_serial_none INTERFACE)
+target_compile_options(GENERIC_F410CBUX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F410RBTX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F410RBTX_usb_CDC INTERFACE
+add_library(GENERIC_F410CBUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F410CBUX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F410RBTX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F410RBTX_usb_CDCgen INTERFACE
+add_library(GENERIC_F410CBUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F410CBUX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F410RBTX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F410RBTX_usb_HID INTERFACE
+add_library(GENERIC_F410CBUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F410CBUX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F410RBTX_usb_none INTERFACE)
-target_compile_options(GENERIC_F410RBTX_usb_none INTERFACE
+add_library(GENERIC_F410CBUX_usb_none INTERFACE)
+target_compile_options(GENERIC_F410CBUX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410RBTX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F410RBTX_xusb_FS INTERFACE
+add_library(GENERIC_F410CBUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F410CBUX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410RBTX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F410RBTX_xusb_HS INTERFACE
+add_library(GENERIC_F410CBUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F410CBUX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F410RBTX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F410RBTX_xusb_HSFS INTERFACE
+add_library(GENERIC_F410CBUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F410CBUX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F410RBTX_hid
+# GENERIC_F410CBUX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410RBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
-set(GENERIC_F410RBTX_hid_MAXSIZE 131072)
-set(GENERIC_F410RBTX_hid_MAXDATASIZE 32768)
-set(GENERIC_F410RBTX_hid_MCU cortex-m4)
-set(GENERIC_F410RBTX_hid_FPCONF "-")
-add_library(GENERIC_F410RBTX_hid INTERFACE)
-target_compile_options(GENERIC_F410RBTX_hid INTERFACE
-  "SHELL:-DSTM32F410Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F410CBUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)U")
+set(GENERIC_F410CBUX_hid_MAXSIZE 131072)
+set(GENERIC_F410CBUX_hid_MAXDATASIZE 32768)
+set(GENERIC_F410CBUX_hid_MCU cortex-m4)
+set(GENERIC_F410CBUX_hid_FPCONF "-")
+add_library(GENERIC_F410CBUX_hid INTERFACE)
+target_compile_options(GENERIC_F410CBUX_hid INTERFACE
+  "SHELL:-DSTM32F410Cx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410RBTX_hid_MCU}
+  -mcpu=${GENERIC_F410CBUX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F410RBTX_hid INTERFACE
+target_compile_definitions(GENERIC_F410CBUX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410RBTX"
-	"BOARD_NAME=\"GENERIC_F410RBTX\""
-	"BOARD_ID=GENERIC_F410RBTX"
+	"ARDUINO_GENERIC_F410CBUX"
+	"BOARD_NAME=\"GENERIC_F410CBUX\""
+	"BOARD_ID=GENERIC_F410CBUX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410RBTX_hid INTERFACE
+target_include_directories(GENERIC_F410CBUX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410RBTX_hid_VARIANT_PATH}
+  ${GENERIC_F410CBUX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410RBTX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F410RBTX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410CBUX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F410CBUX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=131072"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410RBTX_hid_MCU}
+  -mcpu=${GENERIC_F410CBUX_hid_MCU}
 )
 
 
-# GENERIC_F410T8YX
+# GENERIC_F410R8IX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410T8YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410T(8-B)Y")
-set(GENERIC_F410T8YX_MAXSIZE 65536)
-set(GENERIC_F410T8YX_MAXDATASIZE 32768)
-set(GENERIC_F410T8YX_MCU cortex-m4)
-set(GENERIC_F410T8YX_FPCONF "-")
-add_library(GENERIC_F410T8YX INTERFACE)
-target_compile_options(GENERIC_F410T8YX INTERFACE
-  "SHELL:-DSTM32F410Tx   "
+set(GENERIC_F410R8IX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
+set(GENERIC_F410R8IX_MAXSIZE 65536)
+set(GENERIC_F410R8IX_MAXDATASIZE 32768)
+set(GENERIC_F410R8IX_MCU cortex-m4)
+set(GENERIC_F410R8IX_FPCONF "-")
+add_library(GENERIC_F410R8IX INTERFACE)
+target_compile_options(GENERIC_F410R8IX INTERFACE
+  "SHELL:-DSTM32F410Rx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410T8YX_MCU}
+  -mcpu=${GENERIC_F410R8IX_MCU}
 )
-target_compile_definitions(GENERIC_F410T8YX INTERFACE
+target_compile_definitions(GENERIC_F410R8IX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410T8YX"
-	"BOARD_NAME=\"GENERIC_F410T8YX\""
-	"BOARD_ID=GENERIC_F410T8YX"
+	"ARDUINO_GENERIC_F410R8IX"
+	"BOARD_NAME=\"GENERIC_F410R8IX\""
+	"BOARD_ID=GENERIC_F410R8IX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410T8YX INTERFACE
+target_include_directories(GENERIC_F410R8IX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410T8YX_VARIANT_PATH}
+  ${GENERIC_F410R8IX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410T8YX INTERFACE
-  "LINKER:--default-script=${GENERIC_F410T8YX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410R8IX INTERFACE
+  "LINKER:--default-script=${GENERIC_F410R8IX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=65536"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410T8YX_MCU}
+  -mcpu=${GENERIC_F410R8IX_MCU}
 )
 
-add_library(GENERIC_F410T8YX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F410T8YX_serial_disabled INTERFACE
+add_library(GENERIC_F410R8IX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F410R8IX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410T8YX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F410T8YX_serial_generic INTERFACE
+add_library(GENERIC_F410R8IX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F410R8IX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F410T8YX_serial_none INTERFACE)
-target_compile_options(GENERIC_F410T8YX_serial_none INTERFACE
+add_library(GENERIC_F410R8IX_serial_none INTERFACE)
+target_compile_options(GENERIC_F410R8IX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F410T8YX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F410T8YX_usb_CDC INTERFACE
+add_library(GENERIC_F410R8IX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F410R8IX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F410T8YX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F410T8YX_usb_CDCgen INTERFACE
+add_library(GENERIC_F410R8IX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F410R8IX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F410T8YX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F410T8YX_usb_HID INTERFACE
+add_library(GENERIC_F410R8IX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F410R8IX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F410T8YX_usb_none INTERFACE)
-target_compile_options(GENERIC_F410T8YX_usb_none INTERFACE
+add_library(GENERIC_F410R8IX_usb_none INTERFACE)
+target_compile_options(GENERIC_F410R8IX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410T8YX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F410T8YX_xusb_FS INTERFACE
+add_library(GENERIC_F410R8IX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F410R8IX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410T8YX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F410T8YX_xusb_HS INTERFACE
+add_library(GENERIC_F410R8IX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F410R8IX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F410T8YX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F410T8YX_xusb_HSFS INTERFACE
+add_library(GENERIC_F410R8IX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F410R8IX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F410T8YX_hid
+# GENERIC_F410R8IX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410T8YX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410T(8-B)Y")
-set(GENERIC_F410T8YX_hid_MAXSIZE 65536)
-set(GENERIC_F410T8YX_hid_MAXDATASIZE 32768)
-set(GENERIC_F410T8YX_hid_MCU cortex-m4)
-set(GENERIC_F410T8YX_hid_FPCONF "-")
-add_library(GENERIC_F410T8YX_hid INTERFACE)
-target_compile_options(GENERIC_F410T8YX_hid INTERFACE
-  "SHELL:-DSTM32F410Tx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F410R8IX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
+set(GENERIC_F410R8IX_hid_MAXSIZE 65536)
+set(GENERIC_F410R8IX_hid_MAXDATASIZE 32768)
+set(GENERIC_F410R8IX_hid_MCU cortex-m4)
+set(GENERIC_F410R8IX_hid_FPCONF "-")
+add_library(GENERIC_F410R8IX_hid INTERFACE)
+target_compile_options(GENERIC_F410R8IX_hid INTERFACE
+  "SHELL:-DSTM32F410Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410T8YX_hid_MCU}
+  -mcpu=${GENERIC_F410R8IX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F410T8YX_hid INTERFACE
+target_compile_definitions(GENERIC_F410R8IX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410T8YX"
-	"BOARD_NAME=\"GENERIC_F410T8YX\""
-	"BOARD_ID=GENERIC_F410T8YX"
+	"ARDUINO_GENERIC_F410R8IX"
+	"BOARD_NAME=\"GENERIC_F410R8IX\""
+	"BOARD_ID=GENERIC_F410R8IX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410T8YX_hid INTERFACE
+target_include_directories(GENERIC_F410R8IX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410T8YX_hid_VARIANT_PATH}
+  ${GENERIC_F410R8IX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410T8YX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F410T8YX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410R8IX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F410R8IX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=65536"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410T8YX_hid_MCU}
+  -mcpu=${GENERIC_F410R8IX_hid_MCU}
 )
 
 
-# GENERIC_F410TBYX
+# GENERIC_F410R8TX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410TBYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410T(8-B)Y")
-set(GENERIC_F410TBYX_MAXSIZE 131072)
-set(GENERIC_F410TBYX_MAXDATASIZE 32768)
-set(GENERIC_F410TBYX_MCU cortex-m4)
-set(GENERIC_F410TBYX_FPCONF "-")
-add_library(GENERIC_F410TBYX INTERFACE)
-target_compile_options(GENERIC_F410TBYX INTERFACE
-  "SHELL:-DSTM32F410Tx   "
+set(GENERIC_F410R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
+set(GENERIC_F410R8TX_MAXSIZE 65536)
+set(GENERIC_F410R8TX_MAXDATASIZE 32768)
+set(GENERIC_F410R8TX_MCU cortex-m4)
+set(GENERIC_F410R8TX_FPCONF "-")
+add_library(GENERIC_F410R8TX INTERFACE)
+target_compile_options(GENERIC_F410R8TX INTERFACE
+  "SHELL:-DSTM32F410Rx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410TBYX_MCU}
+  -mcpu=${GENERIC_F410R8TX_MCU}
 )
-target_compile_definitions(GENERIC_F410TBYX INTERFACE
+target_compile_definitions(GENERIC_F410R8TX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410TBYX"
-	"BOARD_NAME=\"GENERIC_F410TBYX\""
-	"BOARD_ID=GENERIC_F410TBYX"
+	"ARDUINO_GENERIC_F410R8TX"
+	"BOARD_NAME=\"GENERIC_F410R8TX\""
+	"BOARD_ID=GENERIC_F410R8TX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410TBYX INTERFACE
+target_include_directories(GENERIC_F410R8TX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410TBYX_VARIANT_PATH}
+  ${GENERIC_F410R8TX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410TBYX INTERFACE
-  "LINKER:--default-script=${GENERIC_F410TBYX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410R8TX INTERFACE
+  "LINKER:--default-script=${GENERIC_F410R8TX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_SIZE=65536"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410TBYX_MCU}
+  -mcpu=${GENERIC_F410R8TX_MCU}
 )
 
-add_library(GENERIC_F410TBYX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F410TBYX_serial_disabled INTERFACE
+add_library(GENERIC_F410R8TX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F410R8TX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410TBYX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F410TBYX_serial_generic INTERFACE
+add_library(GENERIC_F410R8TX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F410R8TX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F410TBYX_serial_none INTERFACE)
-target_compile_options(GENERIC_F410TBYX_serial_none INTERFACE
+add_library(GENERIC_F410R8TX_serial_none INTERFACE)
+target_compile_options(GENERIC_F410R8TX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F410TBYX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F410TBYX_usb_CDC INTERFACE
+add_library(GENERIC_F410R8TX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F410R8TX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F410TBYX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F410TBYX_usb_CDCgen INTERFACE
+add_library(GENERIC_F410R8TX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F410R8TX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F410TBYX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F410TBYX_usb_HID INTERFACE
+add_library(GENERIC_F410R8TX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F410R8TX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F410TBYX_usb_none INTERFACE)
-target_compile_options(GENERIC_F410TBYX_usb_none INTERFACE
+add_library(GENERIC_F410R8TX_usb_none INTERFACE)
+target_compile_options(GENERIC_F410R8TX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410TBYX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F410TBYX_xusb_FS INTERFACE
+add_library(GENERIC_F410R8TX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F410R8TX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F410TBYX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F410TBYX_xusb_HS INTERFACE
+add_library(GENERIC_F410R8TX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F410R8TX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F410TBYX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F410TBYX_xusb_HSFS INTERFACE
+add_library(GENERIC_F410R8TX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F410R8TX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F410TBYX_hid
+# GENERIC_F410R8TX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F410TBYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410T(8-B)Y")
-set(GENERIC_F410TBYX_hid_MAXSIZE 131072)
-set(GENERIC_F410TBYX_hid_MAXDATASIZE 32768)
-set(GENERIC_F410TBYX_hid_MCU cortex-m4)
-set(GENERIC_F410TBYX_hid_FPCONF "-")
-add_library(GENERIC_F410TBYX_hid INTERFACE)
-target_compile_options(GENERIC_F410TBYX_hid INTERFACE
-  "SHELL:-DSTM32F410Tx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F410R8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
+set(GENERIC_F410R8TX_hid_MAXSIZE 65536)
+set(GENERIC_F410R8TX_hid_MAXDATASIZE 32768)
+set(GENERIC_F410R8TX_hid_MCU cortex-m4)
+set(GENERIC_F410R8TX_hid_FPCONF "-")
+add_library(GENERIC_F410R8TX_hid INTERFACE)
+target_compile_options(GENERIC_F410R8TX_hid INTERFACE
+  "SHELL:-DSTM32F410Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410TBYX_hid_MCU}
+  -mcpu=${GENERIC_F410R8TX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F410TBYX_hid INTERFACE
+target_compile_definitions(GENERIC_F410R8TX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F410TBYX"
-	"BOARD_NAME=\"GENERIC_F410TBYX\""
-	"BOARD_ID=GENERIC_F410TBYX"
+	"ARDUINO_GENERIC_F410R8TX"
+	"BOARD_NAME=\"GENERIC_F410R8TX\""
+	"BOARD_ID=GENERIC_F410R8TX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F410TBYX_hid INTERFACE
+target_include_directories(GENERIC_F410R8TX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F410TBYX_hid_VARIANT_PATH}
+  ${GENERIC_F410R8TX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F410TBYX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F410TBYX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410R8TX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F410R8TX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_SIZE=65536"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F410TBYX_hid_MCU}
+  -mcpu=${GENERIC_F410R8TX_hid_MCU}
 )
 
 
-# GENERIC_F411CCUX
+# GENERIC_F410RBIX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F411CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
-set(GENERIC_F411CCUX_MAXSIZE 262144)
-set(GENERIC_F411CCUX_MAXDATASIZE 131072)
-set(GENERIC_F411CCUX_MCU cortex-m4)
-set(GENERIC_F411CCUX_FPCONF "-")
-add_library(GENERIC_F411CCUX INTERFACE)
-target_compile_options(GENERIC_F411CCUX INTERFACE
-  "SHELL:-DSTM32F411xE   "
+set(GENERIC_F410RBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
+set(GENERIC_F410RBIX_MAXSIZE 131072)
+set(GENERIC_F410RBIX_MAXDATASIZE 32768)
+set(GENERIC_F410RBIX_MCU cortex-m4)
+set(GENERIC_F410RBIX_FPCONF "-")
+add_library(GENERIC_F410RBIX INTERFACE)
+target_compile_options(GENERIC_F410RBIX INTERFACE
+  "SHELL:-DSTM32F410Rx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CCUX_MCU}
+  -mcpu=${GENERIC_F410RBIX_MCU}
 )
-target_compile_definitions(GENERIC_F411CCUX INTERFACE
+target_compile_definitions(GENERIC_F410RBIX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F411CCUX"
-	"BOARD_NAME=\"GENERIC_F411CCUX\""
-	"BOARD_ID=GENERIC_F411CCUX"
+	"ARDUINO_GENERIC_F410RBIX"
+	"BOARD_NAME=\"GENERIC_F410RBIX\""
+	"BOARD_ID=GENERIC_F410RBIX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F411CCUX INTERFACE
+target_include_directories(GENERIC_F410RBIX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F411CCUX_VARIANT_PATH}
+  ${GENERIC_F410RBIX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F411CCUX INTERFACE
-  "LINKER:--default-script=${GENERIC_F411CCUX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410RBIX INTERFACE
+  "LINKER:--default-script=${GENERIC_F410RBIX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=262144"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CCUX_MCU}
+  -mcpu=${GENERIC_F410RBIX_MCU}
 )
 
-add_library(GENERIC_F411CCUX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F411CCUX_serial_disabled INTERFACE
+add_library(GENERIC_F410RBIX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F410RBIX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411CCUX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F411CCUX_serial_generic INTERFACE
+add_library(GENERIC_F410RBIX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F410RBIX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F411CCUX_serial_none INTERFACE)
-target_compile_options(GENERIC_F411CCUX_serial_none INTERFACE
+add_library(GENERIC_F410RBIX_serial_none INTERFACE)
+target_compile_options(GENERIC_F410RBIX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F411CCUX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F411CCUX_usb_CDC INTERFACE
+add_library(GENERIC_F410RBIX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F410RBIX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F411CCUX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F411CCUX_usb_CDCgen INTERFACE
+add_library(GENERIC_F410RBIX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F410RBIX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F411CCUX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F411CCUX_usb_HID INTERFACE
+add_library(GENERIC_F410RBIX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F410RBIX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F411CCUX_usb_none INTERFACE)
-target_compile_options(GENERIC_F411CCUX_usb_none INTERFACE
+add_library(GENERIC_F410RBIX_usb_none INTERFACE)
+target_compile_options(GENERIC_F410RBIX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411CCUX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F411CCUX_xusb_FS INTERFACE
+add_library(GENERIC_F410RBIX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F410RBIX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411CCUX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F411CCUX_xusb_HS INTERFACE
+add_library(GENERIC_F410RBIX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F410RBIX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F411CCUX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F411CCUX_xusb_HSFS INTERFACE
+add_library(GENERIC_F410RBIX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F410RBIX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F411CCUX_hid
+# GENERIC_F410RBIX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F411CCUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
-set(GENERIC_F411CCUX_hid_MAXSIZE 262144)
-set(GENERIC_F411CCUX_hid_MAXDATASIZE 131072)
-set(GENERIC_F411CCUX_hid_MCU cortex-m4)
-set(GENERIC_F411CCUX_hid_FPCONF "-")
-add_library(GENERIC_F411CCUX_hid INTERFACE)
-target_compile_options(GENERIC_F411CCUX_hid INTERFACE
-  "SHELL:-DSTM32F411xE  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F410RBIX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
+set(GENERIC_F410RBIX_hid_MAXSIZE 131072)
+set(GENERIC_F410RBIX_hid_MAXDATASIZE 32768)
+set(GENERIC_F410RBIX_hid_MCU cortex-m4)
+set(GENERIC_F410RBIX_hid_FPCONF "-")
+add_library(GENERIC_F410RBIX_hid INTERFACE)
+target_compile_options(GENERIC_F410RBIX_hid INTERFACE
+  "SHELL:-DSTM32F410Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CCUX_hid_MCU}
+  -mcpu=${GENERIC_F410RBIX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F411CCUX_hid INTERFACE
+target_compile_definitions(GENERIC_F410RBIX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F411CCUX"
-	"BOARD_NAME=\"GENERIC_F411CCUX\""
-	"BOARD_ID=GENERIC_F411CCUX"
-	"VARIANT_H=\"variant_generic.h\""
+	"ARDUINO_GENERIC_F410RBIX"
+	"BOARD_NAME=\"GENERIC_F410RBIX\""
+	"BOARD_ID=GENERIC_F410RBIX"
+	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F411CCUX_hid INTERFACE
+target_include_directories(GENERIC_F410RBIX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F411CCUX_hid_VARIANT_PATH}
+  ${GENERIC_F410RBIX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F411CCUX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F411CCUX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410RBIX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F410RBIX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=262144"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CCUX_hid_MCU}
+  -mcpu=${GENERIC_F410RBIX_hid_MCU}
 )
 
 
-# GENERIC_F411CCYX
+# GENERIC_F410RBTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F411CCYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
-set(GENERIC_F411CCYX_MAXSIZE 262144)
-set(GENERIC_F411CCYX_MAXDATASIZE 131072)
-set(GENERIC_F411CCYX_MCU cortex-m4)
-set(GENERIC_F411CCYX_FPCONF "-")
-add_library(GENERIC_F411CCYX INTERFACE)
-target_compile_options(GENERIC_F411CCYX INTERFACE
-  "SHELL:-DSTM32F411xE   "
+set(GENERIC_F410RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
+set(GENERIC_F410RBTX_MAXSIZE 131072)
+set(GENERIC_F410RBTX_MAXDATASIZE 32768)
+set(GENERIC_F410RBTX_MCU cortex-m4)
+set(GENERIC_F410RBTX_FPCONF "-")
+add_library(GENERIC_F410RBTX INTERFACE)
+target_compile_options(GENERIC_F410RBTX INTERFACE
+  "SHELL:-DSTM32F410Rx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CCYX_MCU}
+  -mcpu=${GENERIC_F410RBTX_MCU}
 )
-target_compile_definitions(GENERIC_F411CCYX INTERFACE
+target_compile_definitions(GENERIC_F410RBTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F411CCYX"
-	"BOARD_NAME=\"GENERIC_F411CCYX\""
-	"BOARD_ID=GENERIC_F411CCYX"
+	"ARDUINO_GENERIC_F410RBTX"
+	"BOARD_NAME=\"GENERIC_F410RBTX\""
+	"BOARD_ID=GENERIC_F410RBTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F411CCYX INTERFACE
+target_include_directories(GENERIC_F410RBTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F411CCYX_VARIANT_PATH}
+  ${GENERIC_F410RBTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F411CCYX INTERFACE
-  "LINKER:--default-script=${GENERIC_F411CCYX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410RBTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F410RBTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=262144"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CCYX_MCU}
+  -mcpu=${GENERIC_F410RBTX_MCU}
 )
 
-add_library(GENERIC_F411CCYX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F411CCYX_serial_disabled INTERFACE
+add_library(GENERIC_F410RBTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F410RBTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411CCYX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F411CCYX_serial_generic INTERFACE
+add_library(GENERIC_F410RBTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F410RBTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F411CCYX_serial_none INTERFACE)
-target_compile_options(GENERIC_F411CCYX_serial_none INTERFACE
+add_library(GENERIC_F410RBTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F410RBTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F411CCYX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F411CCYX_usb_CDC INTERFACE
+add_library(GENERIC_F410RBTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F410RBTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F411CCYX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F411CCYX_usb_CDCgen INTERFACE
+add_library(GENERIC_F410RBTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F410RBTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F411CCYX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F411CCYX_usb_HID INTERFACE
+add_library(GENERIC_F410RBTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F410RBTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F411CCYX_usb_none INTERFACE)
-target_compile_options(GENERIC_F411CCYX_usb_none INTERFACE
+add_library(GENERIC_F410RBTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F410RBTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411CCYX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F411CCYX_xusb_FS INTERFACE
+add_library(GENERIC_F410RBTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F410RBTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411CCYX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F411CCYX_xusb_HS INTERFACE
+add_library(GENERIC_F410RBTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F410RBTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F411CCYX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F411CCYX_xusb_HSFS INTERFACE
+add_library(GENERIC_F410RBTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F410RBTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F411CCYX_hid
+# GENERIC_F410RBTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F411CCYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
-set(GENERIC_F411CCYX_hid_MAXSIZE 262144)
-set(GENERIC_F411CCYX_hid_MAXDATASIZE 131072)
-set(GENERIC_F411CCYX_hid_MCU cortex-m4)
-set(GENERIC_F411CCYX_hid_FPCONF "-")
-add_library(GENERIC_F411CCYX_hid INTERFACE)
-target_compile_options(GENERIC_F411CCYX_hid INTERFACE
-  "SHELL:-DSTM32F411xE  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F410RBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)")
+set(GENERIC_F410RBTX_hid_MAXSIZE 131072)
+set(GENERIC_F410RBTX_hid_MAXDATASIZE 32768)
+set(GENERIC_F410RBTX_hid_MCU cortex-m4)
+set(GENERIC_F410RBTX_hid_FPCONF "-")
+add_library(GENERIC_F410RBTX_hid INTERFACE)
+target_compile_options(GENERIC_F410RBTX_hid INTERFACE
+  "SHELL:-DSTM32F410Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CCYX_hid_MCU}
+  -mcpu=${GENERIC_F410RBTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F411CCYX_hid INTERFACE
+target_compile_definitions(GENERIC_F410RBTX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F411CCYX"
-	"BOARD_NAME=\"GENERIC_F411CCYX\""
-	"BOARD_ID=GENERIC_F411CCYX"
+	"ARDUINO_GENERIC_F410RBTX"
+	"BOARD_NAME=\"GENERIC_F410RBTX\""
+	"BOARD_ID=GENERIC_F410RBTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F411CCYX_hid INTERFACE
+target_include_directories(GENERIC_F410RBTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F411CCYX_hid_VARIANT_PATH}
+  ${GENERIC_F410RBTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F411CCYX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F411CCYX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410RBTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F410RBTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=262144"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CCYX_hid_MCU}
+  -mcpu=${GENERIC_F410RBTX_hid_MCU}
 )
 
 
-# GENERIC_F411CEUX
+# GENERIC_F410T8YX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F411CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
-set(GENERIC_F411CEUX_MAXSIZE 524288)
-set(GENERIC_F411CEUX_MAXDATASIZE 131072)
-set(GENERIC_F411CEUX_MCU cortex-m4)
-set(GENERIC_F411CEUX_FPCONF "-")
-add_library(GENERIC_F411CEUX INTERFACE)
-target_compile_options(GENERIC_F411CEUX INTERFACE
-  "SHELL:-DSTM32F411xE   "
+set(GENERIC_F410T8YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410T(8-B)Y")
+set(GENERIC_F410T8YX_MAXSIZE 65536)
+set(GENERIC_F410T8YX_MAXDATASIZE 32768)
+set(GENERIC_F410T8YX_MCU cortex-m4)
+set(GENERIC_F410T8YX_FPCONF "-")
+add_library(GENERIC_F410T8YX INTERFACE)
+target_compile_options(GENERIC_F410T8YX INTERFACE
+  "SHELL:-DSTM32F410Tx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CEUX_MCU}
+  -mcpu=${GENERIC_F410T8YX_MCU}
 )
-target_compile_definitions(GENERIC_F411CEUX INTERFACE
+target_compile_definitions(GENERIC_F410T8YX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F411CEUX"
-	"BOARD_NAME=\"GENERIC_F411CEUX\""
-	"BOARD_ID=GENERIC_F411CEUX"
+	"ARDUINO_GENERIC_F410T8YX"
+	"BOARD_NAME=\"GENERIC_F410T8YX\""
+	"BOARD_ID=GENERIC_F410T8YX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F411CEUX INTERFACE
+target_include_directories(GENERIC_F410T8YX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F411CEUX_VARIANT_PATH}
+  ${GENERIC_F410T8YX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F411CEUX INTERFACE
-  "LINKER:--default-script=${GENERIC_F411CEUX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410T8YX INTERFACE
+  "LINKER:--default-script=${GENERIC_F410T8YX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_SIZE=65536"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CEUX_MCU}
+  -mcpu=${GENERIC_F410T8YX_MCU}
 )
 
-add_library(GENERIC_F411CEUX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F411CEUX_serial_disabled INTERFACE
+add_library(GENERIC_F410T8YX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F410T8YX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411CEUX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F411CEUX_serial_generic INTERFACE
+add_library(GENERIC_F410T8YX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F410T8YX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F411CEUX_serial_none INTERFACE)
-target_compile_options(GENERIC_F411CEUX_serial_none INTERFACE
+add_library(GENERIC_F410T8YX_serial_none INTERFACE)
+target_compile_options(GENERIC_F410T8YX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F411CEUX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F411CEUX_usb_CDC INTERFACE
+add_library(GENERIC_F410T8YX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F410T8YX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F411CEUX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F411CEUX_usb_CDCgen INTERFACE
+add_library(GENERIC_F410T8YX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F410T8YX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F411CEUX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F411CEUX_usb_HID INTERFACE
+add_library(GENERIC_F410T8YX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F410T8YX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F411CEUX_usb_none INTERFACE)
-target_compile_options(GENERIC_F411CEUX_usb_none INTERFACE
+add_library(GENERIC_F410T8YX_usb_none INTERFACE)
+target_compile_options(GENERIC_F410T8YX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411CEUX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F411CEUX_xusb_FS INTERFACE
+add_library(GENERIC_F410T8YX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F410T8YX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411CEUX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F411CEUX_xusb_HS INTERFACE
+add_library(GENERIC_F410T8YX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F410T8YX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F411CEUX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F411CEUX_xusb_HSFS INTERFACE
+add_library(GENERIC_F410T8YX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F410T8YX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F411CEUX_hid
+# GENERIC_F410T8YX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F411CEUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
-set(GENERIC_F411CEUX_hid_MAXSIZE 524288)
-set(GENERIC_F411CEUX_hid_MAXDATASIZE 131072)
-set(GENERIC_F411CEUX_hid_MCU cortex-m4)
-set(GENERIC_F411CEUX_hid_FPCONF "-")
-add_library(GENERIC_F411CEUX_hid INTERFACE)
-target_compile_options(GENERIC_F411CEUX_hid INTERFACE
-  "SHELL:-DSTM32F411xE  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F410T8YX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410T(8-B)Y")
+set(GENERIC_F410T8YX_hid_MAXSIZE 65536)
+set(GENERIC_F410T8YX_hid_MAXDATASIZE 32768)
+set(GENERIC_F410T8YX_hid_MCU cortex-m4)
+set(GENERIC_F410T8YX_hid_FPCONF "-")
+add_library(GENERIC_F410T8YX_hid INTERFACE)
+target_compile_options(GENERIC_F410T8YX_hid INTERFACE
+  "SHELL:-DSTM32F410Tx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CEUX_hid_MCU}
+  -mcpu=${GENERIC_F410T8YX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F411CEUX_hid INTERFACE
+target_compile_definitions(GENERIC_F410T8YX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F411CEUX"
-	"BOARD_NAME=\"GENERIC_F411CEUX\""
-	"BOARD_ID=GENERIC_F411CEUX"
+	"ARDUINO_GENERIC_F410T8YX"
+	"BOARD_NAME=\"GENERIC_F410T8YX\""
+	"BOARD_ID=GENERIC_F410T8YX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F411CEUX_hid INTERFACE
+target_include_directories(GENERIC_F410T8YX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F411CEUX_hid_VARIANT_PATH}
+  ${GENERIC_F410T8YX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F411CEUX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F411CEUX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410T8YX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F410T8YX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_SIZE=65536"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CEUX_hid_MCU}
+  -mcpu=${GENERIC_F410T8YX_hid_MCU}
 )
 
 
-# GENERIC_F411CEYX
+# GENERIC_F410TBYX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F411CEYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
-set(GENERIC_F411CEYX_MAXSIZE 524288)
-set(GENERIC_F411CEYX_MAXDATASIZE 131072)
-set(GENERIC_F411CEYX_MCU cortex-m4)
-set(GENERIC_F411CEYX_FPCONF "-")
-add_library(GENERIC_F411CEYX INTERFACE)
-target_compile_options(GENERIC_F411CEYX INTERFACE
-  "SHELL:-DSTM32F411xE   "
+set(GENERIC_F410TBYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410T(8-B)Y")
+set(GENERIC_F410TBYX_MAXSIZE 131072)
+set(GENERIC_F410TBYX_MAXDATASIZE 32768)
+set(GENERIC_F410TBYX_MCU cortex-m4)
+set(GENERIC_F410TBYX_FPCONF "-")
+add_library(GENERIC_F410TBYX INTERFACE)
+target_compile_options(GENERIC_F410TBYX INTERFACE
+  "SHELL:-DSTM32F410Tx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CEYX_MCU}
+  -mcpu=${GENERIC_F410TBYX_MCU}
 )
-target_compile_definitions(GENERIC_F411CEYX INTERFACE
+target_compile_definitions(GENERIC_F410TBYX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F411CEYX"
-	"BOARD_NAME=\"GENERIC_F411CEYX\""
-	"BOARD_ID=GENERIC_F411CEYX"
+	"ARDUINO_GENERIC_F410TBYX"
+	"BOARD_NAME=\"GENERIC_F410TBYX\""
+	"BOARD_ID=GENERIC_F410TBYX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F411CEYX INTERFACE
+target_include_directories(GENERIC_F410TBYX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F411CEYX_VARIANT_PATH}
+  ${GENERIC_F410TBYX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F411CEYX INTERFACE
-  "LINKER:--default-script=${GENERIC_F411CEYX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410TBYX INTERFACE
+  "LINKER:--default-script=${GENERIC_F410TBYX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CEYX_MCU}
+  -mcpu=${GENERIC_F410TBYX_MCU}
 )
 
-add_library(GENERIC_F411CEYX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F411CEYX_serial_disabled INTERFACE
+add_library(GENERIC_F410TBYX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F410TBYX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411CEYX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F411CEYX_serial_generic INTERFACE
+add_library(GENERIC_F410TBYX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F410TBYX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F411CEYX_serial_none INTERFACE)
-target_compile_options(GENERIC_F411CEYX_serial_none INTERFACE
+add_library(GENERIC_F410TBYX_serial_none INTERFACE)
+target_compile_options(GENERIC_F410TBYX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F411CEYX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F411CEYX_usb_CDC INTERFACE
+add_library(GENERIC_F410TBYX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F410TBYX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F411CEYX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F411CEYX_usb_CDCgen INTERFACE
+add_library(GENERIC_F410TBYX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F410TBYX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F411CEYX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F411CEYX_usb_HID INTERFACE
+add_library(GENERIC_F410TBYX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F410TBYX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F411CEYX_usb_none INTERFACE)
-target_compile_options(GENERIC_F411CEYX_usb_none INTERFACE
+add_library(GENERIC_F410TBYX_usb_none INTERFACE)
+target_compile_options(GENERIC_F410TBYX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411CEYX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F411CEYX_xusb_FS INTERFACE
+add_library(GENERIC_F410TBYX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F410TBYX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411CEYX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F411CEYX_xusb_HS INTERFACE
+add_library(GENERIC_F410TBYX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F410TBYX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F411CEYX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F411CEYX_xusb_HSFS INTERFACE
+add_library(GENERIC_F410TBYX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F410TBYX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F411CEYX_hid
+# GENERIC_F410TBYX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F411CEYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
-set(GENERIC_F411CEYX_hid_MAXSIZE 524288)
-set(GENERIC_F411CEYX_hid_MAXDATASIZE 131072)
-set(GENERIC_F411CEYX_hid_MCU cortex-m4)
-set(GENERIC_F411CEYX_hid_FPCONF "-")
-add_library(GENERIC_F411CEYX_hid INTERFACE)
-target_compile_options(GENERIC_F411CEYX_hid INTERFACE
-  "SHELL:-DSTM32F411xE  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F410TBYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410T(8-B)Y")
+set(GENERIC_F410TBYX_hid_MAXSIZE 131072)
+set(GENERIC_F410TBYX_hid_MAXDATASIZE 32768)
+set(GENERIC_F410TBYX_hid_MCU cortex-m4)
+set(GENERIC_F410TBYX_hid_FPCONF "-")
+add_library(GENERIC_F410TBYX_hid INTERFACE)
+target_compile_options(GENERIC_F410TBYX_hid INTERFACE
+  "SHELL:-DSTM32F410Tx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CEYX_hid_MCU}
+  -mcpu=${GENERIC_F410TBYX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F411CEYX_hid INTERFACE
+target_compile_definitions(GENERIC_F410TBYX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F411CEYX"
-	"BOARD_NAME=\"GENERIC_F411CEYX\""
-	"BOARD_ID=GENERIC_F411CEYX"
+	"ARDUINO_GENERIC_F410TBYX"
+	"BOARD_NAME=\"GENERIC_F410TBYX\""
+	"BOARD_ID=GENERIC_F410TBYX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F411CEYX_hid INTERFACE
+target_include_directories(GENERIC_F410TBYX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F411CEYX_hid_VARIANT_PATH}
+  ${GENERIC_F410TBYX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F411CEYX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F411CEYX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F410TBYX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F410TBYX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411CEYX_hid_MCU}
+  -mcpu=${GENERIC_F410TBYX_hid_MCU}
 )
 
 
-# GENERIC_F411RCTX
+# GENERIC_F411CCUX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F411RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T")
-set(GENERIC_F411RCTX_MAXSIZE 262144)
-set(GENERIC_F411RCTX_MAXDATASIZE 131072)
-set(GENERIC_F411RCTX_MCU cortex-m4)
-set(GENERIC_F411RCTX_FPCONF "-")
-add_library(GENERIC_F411RCTX INTERFACE)
-target_compile_options(GENERIC_F411RCTX INTERFACE
+set(GENERIC_F411CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
+set(GENERIC_F411CCUX_MAXSIZE 262144)
+set(GENERIC_F411CCUX_MAXDATASIZE 131072)
+set(GENERIC_F411CCUX_MCU cortex-m4)
+set(GENERIC_F411CCUX_FPCONF "-")
+add_library(GENERIC_F411CCUX INTERFACE)
+target_compile_options(GENERIC_F411CCUX INTERFACE
   "SHELL:-DSTM32F411xE   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411RCTX_MCU}
+  -mcpu=${GENERIC_F411CCUX_MCU}
 )
-target_compile_definitions(GENERIC_F411RCTX INTERFACE
+target_compile_definitions(GENERIC_F411CCUX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F411RCTX"
-	"BOARD_NAME=\"GENERIC_F411RCTX\""
-	"BOARD_ID=GENERIC_F411RCTX"
+	"ARDUINO_GENERIC_F411CCUX"
+	"BOARD_NAME=\"GENERIC_F411CCUX\""
+	"BOARD_ID=GENERIC_F411CCUX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F411RCTX INTERFACE
+target_include_directories(GENERIC_F411CCUX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F411RCTX_VARIANT_PATH}
+  ${GENERIC_F411CCUX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F411RCTX INTERFACE
-  "LINKER:--default-script=${GENERIC_F411RCTX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F411CCUX INTERFACE
+  "LINKER:--default-script=${GENERIC_F411CCUX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=262144"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411RCTX_MCU}
+  -mcpu=${GENERIC_F411CCUX_MCU}
 )
 
-add_library(GENERIC_F411RCTX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F411RCTX_serial_disabled INTERFACE
+add_library(GENERIC_F411CCUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F411CCUX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411RCTX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F411RCTX_serial_generic INTERFACE
+add_library(GENERIC_F411CCUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F411CCUX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F411RCTX_serial_none INTERFACE)
-target_compile_options(GENERIC_F411RCTX_serial_none INTERFACE
+add_library(GENERIC_F411CCUX_serial_none INTERFACE)
+target_compile_options(GENERIC_F411CCUX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F411RCTX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F411RCTX_usb_CDC INTERFACE
+add_library(GENERIC_F411CCUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F411CCUX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F411RCTX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F411RCTX_usb_CDCgen INTERFACE
+add_library(GENERIC_F411CCUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F411CCUX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F411RCTX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F411RCTX_usb_HID INTERFACE
+add_library(GENERIC_F411CCUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F411CCUX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F411RCTX_usb_none INTERFACE)
-target_compile_options(GENERIC_F411RCTX_usb_none INTERFACE
+add_library(GENERIC_F411CCUX_usb_none INTERFACE)
+target_compile_options(GENERIC_F411CCUX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411RCTX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F411RCTX_xusb_FS INTERFACE
+add_library(GENERIC_F411CCUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F411CCUX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411RCTX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F411RCTX_xusb_HS INTERFACE
+add_library(GENERIC_F411CCUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F411CCUX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F411RCTX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F411RCTX_xusb_HSFS INTERFACE
+add_library(GENERIC_F411CCUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F411CCUX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F411RCTX_hid
+# GENERIC_F411CCUX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F411RCTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T")
-set(GENERIC_F411RCTX_hid_MAXSIZE 262144)
-set(GENERIC_F411RCTX_hid_MAXDATASIZE 131072)
-set(GENERIC_F411RCTX_hid_MCU cortex-m4)
-set(GENERIC_F411RCTX_hid_FPCONF "-")
-add_library(GENERIC_F411RCTX_hid INTERFACE)
-target_compile_options(GENERIC_F411RCTX_hid INTERFACE
+set(GENERIC_F411CCUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
+set(GENERIC_F411CCUX_hid_MAXSIZE 262144)
+set(GENERIC_F411CCUX_hid_MAXDATASIZE 131072)
+set(GENERIC_F411CCUX_hid_MCU cortex-m4)
+set(GENERIC_F411CCUX_hid_FPCONF "-")
+add_library(GENERIC_F411CCUX_hid INTERFACE)
+target_compile_options(GENERIC_F411CCUX_hid INTERFACE
   "SHELL:-DSTM32F411xE  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411RCTX_hid_MCU}
+  -mcpu=${GENERIC_F411CCUX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F411RCTX_hid INTERFACE
+target_compile_definitions(GENERIC_F411CCUX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F411RCTX"
-	"BOARD_NAME=\"GENERIC_F411RCTX\""
-	"BOARD_ID=GENERIC_F411RCTX"
+	"ARDUINO_GENERIC_F411CCUX"
+	"BOARD_NAME=\"GENERIC_F411CCUX\""
+	"BOARD_ID=GENERIC_F411CCUX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F411RCTX_hid INTERFACE
+target_include_directories(GENERIC_F411CCUX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F411RCTX_hid_VARIANT_PATH}
+  ${GENERIC_F411CCUX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F411RCTX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F411RCTX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F411CCUX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F411CCUX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=262144"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411RCTX_hid_MCU}
+  -mcpu=${GENERIC_F411CCUX_hid_MCU}
 )
 
 
-# GENERIC_F411RETX
+# GENERIC_F411CCYX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F411RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T")
-set(GENERIC_F411RETX_MAXSIZE 524288)
-set(GENERIC_F411RETX_MAXDATASIZE 131072)
-set(GENERIC_F411RETX_MCU cortex-m4)
-set(GENERIC_F411RETX_FPCONF "-")
-add_library(GENERIC_F411RETX INTERFACE)
-target_compile_options(GENERIC_F411RETX INTERFACE
-  "SHELL:-DSTM32F411xE   "
+set(GENERIC_F411CCYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
+set(GENERIC_F411CCYX_MAXSIZE 262144)
+set(GENERIC_F411CCYX_MAXDATASIZE 131072)
+set(GENERIC_F411CCYX_MCU cortex-m4)
+set(GENERIC_F411CCYX_FPCONF "-")
+add_library(GENERIC_F411CCYX INTERFACE)
+target_compile_options(GENERIC_F411CCYX INTERFACE
+  "SHELL:-DSTM32F411xE   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411RETX_MCU}
+  -mcpu=${GENERIC_F411CCYX_MCU}
 )
-target_compile_definitions(GENERIC_F411RETX INTERFACE
+target_compile_definitions(GENERIC_F411CCYX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F411RETX"
-	"BOARD_NAME=\"GENERIC_F411RETX\""
-	"BOARD_ID=GENERIC_F411RETX"
+	"ARDUINO_GENERIC_F411CCYX"
+	"BOARD_NAME=\"GENERIC_F411CCYX\""
+	"BOARD_ID=GENERIC_F411CCYX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F411RETX INTERFACE
+target_include_directories(GENERIC_F411CCYX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F411RETX_VARIANT_PATH}
+  ${GENERIC_F411CCYX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F411RETX INTERFACE
-  "LINKER:--default-script=${GENERIC_F411RETX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F411CCYX INTERFACE
+  "LINKER:--default-script=${GENERIC_F411CCYX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=262144"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411CCYX_MCU}
+)
+
+add_library(GENERIC_F411CCYX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F411CCYX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F411CCYX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F411CCYX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_F411CCYX_serial_none INTERFACE)
+target_compile_options(GENERIC_F411CCYX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_F411CCYX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F411CCYX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_F411CCYX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F411CCYX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_F411CCYX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F411CCYX_usb_HID INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_F411CCYX_usb_none INTERFACE)
+target_compile_options(GENERIC_F411CCYX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F411CCYX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F411CCYX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F411CCYX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F411CCYX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_F411CCYX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F411CCYX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_F411CCYX_hid
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F411CCYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
+set(GENERIC_F411CCYX_hid_MAXSIZE 262144)
+set(GENERIC_F411CCYX_hid_MAXDATASIZE 131072)
+set(GENERIC_F411CCYX_hid_MCU cortex-m4)
+set(GENERIC_F411CCYX_hid_FPCONF "-")
+add_library(GENERIC_F411CCYX_hid INTERFACE)
+target_compile_options(GENERIC_F411CCYX_hid INTERFACE
+  "SHELL:-DSTM32F411xE  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411CCYX_hid_MCU}
+)
+target_compile_definitions(GENERIC_F411CCYX_hid INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F411CCYX"
+	"BOARD_NAME=\"GENERIC_F411CCYX\""
+	"BOARD_ID=GENERIC_F411CCYX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F411CCYX_hid INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F411CCYX_hid_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F411CCYX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F411CCYX_hid_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
+	"LINKER:--defsym=LD_MAX_SIZE=262144"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411CCYX_hid_MCU}
+)
+
+
+# GENERIC_F411CEUX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F411CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
+set(GENERIC_F411CEUX_MAXSIZE 524288)
+set(GENERIC_F411CEUX_MAXDATASIZE 131072)
+set(GENERIC_F411CEUX_MCU cortex-m4)
+set(GENERIC_F411CEUX_FPCONF "-")
+add_library(GENERIC_F411CEUX INTERFACE)
+target_compile_options(GENERIC_F411CEUX INTERFACE
+  "SHELL:-DSTM32F411xE   "
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411CEUX_MCU}
+)
+target_compile_definitions(GENERIC_F411CEUX INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F411CEUX"
+	"BOARD_NAME=\"GENERIC_F411CEUX\""
+	"BOARD_ID=GENERIC_F411CEUX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F411CEUX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F411CEUX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F411CEUX INTERFACE
+  "LINKER:--default-script=${GENERIC_F411CEUX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411RETX_MCU}
+  -mcpu=${GENERIC_F411CEUX_MCU}
 )
 
-add_library(GENERIC_F411RETX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F411RETX_serial_disabled INTERFACE
+add_library(GENERIC_F411CEUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F411CEUX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411RETX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F411RETX_serial_generic INTERFACE
+add_library(GENERIC_F411CEUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F411CEUX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F411RETX_serial_none INTERFACE)
-target_compile_options(GENERIC_F411RETX_serial_none INTERFACE
+add_library(GENERIC_F411CEUX_serial_none INTERFACE)
+target_compile_options(GENERIC_F411CEUX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F411RETX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F411RETX_usb_CDC INTERFACE
+add_library(GENERIC_F411CEUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F411CEUX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F411RETX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F411RETX_usb_CDCgen INTERFACE
+add_library(GENERIC_F411CEUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F411CEUX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F411RETX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F411RETX_usb_HID INTERFACE
+add_library(GENERIC_F411CEUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F411CEUX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F411RETX_usb_none INTERFACE)
-target_compile_options(GENERIC_F411RETX_usb_none INTERFACE
+add_library(GENERIC_F411CEUX_usb_none INTERFACE)
+target_compile_options(GENERIC_F411CEUX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411RETX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F411RETX_xusb_FS INTERFACE
+add_library(GENERIC_F411CEUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F411CEUX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F411RETX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F411RETX_xusb_HS INTERFACE
+add_library(GENERIC_F411CEUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F411CEUX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F411RETX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F411RETX_xusb_HSFS INTERFACE
+add_library(GENERIC_F411CEUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F411CEUX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F411RETX_hid
+# GENERIC_F411CEUX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F411RETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T")
-set(GENERIC_F411RETX_hid_MAXSIZE 524288)
-set(GENERIC_F411RETX_hid_MAXDATASIZE 131072)
-set(GENERIC_F411RETX_hid_MCU cortex-m4)
-set(GENERIC_F411RETX_hid_FPCONF "-")
-add_library(GENERIC_F411RETX_hid INTERFACE)
-target_compile_options(GENERIC_F411RETX_hid INTERFACE
+set(GENERIC_F411CEUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
+set(GENERIC_F411CEUX_hid_MAXSIZE 524288)
+set(GENERIC_F411CEUX_hid_MAXDATASIZE 131072)
+set(GENERIC_F411CEUX_hid_MCU cortex-m4)
+set(GENERIC_F411CEUX_hid_FPCONF "-")
+add_library(GENERIC_F411CEUX_hid INTERFACE)
+target_compile_options(GENERIC_F411CEUX_hid INTERFACE
   "SHELL:-DSTM32F411xE  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411RETX_hid_MCU}
+  -mcpu=${GENERIC_F411CEUX_hid_MCU}
+)
+target_compile_definitions(GENERIC_F411CEUX_hid INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F411CEUX"
+	"BOARD_NAME=\"GENERIC_F411CEUX\""
+	"BOARD_ID=GENERIC_F411CEUX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F411CEUX_hid INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F411CEUX_hid_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F411CEUX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F411CEUX_hid_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411CEUX_hid_MCU}
+)
+
+
+# GENERIC_F411CEYX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F411CEYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
+set(GENERIC_F411CEYX_MAXSIZE 524288)
+set(GENERIC_F411CEYX_MAXDATASIZE 131072)
+set(GENERIC_F411CEYX_MCU cortex-m4)
+set(GENERIC_F411CEYX_FPCONF "-")
+add_library(GENERIC_F411CEYX INTERFACE)
+target_compile_options(GENERIC_F411CEYX INTERFACE
+  "SHELL:-DSTM32F411xE   "
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411CEYX_MCU}
+)
+target_compile_definitions(GENERIC_F411CEYX INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F411CEYX"
+	"BOARD_NAME=\"GENERIC_F411CEYX\""
+	"BOARD_ID=GENERIC_F411CEYX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F411CEYX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F411CEYX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F411CEYX INTERFACE
+  "LINKER:--default-script=${GENERIC_F411CEYX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411CEYX_MCU}
+)
+
+add_library(GENERIC_F411CEYX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F411CEYX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F411CEYX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F411CEYX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_F411CEYX_serial_none INTERFACE)
+target_compile_options(GENERIC_F411CEYX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_F411CEYX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F411CEYX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_F411CEYX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F411CEYX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_F411CEYX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F411CEYX_usb_HID INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_F411CEYX_usb_none INTERFACE)
+target_compile_options(GENERIC_F411CEYX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F411CEYX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F411CEYX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F411CEYX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F411CEYX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_F411CEYX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F411CEYX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_F411CEYX_hid
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F411CEYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
+set(GENERIC_F411CEYX_hid_MAXSIZE 524288)
+set(GENERIC_F411CEYX_hid_MAXDATASIZE 131072)
+set(GENERIC_F411CEYX_hid_MCU cortex-m4)
+set(GENERIC_F411CEYX_hid_FPCONF "-")
+add_library(GENERIC_F411CEYX_hid INTERFACE)
+target_compile_options(GENERIC_F411CEYX_hid INTERFACE
+  "SHELL:-DSTM32F411xE  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411CEYX_hid_MCU}
+)
+target_compile_definitions(GENERIC_F411CEYX_hid INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F411CEYX"
+	"BOARD_NAME=\"GENERIC_F411CEYX\""
+	"BOARD_ID=GENERIC_F411CEYX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F411CEYX_hid INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F411CEYX_hid_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F411CEYX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F411CEYX_hid_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411CEYX_hid_MCU}
+)
+
+
+# GENERIC_F411RCTX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F411RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T")
+set(GENERIC_F411RCTX_MAXSIZE 262144)
+set(GENERIC_F411RCTX_MAXDATASIZE 131072)
+set(GENERIC_F411RCTX_MCU cortex-m4)
+set(GENERIC_F411RCTX_FPCONF "-")
+add_library(GENERIC_F411RCTX INTERFACE)
+target_compile_options(GENERIC_F411RCTX INTERFACE
+  "SHELL:-DSTM32F411xE   "
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411RCTX_MCU}
+)
+target_compile_definitions(GENERIC_F411RCTX INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F411RCTX"
+	"BOARD_NAME=\"GENERIC_F411RCTX\""
+	"BOARD_ID=GENERIC_F411RCTX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F411RCTX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F411RCTX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F411RCTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F411RCTX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=262144"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411RCTX_MCU}
+)
+
+add_library(GENERIC_F411RCTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F411RCTX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F411RCTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F411RCTX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_F411RCTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F411RCTX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_F411RCTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F411RCTX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_F411RCTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F411RCTX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_F411RCTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F411RCTX_usb_HID INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_F411RCTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F411RCTX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F411RCTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F411RCTX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F411RCTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F411RCTX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_F411RCTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F411RCTX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_F411RCTX_hid
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F411RCTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T")
+set(GENERIC_F411RCTX_hid_MAXSIZE 262144)
+set(GENERIC_F411RCTX_hid_MAXDATASIZE 131072)
+set(GENERIC_F411RCTX_hid_MCU cortex-m4)
+set(GENERIC_F411RCTX_hid_FPCONF "-")
+add_library(GENERIC_F411RCTX_hid INTERFACE)
+target_compile_options(GENERIC_F411RCTX_hid INTERFACE
+  "SHELL:-DSTM32F411xE  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411RCTX_hid_MCU}
+)
+target_compile_definitions(GENERIC_F411RCTX_hid INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F411RCTX"
+	"BOARD_NAME=\"GENERIC_F411RCTX\""
+	"BOARD_ID=GENERIC_F411RCTX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F411RCTX_hid INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F411RCTX_hid_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F411RCTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F411RCTX_hid_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
+	"LINKER:--defsym=LD_MAX_SIZE=262144"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411RCTX_hid_MCU}
+)
+
+
+# GENERIC_F411RETX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F411RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T")
+set(GENERIC_F411RETX_MAXSIZE 524288)
+set(GENERIC_F411RETX_MAXDATASIZE 131072)
+set(GENERIC_F411RETX_MCU cortex-m4)
+set(GENERIC_F411RETX_FPCONF "-")
+add_library(GENERIC_F411RETX INTERFACE)
+target_compile_options(GENERIC_F411RETX INTERFACE
+  "SHELL:-DSTM32F411xE   "
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411RETX_MCU}
+)
+target_compile_definitions(GENERIC_F411RETX INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F411RETX"
+	"BOARD_NAME=\"GENERIC_F411RETX\""
+	"BOARD_ID=GENERIC_F411RETX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F411RETX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F411RETX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F411RETX INTERFACE
+  "LINKER:--default-script=${GENERIC_F411RETX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411RETX_MCU}
+)
+
+add_library(GENERIC_F411RETX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F411RETX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F411RETX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F411RETX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_F411RETX_serial_none INTERFACE)
+target_compile_options(GENERIC_F411RETX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_F411RETX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F411RETX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_F411RETX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F411RETX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_F411RETX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F411RETX_usb_HID INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_F411RETX_usb_none INTERFACE)
+target_compile_options(GENERIC_F411RETX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F411RETX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F411RETX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F411RETX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F411RETX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_F411RETX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F411RETX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_F411RETX_hid
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F411RETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T")
+set(GENERIC_F411RETX_hid_MAXSIZE 524288)
+set(GENERIC_F411RETX_hid_MAXDATASIZE 131072)
+set(GENERIC_F411RETX_hid_MCU cortex-m4)
+set(GENERIC_F411RETX_hid_FPCONF "-")
+add_library(GENERIC_F411RETX_hid INTERFACE)
+target_compile_options(GENERIC_F411RETX_hid INTERFACE
+  "SHELL:-DSTM32F411xE  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411RETX_hid_MCU}
+)
+target_compile_definitions(GENERIC_F411RETX_hid INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F411RETX"
+	"BOARD_NAME=\"GENERIC_F411RETX\""
+	"BOARD_ID=GENERIC_F411RETX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F411RETX_hid INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F411RETX_hid_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F411RETX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F411RETX_hid_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F411RETX_hid_MCU}
+)
+
+
+# GENERIC_F412CEUX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F412CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412C(E-G)U")
+set(GENERIC_F412CEUX_MAXSIZE 524288)
+set(GENERIC_F412CEUX_MAXDATASIZE 262144)
+set(GENERIC_F412CEUX_MCU cortex-m4)
+set(GENERIC_F412CEUX_FPCONF "-")
+add_library(GENERIC_F412CEUX INTERFACE)
+target_compile_options(GENERIC_F412CEUX INTERFACE
+  "SHELL:-DSTM32F412Cx   "
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412CEUX_MCU}
+)
+target_compile_definitions(GENERIC_F412CEUX INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F412CEUX"
+	"BOARD_NAME=\"GENERIC_F412CEUX\""
+	"BOARD_ID=GENERIC_F412CEUX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F412CEUX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F412CEUX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F412CEUX INTERFACE
+  "LINKER:--default-script=${GENERIC_F412CEUX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412CEUX_MCU}
+)
+
+add_library(GENERIC_F412CEUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F412CEUX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F412CEUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F412CEUX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_F412CEUX_serial_none INTERFACE)
+target_compile_options(GENERIC_F412CEUX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_F412CEUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F412CEUX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_F412CEUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F412CEUX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_F412CEUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F412CEUX_usb_HID INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_F412CEUX_usb_none INTERFACE)
+target_compile_options(GENERIC_F412CEUX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F412CEUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F412CEUX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F412CEUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F412CEUX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_F412CEUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F412CEUX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_F412CEUX_hid
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F412CEUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412C(E-G)U")
+set(GENERIC_F412CEUX_hid_MAXSIZE 524288)
+set(GENERIC_F412CEUX_hid_MAXDATASIZE 262144)
+set(GENERIC_F412CEUX_hid_MCU cortex-m4)
+set(GENERIC_F412CEUX_hid_FPCONF "-")
+add_library(GENERIC_F412CEUX_hid INTERFACE)
+target_compile_options(GENERIC_F412CEUX_hid INTERFACE
+  "SHELL:-DSTM32F412Cx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412CEUX_hid_MCU}
+)
+target_compile_definitions(GENERIC_F412CEUX_hid INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F412CEUX"
+	"BOARD_NAME=\"GENERIC_F412CEUX\""
+	"BOARD_ID=GENERIC_F412CEUX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F412CEUX_hid INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F412CEUX_hid_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F412CEUX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F412CEUX_hid_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412CEUX_hid_MCU}
+)
+
+
+# GENERIC_F412CGUX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F412CGUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412C(E-G)U")
+set(GENERIC_F412CGUX_MAXSIZE 1048576)
+set(GENERIC_F412CGUX_MAXDATASIZE 262144)
+set(GENERIC_F412CGUX_MCU cortex-m4)
+set(GENERIC_F412CGUX_FPCONF "-")
+add_library(GENERIC_F412CGUX INTERFACE)
+target_compile_options(GENERIC_F412CGUX INTERFACE
+  "SHELL:-DSTM32F412Cx   "
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412CGUX_MCU}
+)
+target_compile_definitions(GENERIC_F412CGUX INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F412CGUX"
+	"BOARD_NAME=\"GENERIC_F412CGUX\""
+	"BOARD_ID=GENERIC_F412CGUX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F412CGUX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F412CGUX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F412CGUX INTERFACE
+  "LINKER:--default-script=${GENERIC_F412CGUX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412CGUX_MCU}
+)
+
+add_library(GENERIC_F412CGUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F412CGUX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F412CGUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F412CGUX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_F412CGUX_serial_none INTERFACE)
+target_compile_options(GENERIC_F412CGUX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_F412CGUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F412CGUX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_F412CGUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F412CGUX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_F412CGUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F412CGUX_usb_HID INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_F412CGUX_usb_none INTERFACE)
+target_compile_options(GENERIC_F412CGUX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F412CGUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F412CGUX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F412CGUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F412CGUX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_F412CGUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F412CGUX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_F412CGUX_hid
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F412CGUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412C(E-G)U")
+set(GENERIC_F412CGUX_hid_MAXSIZE 1048576)
+set(GENERIC_F412CGUX_hid_MAXDATASIZE 262144)
+set(GENERIC_F412CGUX_hid_MCU cortex-m4)
+set(GENERIC_F412CGUX_hid_FPCONF "-")
+add_library(GENERIC_F412CGUX_hid INTERFACE)
+target_compile_options(GENERIC_F412CGUX_hid INTERFACE
+  "SHELL:-DSTM32F412Cx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412CGUX_hid_MCU}
+)
+target_compile_definitions(GENERIC_F412CGUX_hid INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F412CGUX"
+	"BOARD_NAME=\"GENERIC_F412CGUX\""
+	"BOARD_ID=GENERIC_F412CGUX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F412CGUX_hid INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F412CGUX_hid_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F412CGUX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F412CGUX_hid_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412CGUX_hid_MCU}
+)
+
+
+# GENERIC_F412RETX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F412RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
+set(GENERIC_F412RETX_MAXSIZE 524288)
+set(GENERIC_F412RETX_MAXDATASIZE 262144)
+set(GENERIC_F412RETX_MCU cortex-m4)
+set(GENERIC_F412RETX_FPCONF "-")
+add_library(GENERIC_F412RETX INTERFACE)
+target_compile_options(GENERIC_F412RETX INTERFACE
+  "SHELL:-DSTM32F412Rx   "
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412RETX_MCU}
+)
+target_compile_definitions(GENERIC_F412RETX INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F412RETX"
+	"BOARD_NAME=\"GENERIC_F412RETX\""
+	"BOARD_ID=GENERIC_F412RETX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F412RETX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F412RETX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F412RETX INTERFACE
+  "LINKER:--default-script=${GENERIC_F412RETX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412RETX_MCU}
+)
+
+add_library(GENERIC_F412RETX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F412RETX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F412RETX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F412RETX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_F412RETX_serial_none INTERFACE)
+target_compile_options(GENERIC_F412RETX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_F412RETX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F412RETX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_F412RETX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F412RETX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_F412RETX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F412RETX_usb_HID INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_F412RETX_usb_none INTERFACE)
+target_compile_options(GENERIC_F412RETX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F412RETX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F412RETX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F412RETX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F412RETX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_F412RETX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F412RETX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_F412RETX_hid
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F412RETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
+set(GENERIC_F412RETX_hid_MAXSIZE 524288)
+set(GENERIC_F412RETX_hid_MAXDATASIZE 262144)
+set(GENERIC_F412RETX_hid_MCU cortex-m4)
+set(GENERIC_F412RETX_hid_FPCONF "-")
+add_library(GENERIC_F412RETX_hid INTERFACE)
+target_compile_options(GENERIC_F412RETX_hid INTERFACE
+  "SHELL:-DSTM32F412Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412RETX_hid_MCU}
+)
+target_compile_definitions(GENERIC_F412RETX_hid INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F412RETX"
+	"BOARD_NAME=\"GENERIC_F412RETX\""
+	"BOARD_ID=GENERIC_F412RETX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F412RETX_hid INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F412RETX_hid_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F412RETX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F412RETX_hid_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412RETX_hid_MCU}
+)
+
+
+# GENERIC_F412REYX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F412REYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
+set(GENERIC_F412REYX_MAXSIZE 524288)
+set(GENERIC_F412REYX_MAXDATASIZE 262144)
+set(GENERIC_F412REYX_MCU cortex-m4)
+set(GENERIC_F412REYX_FPCONF "-")
+add_library(GENERIC_F412REYX INTERFACE)
+target_compile_options(GENERIC_F412REYX INTERFACE
+  "SHELL:-DSTM32F412Rx   "
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412REYX_MCU}
+)
+target_compile_definitions(GENERIC_F412REYX INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F412REYX"
+	"BOARD_NAME=\"GENERIC_F412REYX\""
+	"BOARD_ID=GENERIC_F412REYX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_F412REYX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
+  ${GENERIC_F412REYX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_F412REYX INTERFACE
+  "LINKER:--default-script=${GENERIC_F412REYX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412REYX_MCU}
+)
+
+add_library(GENERIC_F412REYX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F412REYX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F412REYX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F412REYX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_F412REYX_serial_none INTERFACE)
+target_compile_options(GENERIC_F412REYX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_F412REYX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F412REYX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_F412REYX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F412REYX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_F412REYX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F412REYX_usb_HID INTERFACE
+  "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_F412REYX_usb_none INTERFACE)
+target_compile_options(GENERIC_F412REYX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F412REYX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F412REYX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_F412REYX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F412REYX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_F412REYX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F412REYX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_F412REYX_hid
+# -----------------------------------------------------------------------------
+
+set(GENERIC_F412REYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
+set(GENERIC_F412REYX_hid_MAXSIZE 524288)
+set(GENERIC_F412REYX_hid_MAXDATASIZE 262144)
+set(GENERIC_F412REYX_hid_MCU cortex-m4)
+set(GENERIC_F412REYX_hid_FPCONF "-")
+add_library(GENERIC_F412REYX_hid INTERFACE)
+target_compile_options(GENERIC_F412REYX_hid INTERFACE
+  "SHELL:-DSTM32F412Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_F412REYX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F411RETX_hid INTERFACE
+target_compile_definitions(GENERIC_F412REYX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F411RETX"
-	"BOARD_NAME=\"GENERIC_F411RETX\""
-	"BOARD_ID=GENERIC_F411RETX"
+	"ARDUINO_GENERIC_F412REYX"
+	"BOARD_NAME=\"GENERIC_F412REYX\""
+	"BOARD_ID=GENERIC_F412REYX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F411RETX_hid INTERFACE
+target_include_directories(GENERIC_F412REYX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F411RETX_hid_VARIANT_PATH}
+  ${GENERIC_F412REYX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F411RETX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F411RETX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412REYX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F412REYX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F411RETX_hid_MCU}
+  -mcpu=${GENERIC_F412REYX_hid_MCU}
 )
 
 
-# GENERIC_F412CEUX
+# GENERIC_F412REYXP
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412C(E-G)U")
-set(GENERIC_F412CEUX_MAXSIZE 524288)
-set(GENERIC_F412CEUX_MAXDATASIZE 262144)
-set(GENERIC_F412CEUX_MCU cortex-m4)
-set(GENERIC_F412CEUX_FPCONF "-")
-add_library(GENERIC_F412CEUX INTERFACE)
-target_compile_options(GENERIC_F412CEUX INTERFACE
-  "SHELL:-DSTM32F412Cx   "
+set(GENERIC_F412REYXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
+set(GENERIC_F412REYXP_MAXSIZE 524288)
+set(GENERIC_F412REYXP_MAXDATASIZE 262144)
+set(GENERIC_F412REYXP_MCU cortex-m4)
+set(GENERIC_F412REYXP_FPCONF "-")
+add_library(GENERIC_F412REYXP INTERFACE)
+target_compile_options(GENERIC_F412REYXP INTERFACE
+  "SHELL:-DSTM32F412Rx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412CEUX_MCU}
+  -mcpu=${GENERIC_F412REYXP_MCU}
 )
-target_compile_definitions(GENERIC_F412CEUX INTERFACE
+target_compile_definitions(GENERIC_F412REYXP INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412CEUX"
-	"BOARD_NAME=\"GENERIC_F412CEUX\""
-	"BOARD_ID=GENERIC_F412CEUX"
+	"ARDUINO_GENERIC_F412REYXP"
+	"BOARD_NAME=\"GENERIC_F412REYXP\""
+	"BOARD_ID=GENERIC_F412REYXP"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412CEUX INTERFACE
+target_include_directories(GENERIC_F412REYXP INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412CEUX_VARIANT_PATH}
+  ${GENERIC_F412REYXP_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412CEUX INTERFACE
-  "LINKER:--default-script=${GENERIC_F412CEUX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412REYXP INTERFACE
+  "LINKER:--default-script=${GENERIC_F412REYXP_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412CEUX_MCU}
+  -mcpu=${GENERIC_F412REYXP_MCU}
 )
 
-add_library(GENERIC_F412CEUX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F412CEUX_serial_disabled INTERFACE
+add_library(GENERIC_F412REYXP_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F412REYXP_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412CEUX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F412CEUX_serial_generic INTERFACE
+add_library(GENERIC_F412REYXP_serial_generic INTERFACE)
+target_compile_options(GENERIC_F412REYXP_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F412CEUX_serial_none INTERFACE)
-target_compile_options(GENERIC_F412CEUX_serial_none INTERFACE
+add_library(GENERIC_F412REYXP_serial_none INTERFACE)
+target_compile_options(GENERIC_F412REYXP_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F412CEUX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F412CEUX_usb_CDC INTERFACE
+add_library(GENERIC_F412REYXP_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F412REYXP_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F412CEUX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F412CEUX_usb_CDCgen INTERFACE
+add_library(GENERIC_F412REYXP_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F412REYXP_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F412CEUX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F412CEUX_usb_HID INTERFACE
+add_library(GENERIC_F412REYXP_usb_HID INTERFACE)
+target_compile_options(GENERIC_F412REYXP_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F412CEUX_usb_none INTERFACE)
-target_compile_options(GENERIC_F412CEUX_usb_none INTERFACE
+add_library(GENERIC_F412REYXP_usb_none INTERFACE)
+target_compile_options(GENERIC_F412REYXP_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412CEUX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F412CEUX_xusb_FS INTERFACE
+add_library(GENERIC_F412REYXP_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F412REYXP_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412CEUX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F412CEUX_xusb_HS INTERFACE
+add_library(GENERIC_F412REYXP_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F412REYXP_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F412CEUX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F412CEUX_xusb_HSFS INTERFACE
+add_library(GENERIC_F412REYXP_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F412REYXP_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F412CEUX_hid
+# GENERIC_F412REYXP_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412CEUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412C(E-G)U")
-set(GENERIC_F412CEUX_hid_MAXSIZE 524288)
-set(GENERIC_F412CEUX_hid_MAXDATASIZE 262144)
-set(GENERIC_F412CEUX_hid_MCU cortex-m4)
-set(GENERIC_F412CEUX_hid_FPCONF "-")
-add_library(GENERIC_F412CEUX_hid INTERFACE)
-target_compile_options(GENERIC_F412CEUX_hid INTERFACE
-  "SHELL:-DSTM32F412Cx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F412REYXP_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
+set(GENERIC_F412REYXP_hid_MAXSIZE 524288)
+set(GENERIC_F412REYXP_hid_MAXDATASIZE 262144)
+set(GENERIC_F412REYXP_hid_MCU cortex-m4)
+set(GENERIC_F412REYXP_hid_FPCONF "-")
+add_library(GENERIC_F412REYXP_hid INTERFACE)
+target_compile_options(GENERIC_F412REYXP_hid INTERFACE
+  "SHELL:-DSTM32F412Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412CEUX_hid_MCU}
+  -mcpu=${GENERIC_F412REYXP_hid_MCU}
 )
-target_compile_definitions(GENERIC_F412CEUX_hid INTERFACE
+target_compile_definitions(GENERIC_F412REYXP_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412CEUX"
-	"BOARD_NAME=\"GENERIC_F412CEUX\""
-	"BOARD_ID=GENERIC_F412CEUX"
+	"ARDUINO_GENERIC_F412REYXP"
+	"BOARD_NAME=\"GENERIC_F412REYXP\""
+	"BOARD_ID=GENERIC_F412REYXP"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412CEUX_hid INTERFACE
+target_include_directories(GENERIC_F412REYXP_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412CEUX_hid_VARIANT_PATH}
+  ${GENERIC_F412REYXP_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412CEUX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F412CEUX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412REYXP_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F412REYXP_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412CEUX_hid_MCU}
+  -mcpu=${GENERIC_F412REYXP_hid_MCU}
 )
 
 
-# GENERIC_F412CGUX
+# GENERIC_F412RGTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412CGUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412C(E-G)U")
-set(GENERIC_F412CGUX_MAXSIZE 1048576)
-set(GENERIC_F412CGUX_MAXDATASIZE 262144)
-set(GENERIC_F412CGUX_MCU cortex-m4)
-set(GENERIC_F412CGUX_FPCONF "-")
-add_library(GENERIC_F412CGUX INTERFACE)
-target_compile_options(GENERIC_F412CGUX INTERFACE
-  "SHELL:-DSTM32F412Cx   "
+set(GENERIC_F412RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
+set(GENERIC_F412RGTX_MAXSIZE 1048576)
+set(GENERIC_F412RGTX_MAXDATASIZE 262144)
+set(GENERIC_F412RGTX_MCU cortex-m4)
+set(GENERIC_F412RGTX_FPCONF "-")
+add_library(GENERIC_F412RGTX INTERFACE)
+target_compile_options(GENERIC_F412RGTX INTERFACE
+  "SHELL:-DSTM32F412Rx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412CGUX_MCU}
+  -mcpu=${GENERIC_F412RGTX_MCU}
 )
-target_compile_definitions(GENERIC_F412CGUX INTERFACE
+target_compile_definitions(GENERIC_F412RGTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412CGUX"
-	"BOARD_NAME=\"GENERIC_F412CGUX\""
-	"BOARD_ID=GENERIC_F412CGUX"
+	"ARDUINO_GENERIC_F412RGTX"
+	"BOARD_NAME=\"GENERIC_F412RGTX\""
+	"BOARD_ID=GENERIC_F412RGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412CGUX INTERFACE
+target_include_directories(GENERIC_F412RGTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412CGUX_VARIANT_PATH}
+  ${GENERIC_F412RGTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412CGUX INTERFACE
-  "LINKER:--default-script=${GENERIC_F412CGUX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412RGTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F412RGTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412CGUX_MCU}
+  -mcpu=${GENERIC_F412RGTX_MCU}
 )
 
-add_library(GENERIC_F412CGUX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F412CGUX_serial_disabled INTERFACE
+add_library(GENERIC_F412RGTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F412RGTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412CGUX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F412CGUX_serial_generic INTERFACE
+add_library(GENERIC_F412RGTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F412RGTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F412CGUX_serial_none INTERFACE)
-target_compile_options(GENERIC_F412CGUX_serial_none INTERFACE
+add_library(GENERIC_F412RGTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F412RGTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F412CGUX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F412CGUX_usb_CDC INTERFACE
+add_library(GENERIC_F412RGTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F412RGTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F412CGUX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F412CGUX_usb_CDCgen INTERFACE
+add_library(GENERIC_F412RGTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F412RGTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F412CGUX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F412CGUX_usb_HID INTERFACE
+add_library(GENERIC_F412RGTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F412RGTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F412CGUX_usb_none INTERFACE)
-target_compile_options(GENERIC_F412CGUX_usb_none INTERFACE
+add_library(GENERIC_F412RGTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F412RGTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412CGUX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F412CGUX_xusb_FS INTERFACE
+add_library(GENERIC_F412RGTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F412RGTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412CGUX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F412CGUX_xusb_HS INTERFACE
+add_library(GENERIC_F412RGTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F412RGTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F412CGUX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F412CGUX_xusb_HSFS INTERFACE
+add_library(GENERIC_F412RGTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F412RGTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F412CGUX_hid
+# GENERIC_F412RGTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412CGUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412C(E-G)U")
-set(GENERIC_F412CGUX_hid_MAXSIZE 1048576)
-set(GENERIC_F412CGUX_hid_MAXDATASIZE 262144)
-set(GENERIC_F412CGUX_hid_MCU cortex-m4)
-set(GENERIC_F412CGUX_hid_FPCONF "-")
-add_library(GENERIC_F412CGUX_hid INTERFACE)
-target_compile_options(GENERIC_F412CGUX_hid INTERFACE
-  "SHELL:-DSTM32F412Cx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F412RGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
+set(GENERIC_F412RGTX_hid_MAXSIZE 1048576)
+set(GENERIC_F412RGTX_hid_MAXDATASIZE 262144)
+set(GENERIC_F412RGTX_hid_MCU cortex-m4)
+set(GENERIC_F412RGTX_hid_FPCONF "-")
+add_library(GENERIC_F412RGTX_hid INTERFACE)
+target_compile_options(GENERIC_F412RGTX_hid INTERFACE
+  "SHELL:-DSTM32F412Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412CGUX_hid_MCU}
+  -mcpu=${GENERIC_F412RGTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F412CGUX_hid INTERFACE
-  "STM32F4xx"
-	"ARDUINO_GENERIC_F412CGUX"
-	"BOARD_NAME=\"GENERIC_F412CGUX\""
-	"BOARD_ID=GENERIC_F412CGUX"
+target_compile_definitions(GENERIC_F412RGTX_hid INTERFACE
+  "STM32F4xx"
+	"ARDUINO_GENERIC_F412RGTX"
+	"BOARD_NAME=\"GENERIC_F412RGTX\""
+	"BOARD_ID=GENERIC_F412RGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412CGUX_hid INTERFACE
+target_include_directories(GENERIC_F412RGTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412CGUX_hid_VARIANT_PATH}
+  ${GENERIC_F412RGTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412CGUX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F412CGUX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412RGTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F412RGTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412CGUX_hid_MCU}
+  -mcpu=${GENERIC_F412RGTX_hid_MCU}
 )
 
 
-# GENERIC_F412RETX
+# GENERIC_F412RGYX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
-set(GENERIC_F412RETX_MAXSIZE 524288)
-set(GENERIC_F412RETX_MAXDATASIZE 262144)
-set(GENERIC_F412RETX_MCU cortex-m4)
-set(GENERIC_F412RETX_FPCONF "-")
-add_library(GENERIC_F412RETX INTERFACE)
-target_compile_options(GENERIC_F412RETX INTERFACE
+set(GENERIC_F412RGYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
+set(GENERIC_F412RGYX_MAXSIZE 1048576)
+set(GENERIC_F412RGYX_MAXDATASIZE 262144)
+set(GENERIC_F412RGYX_MCU cortex-m4)
+set(GENERIC_F412RGYX_FPCONF "-")
+add_library(GENERIC_F412RGYX INTERFACE)
+target_compile_options(GENERIC_F412RGYX INTERFACE
   "SHELL:-DSTM32F412Rx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RETX_MCU}
+  -mcpu=${GENERIC_F412RGYX_MCU}
 )
-target_compile_definitions(GENERIC_F412RETX INTERFACE
+target_compile_definitions(GENERIC_F412RGYX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412RETX"
-	"BOARD_NAME=\"GENERIC_F412RETX\""
-	"BOARD_ID=GENERIC_F412RETX"
+	"ARDUINO_GENERIC_F412RGYX"
+	"BOARD_NAME=\"GENERIC_F412RGYX\""
+	"BOARD_ID=GENERIC_F412RGYX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412RETX INTERFACE
+target_include_directories(GENERIC_F412RGYX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412RETX_VARIANT_PATH}
+  ${GENERIC_F412RGYX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412RETX INTERFACE
-  "LINKER:--default-script=${GENERIC_F412RETX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412RGYX INTERFACE
+  "LINKER:--default-script=${GENERIC_F412RGYX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RETX_MCU}
+  -mcpu=${GENERIC_F412RGYX_MCU}
 )
 
-add_library(GENERIC_F412RETX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F412RETX_serial_disabled INTERFACE
+add_library(GENERIC_F412RGYX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F412RGYX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412RETX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F412RETX_serial_generic INTERFACE
+add_library(GENERIC_F412RGYX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F412RGYX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F412RETX_serial_none INTERFACE)
-target_compile_options(GENERIC_F412RETX_serial_none INTERFACE
+add_library(GENERIC_F412RGYX_serial_none INTERFACE)
+target_compile_options(GENERIC_F412RGYX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F412RETX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F412RETX_usb_CDC INTERFACE
+add_library(GENERIC_F412RGYX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F412RGYX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F412RETX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F412RETX_usb_CDCgen INTERFACE
+add_library(GENERIC_F412RGYX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F412RGYX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F412RETX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F412RETX_usb_HID INTERFACE
+add_library(GENERIC_F412RGYX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F412RGYX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F412RETX_usb_none INTERFACE)
-target_compile_options(GENERIC_F412RETX_usb_none INTERFACE
+add_library(GENERIC_F412RGYX_usb_none INTERFACE)
+target_compile_options(GENERIC_F412RGYX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412RETX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F412RETX_xusb_FS INTERFACE
+add_library(GENERIC_F412RGYX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F412RGYX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412RETX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F412RETX_xusb_HS INTERFACE
+add_library(GENERIC_F412RGYX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F412RGYX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F412RETX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F412RETX_xusb_HSFS INTERFACE
+add_library(GENERIC_F412RGYX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F412RGYX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F412RETX_hid
+# GENERIC_F412RGYX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412RETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
-set(GENERIC_F412RETX_hid_MAXSIZE 524288)
-set(GENERIC_F412RETX_hid_MAXDATASIZE 262144)
-set(GENERIC_F412RETX_hid_MCU cortex-m4)
-set(GENERIC_F412RETX_hid_FPCONF "-")
-add_library(GENERIC_F412RETX_hid INTERFACE)
-target_compile_options(GENERIC_F412RETX_hid INTERFACE
+set(GENERIC_F412RGYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
+set(GENERIC_F412RGYX_hid_MAXSIZE 1048576)
+set(GENERIC_F412RGYX_hid_MAXDATASIZE 262144)
+set(GENERIC_F412RGYX_hid_MCU cortex-m4)
+set(GENERIC_F412RGYX_hid_FPCONF "-")
+add_library(GENERIC_F412RGYX_hid INTERFACE)
+target_compile_options(GENERIC_F412RGYX_hid INTERFACE
   "SHELL:-DSTM32F412Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RETX_hid_MCU}
+  -mcpu=${GENERIC_F412RGYX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F412RETX_hid INTERFACE
+target_compile_definitions(GENERIC_F412RGYX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412RETX"
-	"BOARD_NAME=\"GENERIC_F412RETX\""
-	"BOARD_ID=GENERIC_F412RETX"
+	"ARDUINO_GENERIC_F412RGYX"
+	"BOARD_NAME=\"GENERIC_F412RGYX\""
+	"BOARD_ID=GENERIC_F412RGYX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412RETX_hid INTERFACE
+target_include_directories(GENERIC_F412RGYX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412RETX_hid_VARIANT_PATH}
+  ${GENERIC_F412RGYX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412RETX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F412RETX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412RGYX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F412RGYX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RETX_hid_MCU}
+  -mcpu=${GENERIC_F412RGYX_hid_MCU}
 )
 
 
-# GENERIC_F412REYX
+# GENERIC_F412RGYXP
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412REYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
-set(GENERIC_F412REYX_MAXSIZE 524288)
-set(GENERIC_F412REYX_MAXDATASIZE 262144)
-set(GENERIC_F412REYX_MCU cortex-m4)
-set(GENERIC_F412REYX_FPCONF "-")
-add_library(GENERIC_F412REYX INTERFACE)
-target_compile_options(GENERIC_F412REYX INTERFACE
+set(GENERIC_F412RGYXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
+set(GENERIC_F412RGYXP_MAXSIZE 1048576)
+set(GENERIC_F412RGYXP_MAXDATASIZE 262144)
+set(GENERIC_F412RGYXP_MCU cortex-m4)
+set(GENERIC_F412RGYXP_FPCONF "-")
+add_library(GENERIC_F412RGYXP INTERFACE)
+target_compile_options(GENERIC_F412RGYXP INTERFACE
   "SHELL:-DSTM32F412Rx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412REYX_MCU}
+  -mcpu=${GENERIC_F412RGYXP_MCU}
 )
-target_compile_definitions(GENERIC_F412REYX INTERFACE
+target_compile_definitions(GENERIC_F412RGYXP INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412REYX"
-	"BOARD_NAME=\"GENERIC_F412REYX\""
-	"BOARD_ID=GENERIC_F412REYX"
+	"ARDUINO_GENERIC_F412RGYXP"
+	"BOARD_NAME=\"GENERIC_F412RGYXP\""
+	"BOARD_ID=GENERIC_F412RGYXP"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412REYX INTERFACE
+target_include_directories(GENERIC_F412RGYXP INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412REYX_VARIANT_PATH}
+  ${GENERIC_F412RGYXP_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412REYX INTERFACE
-  "LINKER:--default-script=${GENERIC_F412REYX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412RGYXP INTERFACE
+  "LINKER:--default-script=${GENERIC_F412RGYXP_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412REYX_MCU}
+  -mcpu=${GENERIC_F412RGYXP_MCU}
 )
 
-add_library(GENERIC_F412REYX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F412REYX_serial_disabled INTERFACE
+add_library(GENERIC_F412RGYXP_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F412RGYXP_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412REYX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F412REYX_serial_generic INTERFACE
+add_library(GENERIC_F412RGYXP_serial_generic INTERFACE)
+target_compile_options(GENERIC_F412RGYXP_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F412REYX_serial_none INTERFACE)
-target_compile_options(GENERIC_F412REYX_serial_none INTERFACE
+add_library(GENERIC_F412RGYXP_serial_none INTERFACE)
+target_compile_options(GENERIC_F412RGYXP_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F412REYX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F412REYX_usb_CDC INTERFACE
+add_library(GENERIC_F412RGYXP_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F412RGYXP_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F412REYX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F412REYX_usb_CDCgen INTERFACE
+add_library(GENERIC_F412RGYXP_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F412RGYXP_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F412REYX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F412REYX_usb_HID INTERFACE
+add_library(GENERIC_F412RGYXP_usb_HID INTERFACE)
+target_compile_options(GENERIC_F412RGYXP_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F412REYX_usb_none INTERFACE)
-target_compile_options(GENERIC_F412REYX_usb_none INTERFACE
+add_library(GENERIC_F412RGYXP_usb_none INTERFACE)
+target_compile_options(GENERIC_F412RGYXP_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412REYX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F412REYX_xusb_FS INTERFACE
+add_library(GENERIC_F412RGYXP_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F412RGYXP_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412REYX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F412REYX_xusb_HS INTERFACE
+add_library(GENERIC_F412RGYXP_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F412RGYXP_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F412REYX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F412REYX_xusb_HSFS INTERFACE
+add_library(GENERIC_F412RGYXP_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F412RGYXP_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F412REYX_hid
+# GENERIC_F412RGYXP_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412REYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
-set(GENERIC_F412REYX_hid_MAXSIZE 524288)
-set(GENERIC_F412REYX_hid_MAXDATASIZE 262144)
-set(GENERIC_F412REYX_hid_MCU cortex-m4)
-set(GENERIC_F412REYX_hid_FPCONF "-")
-add_library(GENERIC_F412REYX_hid INTERFACE)
-target_compile_options(GENERIC_F412REYX_hid INTERFACE
+set(GENERIC_F412RGYXP_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
+set(GENERIC_F412RGYXP_hid_MAXSIZE 1048576)
+set(GENERIC_F412RGYXP_hid_MAXDATASIZE 262144)
+set(GENERIC_F412RGYXP_hid_MCU cortex-m4)
+set(GENERIC_F412RGYXP_hid_FPCONF "-")
+add_library(GENERIC_F412RGYXP_hid INTERFACE)
+target_compile_options(GENERIC_F412RGYXP_hid INTERFACE
   "SHELL:-DSTM32F412Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412REYX_hid_MCU}
+  -mcpu=${GENERIC_F412RGYXP_hid_MCU}
 )
-target_compile_definitions(GENERIC_F412REYX_hid INTERFACE
+target_compile_definitions(GENERIC_F412RGYXP_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412REYX"
-	"BOARD_NAME=\"GENERIC_F412REYX\""
-	"BOARD_ID=GENERIC_F412REYX"
+	"ARDUINO_GENERIC_F412RGYXP"
+	"BOARD_NAME=\"GENERIC_F412RGYXP\""
+	"BOARD_ID=GENERIC_F412RGYXP"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412REYX_hid INTERFACE
+target_include_directories(GENERIC_F412RGYXP_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412REYX_hid_VARIANT_PATH}
+  ${GENERIC_F412RGYXP_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412REYX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F412REYX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412RGYXP_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F412RGYXP_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412REYX_hid_MCU}
+  -mcpu=${GENERIC_F412RGYXP_hid_MCU}
 )
 
 
-# GENERIC_F412REYXP
+# GENERIC_F412ZEJX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412REYXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
-set(GENERIC_F412REYXP_MAXSIZE 524288)
-set(GENERIC_F412REYXP_MAXDATASIZE 262144)
-set(GENERIC_F412REYXP_MCU cortex-m4)
-set(GENERIC_F412REYXP_FPCONF "-")
-add_library(GENERIC_F412REYXP INTERFACE)
-target_compile_options(GENERIC_F412REYXP INTERFACE
-  "SHELL:-DSTM32F412Rx   "
+set(GENERIC_F412ZEJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
+set(GENERIC_F412ZEJX_MAXSIZE 524288)
+set(GENERIC_F412ZEJX_MAXDATASIZE 262144)
+set(GENERIC_F412ZEJX_MCU cortex-m4)
+set(GENERIC_F412ZEJX_FPCONF "-")
+add_library(GENERIC_F412ZEJX INTERFACE)
+target_compile_options(GENERIC_F412ZEJX INTERFACE
+  "SHELL:-DSTM32F412Zx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412REYXP_MCU}
+  -mcpu=${GENERIC_F412ZEJX_MCU}
 )
-target_compile_definitions(GENERIC_F412REYXP INTERFACE
+target_compile_definitions(GENERIC_F412ZEJX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412REYXP"
-	"BOARD_NAME=\"GENERIC_F412REYXP\""
-	"BOARD_ID=GENERIC_F412REYXP"
+	"ARDUINO_GENERIC_F412ZEJX"
+	"BOARD_NAME=\"GENERIC_F412ZEJX\""
+	"BOARD_ID=GENERIC_F412ZEJX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412REYXP INTERFACE
+target_include_directories(GENERIC_F412ZEJX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412REYXP_VARIANT_PATH}
+  ${GENERIC_F412ZEJX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412REYXP INTERFACE
-  "LINKER:--default-script=${GENERIC_F412REYXP_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412ZEJX INTERFACE
+  "LINKER:--default-script=${GENERIC_F412ZEJX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412REYXP_MCU}
+  -mcpu=${GENERIC_F412ZEJX_MCU}
 )
 
-add_library(GENERIC_F412REYXP_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F412REYXP_serial_disabled INTERFACE
+add_library(GENERIC_F412ZEJX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F412ZEJX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412REYXP_serial_generic INTERFACE)
-target_compile_options(GENERIC_F412REYXP_serial_generic INTERFACE
+add_library(GENERIC_F412ZEJX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F412ZEJX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F412REYXP_serial_none INTERFACE)
-target_compile_options(GENERIC_F412REYXP_serial_none INTERFACE
+add_library(GENERIC_F412ZEJX_serial_none INTERFACE)
+target_compile_options(GENERIC_F412ZEJX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F412REYXP_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F412REYXP_usb_CDC INTERFACE
+add_library(GENERIC_F412ZEJX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F412ZEJX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F412REYXP_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F412REYXP_usb_CDCgen INTERFACE
+add_library(GENERIC_F412ZEJX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F412ZEJX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F412REYXP_usb_HID INTERFACE)
-target_compile_options(GENERIC_F412REYXP_usb_HID INTERFACE
+add_library(GENERIC_F412ZEJX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F412ZEJX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F412REYXP_usb_none INTERFACE)
-target_compile_options(GENERIC_F412REYXP_usb_none INTERFACE
+add_library(GENERIC_F412ZEJX_usb_none INTERFACE)
+target_compile_options(GENERIC_F412ZEJX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412REYXP_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F412REYXP_xusb_FS INTERFACE
+add_library(GENERIC_F412ZEJX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F412ZEJX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412REYXP_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F412REYXP_xusb_HS INTERFACE
+add_library(GENERIC_F412ZEJX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F412ZEJX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F412REYXP_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F412REYXP_xusb_HSFS INTERFACE
+add_library(GENERIC_F412ZEJX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F412ZEJX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F412REYXP_hid
+# GENERIC_F412ZEJX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412REYXP_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
-set(GENERIC_F412REYXP_hid_MAXSIZE 524288)
-set(GENERIC_F412REYXP_hid_MAXDATASIZE 262144)
-set(GENERIC_F412REYXP_hid_MCU cortex-m4)
-set(GENERIC_F412REYXP_hid_FPCONF "-")
-add_library(GENERIC_F412REYXP_hid INTERFACE)
-target_compile_options(GENERIC_F412REYXP_hid INTERFACE
-  "SHELL:-DSTM32F412Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F412ZEJX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
+set(GENERIC_F412ZEJX_hid_MAXSIZE 524288)
+set(GENERIC_F412ZEJX_hid_MAXDATASIZE 262144)
+set(GENERIC_F412ZEJX_hid_MCU cortex-m4)
+set(GENERIC_F412ZEJX_hid_FPCONF "-")
+add_library(GENERIC_F412ZEJX_hid INTERFACE)
+target_compile_options(GENERIC_F412ZEJX_hid INTERFACE
+  "SHELL:-DSTM32F412Zx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412REYXP_hid_MCU}
+  -mcpu=${GENERIC_F412ZEJX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F412REYXP_hid INTERFACE
+target_compile_definitions(GENERIC_F412ZEJX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412REYXP"
-	"BOARD_NAME=\"GENERIC_F412REYXP\""
-	"BOARD_ID=GENERIC_F412REYXP"
+	"ARDUINO_GENERIC_F412ZEJX"
+	"BOARD_NAME=\"GENERIC_F412ZEJX\""
+	"BOARD_ID=GENERIC_F412ZEJX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412REYXP_hid INTERFACE
+target_include_directories(GENERIC_F412ZEJX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412REYXP_hid_VARIANT_PATH}
+  ${GENERIC_F412ZEJX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412REYXP_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F412REYXP_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412ZEJX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F412ZEJX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412REYXP_hid_MCU}
+  -mcpu=${GENERIC_F412ZEJX_hid_MCU}
 )
 
 
-# GENERIC_F412RGTX
+# GENERIC_F412ZETX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
-set(GENERIC_F412RGTX_MAXSIZE 1048576)
-set(GENERIC_F412RGTX_MAXDATASIZE 262144)
-set(GENERIC_F412RGTX_MCU cortex-m4)
-set(GENERIC_F412RGTX_FPCONF "-")
-add_library(GENERIC_F412RGTX INTERFACE)
-target_compile_options(GENERIC_F412RGTX INTERFACE
-  "SHELL:-DSTM32F412Rx   "
+set(GENERIC_F412ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
+set(GENERIC_F412ZETX_MAXSIZE 524288)
+set(GENERIC_F412ZETX_MAXDATASIZE 262144)
+set(GENERIC_F412ZETX_MCU cortex-m4)
+set(GENERIC_F412ZETX_FPCONF "-")
+add_library(GENERIC_F412ZETX INTERFACE)
+target_compile_options(GENERIC_F412ZETX INTERFACE
+  "SHELL:-DSTM32F412Zx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RGTX_MCU}
+  -mcpu=${GENERIC_F412ZETX_MCU}
 )
-target_compile_definitions(GENERIC_F412RGTX INTERFACE
+target_compile_definitions(GENERIC_F412ZETX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412RGTX"
-	"BOARD_NAME=\"GENERIC_F412RGTX\""
-	"BOARD_ID=GENERIC_F412RGTX"
+	"ARDUINO_GENERIC_F412ZETX"
+	"BOARD_NAME=\"GENERIC_F412ZETX\""
+	"BOARD_ID=GENERIC_F412ZETX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412RGTX INTERFACE
+target_include_directories(GENERIC_F412ZETX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412RGTX_VARIANT_PATH}
+  ${GENERIC_F412ZETX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412RGTX INTERFACE
-  "LINKER:--default-script=${GENERIC_F412RGTX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412ZETX INTERFACE
+  "LINKER:--default-script=${GENERIC_F412ZETX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RGTX_MCU}
+  -mcpu=${GENERIC_F412ZETX_MCU}
 )
 
-add_library(GENERIC_F412RGTX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F412RGTX_serial_disabled INTERFACE
+add_library(GENERIC_F412ZETX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F412ZETX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412RGTX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F412RGTX_serial_generic INTERFACE
+add_library(GENERIC_F412ZETX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F412ZETX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F412RGTX_serial_none INTERFACE)
-target_compile_options(GENERIC_F412RGTX_serial_none INTERFACE
+add_library(GENERIC_F412ZETX_serial_none INTERFACE)
+target_compile_options(GENERIC_F412ZETX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F412RGTX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F412RGTX_usb_CDC INTERFACE
+add_library(GENERIC_F412ZETX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F412ZETX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F412RGTX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F412RGTX_usb_CDCgen INTERFACE
+add_library(GENERIC_F412ZETX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F412ZETX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F412RGTX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F412RGTX_usb_HID INTERFACE
+add_library(GENERIC_F412ZETX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F412ZETX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F412RGTX_usb_none INTERFACE)
-target_compile_options(GENERIC_F412RGTX_usb_none INTERFACE
+add_library(GENERIC_F412ZETX_usb_none INTERFACE)
+target_compile_options(GENERIC_F412ZETX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412RGTX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F412RGTX_xusb_FS INTERFACE
+add_library(GENERIC_F412ZETX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F412ZETX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412RGTX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F412RGTX_xusb_HS INTERFACE
+add_library(GENERIC_F412ZETX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F412ZETX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F412RGTX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F412RGTX_xusb_HSFS INTERFACE
+add_library(GENERIC_F412ZETX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F412ZETX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F412RGTX_hid
+# GENERIC_F412ZETX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412RGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
-set(GENERIC_F412RGTX_hid_MAXSIZE 1048576)
-set(GENERIC_F412RGTX_hid_MAXDATASIZE 262144)
-set(GENERIC_F412RGTX_hid_MCU cortex-m4)
-set(GENERIC_F412RGTX_hid_FPCONF "-")
-add_library(GENERIC_F412RGTX_hid INTERFACE)
-target_compile_options(GENERIC_F412RGTX_hid INTERFACE
-  "SHELL:-DSTM32F412Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F412ZETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
+set(GENERIC_F412ZETX_hid_MAXSIZE 524288)
+set(GENERIC_F412ZETX_hid_MAXDATASIZE 262144)
+set(GENERIC_F412ZETX_hid_MCU cortex-m4)
+set(GENERIC_F412ZETX_hid_FPCONF "-")
+add_library(GENERIC_F412ZETX_hid INTERFACE)
+target_compile_options(GENERIC_F412ZETX_hid INTERFACE
+  "SHELL:-DSTM32F412Zx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RGTX_hid_MCU}
+  -mcpu=${GENERIC_F412ZETX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F412RGTX_hid INTERFACE
+target_compile_definitions(GENERIC_F412ZETX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412RGTX"
-	"BOARD_NAME=\"GENERIC_F412RGTX\""
-	"BOARD_ID=GENERIC_F412RGTX"
+	"ARDUINO_GENERIC_F412ZETX"
+	"BOARD_NAME=\"GENERIC_F412ZETX\""
+	"BOARD_ID=GENERIC_F412ZETX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412RGTX_hid INTERFACE
+target_include_directories(GENERIC_F412ZETX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412RGTX_hid_VARIANT_PATH}
+  ${GENERIC_F412ZETX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412RGTX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F412RGTX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412ZETX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F412ZETX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RGTX_hid_MCU}
+  -mcpu=${GENERIC_F412ZETX_hid_MCU}
 )
 
 
-# GENERIC_F412RGYX
+# GENERIC_F412ZGJX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412RGYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
-set(GENERIC_F412RGYX_MAXSIZE 1048576)
-set(GENERIC_F412RGYX_MAXDATASIZE 262144)
-set(GENERIC_F412RGYX_MCU cortex-m4)
-set(GENERIC_F412RGYX_FPCONF "-")
-add_library(GENERIC_F412RGYX INTERFACE)
-target_compile_options(GENERIC_F412RGYX INTERFACE
-  "SHELL:-DSTM32F412Rx   "
+set(GENERIC_F412ZGJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
+set(GENERIC_F412ZGJX_MAXSIZE 1048576)
+set(GENERIC_F412ZGJX_MAXDATASIZE 262144)
+set(GENERIC_F412ZGJX_MCU cortex-m4)
+set(GENERIC_F412ZGJX_FPCONF "-")
+add_library(GENERIC_F412ZGJX INTERFACE)
+target_compile_options(GENERIC_F412ZGJX INTERFACE
+  "SHELL:-DSTM32F412Zx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RGYX_MCU}
+  -mcpu=${GENERIC_F412ZGJX_MCU}
 )
-target_compile_definitions(GENERIC_F412RGYX INTERFACE
+target_compile_definitions(GENERIC_F412ZGJX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412RGYX"
-	"BOARD_NAME=\"GENERIC_F412RGYX\""
-	"BOARD_ID=GENERIC_F412RGYX"
+	"ARDUINO_GENERIC_F412ZGJX"
+	"BOARD_NAME=\"GENERIC_F412ZGJX\""
+	"BOARD_ID=GENERIC_F412ZGJX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412RGYX INTERFACE
+target_include_directories(GENERIC_F412ZGJX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412RGYX_VARIANT_PATH}
+  ${GENERIC_F412ZGJX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412RGYX INTERFACE
-  "LINKER:--default-script=${GENERIC_F412RGYX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412ZGJX INTERFACE
+  "LINKER:--default-script=${GENERIC_F412ZGJX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RGYX_MCU}
+  -mcpu=${GENERIC_F412ZGJX_MCU}
 )
 
-add_library(GENERIC_F412RGYX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F412RGYX_serial_disabled INTERFACE
+add_library(GENERIC_F412ZGJX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F412ZGJX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412RGYX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F412RGYX_serial_generic INTERFACE
+add_library(GENERIC_F412ZGJX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F412ZGJX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F412RGYX_serial_none INTERFACE)
-target_compile_options(GENERIC_F412RGYX_serial_none INTERFACE
+add_library(GENERIC_F412ZGJX_serial_none INTERFACE)
+target_compile_options(GENERIC_F412ZGJX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F412RGYX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F412RGYX_usb_CDC INTERFACE
+add_library(GENERIC_F412ZGJX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F412ZGJX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F412RGYX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F412RGYX_usb_CDCgen INTERFACE
+add_library(GENERIC_F412ZGJX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F412ZGJX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F412RGYX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F412RGYX_usb_HID INTERFACE
+add_library(GENERIC_F412ZGJX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F412ZGJX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F412RGYX_usb_none INTERFACE)
-target_compile_options(GENERIC_F412RGYX_usb_none INTERFACE
+add_library(GENERIC_F412ZGJX_usb_none INTERFACE)
+target_compile_options(GENERIC_F412ZGJX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412RGYX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F412RGYX_xusb_FS INTERFACE
+add_library(GENERIC_F412ZGJX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F412ZGJX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412RGYX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F412RGYX_xusb_HS INTERFACE
+add_library(GENERIC_F412ZGJX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F412ZGJX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F412RGYX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F412RGYX_xusb_HSFS INTERFACE
+add_library(GENERIC_F412ZGJX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F412ZGJX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F412RGYX_hid
+# GENERIC_F412ZGJX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412RGYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
-set(GENERIC_F412RGYX_hid_MAXSIZE 1048576)
-set(GENERIC_F412RGYX_hid_MAXDATASIZE 262144)
-set(GENERIC_F412RGYX_hid_MCU cortex-m4)
-set(GENERIC_F412RGYX_hid_FPCONF "-")
-add_library(GENERIC_F412RGYX_hid INTERFACE)
-target_compile_options(GENERIC_F412RGYX_hid INTERFACE
-  "SHELL:-DSTM32F412Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F412ZGJX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
+set(GENERIC_F412ZGJX_hid_MAXSIZE 1048576)
+set(GENERIC_F412ZGJX_hid_MAXDATASIZE 262144)
+set(GENERIC_F412ZGJX_hid_MCU cortex-m4)
+set(GENERIC_F412ZGJX_hid_FPCONF "-")
+add_library(GENERIC_F412ZGJX_hid INTERFACE)
+target_compile_options(GENERIC_F412ZGJX_hid INTERFACE
+  "SHELL:-DSTM32F412Zx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RGYX_hid_MCU}
+  -mcpu=${GENERIC_F412ZGJX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F412RGYX_hid INTERFACE
+target_compile_definitions(GENERIC_F412ZGJX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412RGYX"
-	"BOARD_NAME=\"GENERIC_F412RGYX\""
-	"BOARD_ID=GENERIC_F412RGYX"
+	"ARDUINO_GENERIC_F412ZGJX"
+	"BOARD_NAME=\"GENERIC_F412ZGJX\""
+	"BOARD_ID=GENERIC_F412ZGJX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412RGYX_hid INTERFACE
+target_include_directories(GENERIC_F412ZGJX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412RGYX_hid_VARIANT_PATH}
+  ${GENERIC_F412ZGJX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412RGYX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F412RGYX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412ZGJX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F412ZGJX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RGYX_hid_MCU}
+  -mcpu=${GENERIC_F412ZGJX_hid_MCU}
 )
 
 
-# GENERIC_F412RGYXP
+# GENERIC_F412ZGTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412RGYXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
-set(GENERIC_F412RGYXP_MAXSIZE 1048576)
-set(GENERIC_F412RGYXP_MAXDATASIZE 262144)
-set(GENERIC_F412RGYXP_MCU cortex-m4)
-set(GENERIC_F412RGYXP_FPCONF "-")
-add_library(GENERIC_F412RGYXP INTERFACE)
-target_compile_options(GENERIC_F412RGYXP INTERFACE
-  "SHELL:-DSTM32F412Rx   "
+set(GENERIC_F412ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
+set(GENERIC_F412ZGTX_MAXSIZE 1048576)
+set(GENERIC_F412ZGTX_MAXDATASIZE 262144)
+set(GENERIC_F412ZGTX_MCU cortex-m4)
+set(GENERIC_F412ZGTX_FPCONF "-")
+add_library(GENERIC_F412ZGTX INTERFACE)
+target_compile_options(GENERIC_F412ZGTX INTERFACE
+  "SHELL:-DSTM32F412Zx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RGYXP_MCU}
+  -mcpu=${GENERIC_F412ZGTX_MCU}
 )
-target_compile_definitions(GENERIC_F412RGYXP INTERFACE
+target_compile_definitions(GENERIC_F412ZGTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412RGYXP"
-	"BOARD_NAME=\"GENERIC_F412RGYXP\""
-	"BOARD_ID=GENERIC_F412RGYXP"
+	"ARDUINO_GENERIC_F412ZGTX"
+	"BOARD_NAME=\"GENERIC_F412ZGTX\""
+	"BOARD_ID=GENERIC_F412ZGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412RGYXP INTERFACE
+target_include_directories(GENERIC_F412ZGTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412RGYXP_VARIANT_PATH}
+  ${GENERIC_F412ZGTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412RGYXP INTERFACE
-  "LINKER:--default-script=${GENERIC_F412RGYXP_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412ZGTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F412ZGTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RGYXP_MCU}
+  -mcpu=${GENERIC_F412ZGTX_MCU}
 )
 
-add_library(GENERIC_F412RGYXP_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F412RGYXP_serial_disabled INTERFACE
+add_library(GENERIC_F412ZGTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F412ZGTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412RGYXP_serial_generic INTERFACE)
-target_compile_options(GENERIC_F412RGYXP_serial_generic INTERFACE
+add_library(GENERIC_F412ZGTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F412ZGTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F412RGYXP_serial_none INTERFACE)
-target_compile_options(GENERIC_F412RGYXP_serial_none INTERFACE
+add_library(GENERIC_F412ZGTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F412ZGTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F412RGYXP_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F412RGYXP_usb_CDC INTERFACE
+add_library(GENERIC_F412ZGTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F412ZGTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F412RGYXP_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F412RGYXP_usb_CDCgen INTERFACE
+add_library(GENERIC_F412ZGTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F412ZGTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F412RGYXP_usb_HID INTERFACE)
-target_compile_options(GENERIC_F412RGYXP_usb_HID INTERFACE
+add_library(GENERIC_F412ZGTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F412ZGTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F412RGYXP_usb_none INTERFACE)
-target_compile_options(GENERIC_F412RGYXP_usb_none INTERFACE
+add_library(GENERIC_F412ZGTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F412ZGTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412RGYXP_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F412RGYXP_xusb_FS INTERFACE
+add_library(GENERIC_F412ZGTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F412ZGTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412RGYXP_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F412RGYXP_xusb_HS INTERFACE
+add_library(GENERIC_F412ZGTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F412ZGTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F412RGYXP_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F412RGYXP_xusb_HSFS INTERFACE
+add_library(GENERIC_F412ZGTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F412ZGTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F412RGYXP_hid
+# GENERIC_F412ZGTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412RGYXP_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)")
-set(GENERIC_F412RGYXP_hid_MAXSIZE 1048576)
-set(GENERIC_F412RGYXP_hid_MAXDATASIZE 262144)
-set(GENERIC_F412RGYXP_hid_MCU cortex-m4)
-set(GENERIC_F412RGYXP_hid_FPCONF "-")
-add_library(GENERIC_F412RGYXP_hid INTERFACE)
-target_compile_options(GENERIC_F412RGYXP_hid INTERFACE
-  "SHELL:-DSTM32F412Rx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F412ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
+set(GENERIC_F412ZGTX_hid_MAXSIZE 1048576)
+set(GENERIC_F412ZGTX_hid_MAXDATASIZE 262144)
+set(GENERIC_F412ZGTX_hid_MCU cortex-m4)
+set(GENERIC_F412ZGTX_hid_FPCONF "-")
+add_library(GENERIC_F412ZGTX_hid INTERFACE)
+target_compile_options(GENERIC_F412ZGTX_hid INTERFACE
+  "SHELL:-DSTM32F412Zx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RGYXP_hid_MCU}
+  -mcpu=${GENERIC_F412ZGTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F412RGYXP_hid INTERFACE
+target_compile_definitions(GENERIC_F412ZGTX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412RGYXP"
-	"BOARD_NAME=\"GENERIC_F412RGYXP\""
-	"BOARD_ID=GENERIC_F412RGYXP"
+	"ARDUINO_GENERIC_F412ZGTX"
+	"BOARD_NAME=\"GENERIC_F412ZGTX\""
+	"BOARD_ID=GENERIC_F412ZGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412RGYXP_hid INTERFACE
+target_include_directories(GENERIC_F412ZGTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412RGYXP_hid_VARIANT_PATH}
+  ${GENERIC_F412ZGTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412RGYXP_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F412RGYXP_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F412ZGTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F412ZGTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412RGYXP_hid_MCU}
+  -mcpu=${GENERIC_F412ZGTX_hid_MCU}
 )
 
 
-# GENERIC_F412ZEJX
+# GENERIC_F413CGUX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412ZEJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
-set(GENERIC_F412ZEJX_MAXSIZE 524288)
-set(GENERIC_F412ZEJX_MAXDATASIZE 262144)
-set(GENERIC_F412ZEJX_MCU cortex-m4)
-set(GENERIC_F412ZEJX_FPCONF "-")
-add_library(GENERIC_F412ZEJX INTERFACE)
-target_compile_options(GENERIC_F412ZEJX INTERFACE
-  "SHELL:-DSTM32F412Zx   "
+set(GENERIC_F413CGUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU")
+set(GENERIC_F413CGUX_MAXSIZE 1048576)
+set(GENERIC_F413CGUX_MAXDATASIZE 327680)
+set(GENERIC_F413CGUX_MCU cortex-m4)
+set(GENERIC_F413CGUX_FPCONF "-")
+add_library(GENERIC_F413CGUX INTERFACE)
+target_compile_options(GENERIC_F413CGUX INTERFACE
+  "SHELL:-DSTM32F413xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZEJX_MCU}
+  -mcpu=${GENERIC_F413CGUX_MCU}
 )
-target_compile_definitions(GENERIC_F412ZEJX INTERFACE
+target_compile_definitions(GENERIC_F413CGUX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412ZEJX"
-	"BOARD_NAME=\"GENERIC_F412ZEJX\""
-	"BOARD_ID=GENERIC_F412ZEJX"
+	"ARDUINO_GENERIC_F413CGUX"
+	"BOARD_NAME=\"GENERIC_F413CGUX\""
+	"BOARD_ID=GENERIC_F413CGUX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412ZEJX INTERFACE
+target_include_directories(GENERIC_F413CGUX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412ZEJX_VARIANT_PATH}
+  ${GENERIC_F413CGUX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412ZEJX INTERFACE
-  "LINKER:--default-script=${GENERIC_F412ZEJX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413CGUX INTERFACE
+  "LINKER:--default-script=${GENERIC_F413CGUX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZEJX_MCU}
+  -mcpu=${GENERIC_F413CGUX_MCU}
 )
 
-add_library(GENERIC_F412ZEJX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F412ZEJX_serial_disabled INTERFACE
+add_library(GENERIC_F413CGUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F413CGUX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412ZEJX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F412ZEJX_serial_generic INTERFACE
+add_library(GENERIC_F413CGUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F413CGUX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F412ZEJX_serial_none INTERFACE)
-target_compile_options(GENERIC_F412ZEJX_serial_none INTERFACE
+add_library(GENERIC_F413CGUX_serial_none INTERFACE)
+target_compile_options(GENERIC_F413CGUX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F412ZEJX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F412ZEJX_usb_CDC INTERFACE
+add_library(GENERIC_F413CGUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F413CGUX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F412ZEJX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F412ZEJX_usb_CDCgen INTERFACE
+add_library(GENERIC_F413CGUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F413CGUX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F412ZEJX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F412ZEJX_usb_HID INTERFACE
+add_library(GENERIC_F413CGUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F413CGUX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F412ZEJX_usb_none INTERFACE)
-target_compile_options(GENERIC_F412ZEJX_usb_none INTERFACE
+add_library(GENERIC_F413CGUX_usb_none INTERFACE)
+target_compile_options(GENERIC_F413CGUX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412ZEJX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F412ZEJX_xusb_FS INTERFACE
+add_library(GENERIC_F413CGUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F413CGUX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412ZEJX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F412ZEJX_xusb_HS INTERFACE
+add_library(GENERIC_F413CGUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F413CGUX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F412ZEJX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F412ZEJX_xusb_HSFS INTERFACE
+add_library(GENERIC_F413CGUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F413CGUX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F412ZEJX_hid
+# GENERIC_F413CGUX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412ZEJX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
-set(GENERIC_F412ZEJX_hid_MAXSIZE 524288)
-set(GENERIC_F412ZEJX_hid_MAXDATASIZE 262144)
-set(GENERIC_F412ZEJX_hid_MCU cortex-m4)
-set(GENERIC_F412ZEJX_hid_FPCONF "-")
-add_library(GENERIC_F412ZEJX_hid INTERFACE)
-target_compile_options(GENERIC_F412ZEJX_hid INTERFACE
-  "SHELL:-DSTM32F412Zx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F413CGUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU")
+set(GENERIC_F413CGUX_hid_MAXSIZE 1048576)
+set(GENERIC_F413CGUX_hid_MAXDATASIZE 327680)
+set(GENERIC_F413CGUX_hid_MCU cortex-m4)
+set(GENERIC_F413CGUX_hid_FPCONF "-")
+add_library(GENERIC_F413CGUX_hid INTERFACE)
+target_compile_options(GENERIC_F413CGUX_hid INTERFACE
+  "SHELL:-DSTM32F413xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZEJX_hid_MCU}
+  -mcpu=${GENERIC_F413CGUX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F412ZEJX_hid INTERFACE
+target_compile_definitions(GENERIC_F413CGUX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412ZEJX"
-	"BOARD_NAME=\"GENERIC_F412ZEJX\""
-	"BOARD_ID=GENERIC_F412ZEJX"
+	"ARDUINO_GENERIC_F413CGUX"
+	"BOARD_NAME=\"GENERIC_F413CGUX\""
+	"BOARD_ID=GENERIC_F413CGUX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412ZEJX_hid INTERFACE
+target_include_directories(GENERIC_F413CGUX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412ZEJX_hid_VARIANT_PATH}
+  ${GENERIC_F413CGUX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412ZEJX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F412ZEJX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413CGUX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F413CGUX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZEJX_hid_MCU}
+  -mcpu=${GENERIC_F413CGUX_hid_MCU}
 )
 
 
-# GENERIC_F412ZETX
+# GENERIC_F413CHUX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
-set(GENERIC_F412ZETX_MAXSIZE 524288)
-set(GENERIC_F412ZETX_MAXDATASIZE 262144)
-set(GENERIC_F412ZETX_MCU cortex-m4)
-set(GENERIC_F412ZETX_FPCONF "-")
-add_library(GENERIC_F412ZETX INTERFACE)
-target_compile_options(GENERIC_F412ZETX INTERFACE
-  "SHELL:-DSTM32F412Zx   "
+set(GENERIC_F413CHUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU")
+set(GENERIC_F413CHUX_MAXSIZE 1572864)
+set(GENERIC_F413CHUX_MAXDATASIZE 327680)
+set(GENERIC_F413CHUX_MCU cortex-m4)
+set(GENERIC_F413CHUX_FPCONF "-")
+add_library(GENERIC_F413CHUX INTERFACE)
+target_compile_options(GENERIC_F413CHUX INTERFACE
+  "SHELL:-DSTM32F413xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZETX_MCU}
+  -mcpu=${GENERIC_F413CHUX_MCU}
 )
-target_compile_definitions(GENERIC_F412ZETX INTERFACE
+target_compile_definitions(GENERIC_F413CHUX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412ZETX"
-	"BOARD_NAME=\"GENERIC_F412ZETX\""
-	"BOARD_ID=GENERIC_F412ZETX"
+	"ARDUINO_GENERIC_F413CHUX"
+	"BOARD_NAME=\"GENERIC_F413CHUX\""
+	"BOARD_ID=GENERIC_F413CHUX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412ZETX INTERFACE
+target_include_directories(GENERIC_F413CHUX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412ZETX_VARIANT_PATH}
+  ${GENERIC_F413CHUX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412ZETX INTERFACE
-  "LINKER:--default-script=${GENERIC_F412ZETX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413CHUX INTERFACE
+  "LINKER:--default-script=${GENERIC_F413CHUX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+	"LINKER:--defsym=LD_MAX_SIZE=1572864"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZETX_MCU}
+  -mcpu=${GENERIC_F413CHUX_MCU}
 )
 
-add_library(GENERIC_F412ZETX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F412ZETX_serial_disabled INTERFACE
+add_library(GENERIC_F413CHUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F413CHUX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412ZETX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F412ZETX_serial_generic INTERFACE
+add_library(GENERIC_F413CHUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F413CHUX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F412ZETX_serial_none INTERFACE)
-target_compile_options(GENERIC_F412ZETX_serial_none INTERFACE
+add_library(GENERIC_F413CHUX_serial_none INTERFACE)
+target_compile_options(GENERIC_F413CHUX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F412ZETX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F412ZETX_usb_CDC INTERFACE
+add_library(GENERIC_F413CHUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F413CHUX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F412ZETX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F412ZETX_usb_CDCgen INTERFACE
+add_library(GENERIC_F413CHUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F413CHUX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F412ZETX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F412ZETX_usb_HID INTERFACE
+add_library(GENERIC_F413CHUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F413CHUX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F412ZETX_usb_none INTERFACE)
-target_compile_options(GENERIC_F412ZETX_usb_none INTERFACE
+add_library(GENERIC_F413CHUX_usb_none INTERFACE)
+target_compile_options(GENERIC_F413CHUX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412ZETX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F412ZETX_xusb_FS INTERFACE
+add_library(GENERIC_F413CHUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F413CHUX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412ZETX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F412ZETX_xusb_HS INTERFACE
+add_library(GENERIC_F413CHUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F413CHUX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F412ZETX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F412ZETX_xusb_HSFS INTERFACE
+add_library(GENERIC_F413CHUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F413CHUX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F412ZETX_hid
+# GENERIC_F413CHUX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412ZETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
-set(GENERIC_F412ZETX_hid_MAXSIZE 524288)
-set(GENERIC_F412ZETX_hid_MAXDATASIZE 262144)
-set(GENERIC_F412ZETX_hid_MCU cortex-m4)
-set(GENERIC_F412ZETX_hid_FPCONF "-")
-add_library(GENERIC_F412ZETX_hid INTERFACE)
-target_compile_options(GENERIC_F412ZETX_hid INTERFACE
-  "SHELL:-DSTM32F412Zx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F413CHUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU")
+set(GENERIC_F413CHUX_hid_MAXSIZE 1572864)
+set(GENERIC_F413CHUX_hid_MAXDATASIZE 327680)
+set(GENERIC_F413CHUX_hid_MCU cortex-m4)
+set(GENERIC_F413CHUX_hid_FPCONF "-")
+add_library(GENERIC_F413CHUX_hid INTERFACE)
+target_compile_options(GENERIC_F413CHUX_hid INTERFACE
+  "SHELL:-DSTM32F413xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZETX_hid_MCU}
+  -mcpu=${GENERIC_F413CHUX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F412ZETX_hid INTERFACE
+target_compile_definitions(GENERIC_F413CHUX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412ZETX"
-	"BOARD_NAME=\"GENERIC_F412ZETX\""
-	"BOARD_ID=GENERIC_F412ZETX"
+	"ARDUINO_GENERIC_F413CHUX"
+	"BOARD_NAME=\"GENERIC_F413CHUX\""
+	"BOARD_ID=GENERIC_F413CHUX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412ZETX_hid INTERFACE
+target_include_directories(GENERIC_F413CHUX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412ZETX_hid_VARIANT_PATH}
+  ${GENERIC_F413CHUX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412ZETX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F412ZETX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413CHUX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F413CHUX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+	"LINKER:--defsym=LD_MAX_SIZE=1572864"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZETX_hid_MCU}
+  -mcpu=${GENERIC_F413CHUX_hid_MCU}
 )
 
 
-# GENERIC_F412ZGJX
+# GENERIC_F413RGTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412ZGJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
-set(GENERIC_F412ZGJX_MAXSIZE 1048576)
-set(GENERIC_F412ZGJX_MAXDATASIZE 262144)
-set(GENERIC_F412ZGJX_MCU cortex-m4)
-set(GENERIC_F412ZGJX_FPCONF "-")
-add_library(GENERIC_F412ZGJX INTERFACE)
-target_compile_options(GENERIC_F412ZGJX INTERFACE
-  "SHELL:-DSTM32F412Zx   "
+set(GENERIC_F413RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT")
+set(GENERIC_F413RGTX_MAXSIZE 1048576)
+set(GENERIC_F413RGTX_MAXDATASIZE 327680)
+set(GENERIC_F413RGTX_MCU cortex-m4)
+set(GENERIC_F413RGTX_FPCONF "-")
+add_library(GENERIC_F413RGTX INTERFACE)
+target_compile_options(GENERIC_F413RGTX INTERFACE
+  "SHELL:-DSTM32F413xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZGJX_MCU}
+  -mcpu=${GENERIC_F413RGTX_MCU}
 )
-target_compile_definitions(GENERIC_F412ZGJX INTERFACE
+target_compile_definitions(GENERIC_F413RGTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412ZGJX"
-	"BOARD_NAME=\"GENERIC_F412ZGJX\""
-	"BOARD_ID=GENERIC_F412ZGJX"
+	"ARDUINO_GENERIC_F413RGTX"
+	"BOARD_NAME=\"GENERIC_F413RGTX\""
+	"BOARD_ID=GENERIC_F413RGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412ZGJX INTERFACE
+target_include_directories(GENERIC_F413RGTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412ZGJX_VARIANT_PATH}
+  ${GENERIC_F413RGTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412ZGJX INTERFACE
-  "LINKER:--default-script=${GENERIC_F412ZGJX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413RGTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F413RGTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZGJX_MCU}
+  -mcpu=${GENERIC_F413RGTX_MCU}
 )
 
-add_library(GENERIC_F412ZGJX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F412ZGJX_serial_disabled INTERFACE
+add_library(GENERIC_F413RGTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F413RGTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412ZGJX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F412ZGJX_serial_generic INTERFACE
+add_library(GENERIC_F413RGTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F413RGTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F412ZGJX_serial_none INTERFACE)
-target_compile_options(GENERIC_F412ZGJX_serial_none INTERFACE
+add_library(GENERIC_F413RGTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F413RGTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F412ZGJX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F412ZGJX_usb_CDC INTERFACE
+add_library(GENERIC_F413RGTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F413RGTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F412ZGJX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F412ZGJX_usb_CDCgen INTERFACE
+add_library(GENERIC_F413RGTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F413RGTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F412ZGJX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F412ZGJX_usb_HID INTERFACE
+add_library(GENERIC_F413RGTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F413RGTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F412ZGJX_usb_none INTERFACE)
-target_compile_options(GENERIC_F412ZGJX_usb_none INTERFACE
+add_library(GENERIC_F413RGTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F413RGTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412ZGJX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F412ZGJX_xusb_FS INTERFACE
+add_library(GENERIC_F413RGTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F413RGTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412ZGJX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F412ZGJX_xusb_HS INTERFACE
+add_library(GENERIC_F413RGTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F413RGTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F412ZGJX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F412ZGJX_xusb_HSFS INTERFACE
+add_library(GENERIC_F413RGTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F413RGTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F412ZGJX_hid
+# GENERIC_F413RGTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412ZGJX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
-set(GENERIC_F412ZGJX_hid_MAXSIZE 1048576)
-set(GENERIC_F412ZGJX_hid_MAXDATASIZE 262144)
-set(GENERIC_F412ZGJX_hid_MCU cortex-m4)
-set(GENERIC_F412ZGJX_hid_FPCONF "-")
-add_library(GENERIC_F412ZGJX_hid INTERFACE)
-target_compile_options(GENERIC_F412ZGJX_hid INTERFACE
-  "SHELL:-DSTM32F412Zx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F413RGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT")
+set(GENERIC_F413RGTX_hid_MAXSIZE 1048576)
+set(GENERIC_F413RGTX_hid_MAXDATASIZE 327680)
+set(GENERIC_F413RGTX_hid_MCU cortex-m4)
+set(GENERIC_F413RGTX_hid_FPCONF "-")
+add_library(GENERIC_F413RGTX_hid INTERFACE)
+target_compile_options(GENERIC_F413RGTX_hid INTERFACE
+  "SHELL:-DSTM32F413xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZGJX_hid_MCU}
+  -mcpu=${GENERIC_F413RGTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F412ZGJX_hid INTERFACE
+target_compile_definitions(GENERIC_F413RGTX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412ZGJX"
-	"BOARD_NAME=\"GENERIC_F412ZGJX\""
-	"BOARD_ID=GENERIC_F412ZGJX"
+	"ARDUINO_GENERIC_F413RGTX"
+	"BOARD_NAME=\"GENERIC_F413RGTX\""
+	"BOARD_ID=GENERIC_F413RGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412ZGJX_hid INTERFACE
+target_include_directories(GENERIC_F413RGTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412ZGJX_hid_VARIANT_PATH}
+  ${GENERIC_F413RGTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412ZGJX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F412ZGJX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413RGTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F413RGTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZGJX_hid_MCU}
+  -mcpu=${GENERIC_F413RGTX_hid_MCU}
 )
 
 
-# GENERIC_F412ZGTX
+# GENERIC_F413RHTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
-set(GENERIC_F412ZGTX_MAXSIZE 1048576)
-set(GENERIC_F412ZGTX_MAXDATASIZE 262144)
-set(GENERIC_F412ZGTX_MCU cortex-m4)
-set(GENERIC_F412ZGTX_FPCONF "-")
-add_library(GENERIC_F412ZGTX INTERFACE)
-target_compile_options(GENERIC_F412ZGTX INTERFACE
-  "SHELL:-DSTM32F412Zx   "
+set(GENERIC_F413RHTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT")
+set(GENERIC_F413RHTX_MAXSIZE 1572864)
+set(GENERIC_F413RHTX_MAXDATASIZE 327680)
+set(GENERIC_F413RHTX_MCU cortex-m4)
+set(GENERIC_F413RHTX_FPCONF "-")
+add_library(GENERIC_F413RHTX INTERFACE)
+target_compile_options(GENERIC_F413RHTX INTERFACE
+  "SHELL:-DSTM32F413xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZGTX_MCU}
+  -mcpu=${GENERIC_F413RHTX_MCU}
 )
-target_compile_definitions(GENERIC_F412ZGTX INTERFACE
+target_compile_definitions(GENERIC_F413RHTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412ZGTX"
-	"BOARD_NAME=\"GENERIC_F412ZGTX\""
-	"BOARD_ID=GENERIC_F412ZGTX"
+	"ARDUINO_GENERIC_F413RHTX"
+	"BOARD_NAME=\"GENERIC_F413RHTX\""
+	"BOARD_ID=GENERIC_F413RHTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412ZGTX INTERFACE
+target_include_directories(GENERIC_F413RHTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412ZGTX_VARIANT_PATH}
+  ${GENERIC_F413RHTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412ZGTX INTERFACE
-  "LINKER:--default-script=${GENERIC_F412ZGTX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413RHTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F413RHTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=1048576"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+	"LINKER:--defsym=LD_MAX_SIZE=1572864"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZGTX_MCU}
+  -mcpu=${GENERIC_F413RHTX_MCU}
 )
 
-add_library(GENERIC_F412ZGTX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F412ZGTX_serial_disabled INTERFACE
+add_library(GENERIC_F413RHTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F413RHTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412ZGTX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F412ZGTX_serial_generic INTERFACE
+add_library(GENERIC_F413RHTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F413RHTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F412ZGTX_serial_none INTERFACE)
-target_compile_options(GENERIC_F412ZGTX_serial_none INTERFACE
+add_library(GENERIC_F413RHTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F413RHTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F412ZGTX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F412ZGTX_usb_CDC INTERFACE
+add_library(GENERIC_F413RHTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F413RHTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F412ZGTX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F412ZGTX_usb_CDCgen INTERFACE
+add_library(GENERIC_F413RHTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F413RHTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F412ZGTX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F412ZGTX_usb_HID INTERFACE
+add_library(GENERIC_F413RHTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F413RHTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F412ZGTX_usb_none INTERFACE)
-target_compile_options(GENERIC_F412ZGTX_usb_none INTERFACE
+add_library(GENERIC_F413RHTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F413RHTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412ZGTX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F412ZGTX_xusb_FS INTERFACE
+add_library(GENERIC_F413RHTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F413RHTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F412ZGTX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F412ZGTX_xusb_HS INTERFACE
+add_library(GENERIC_F413RHTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F413RHTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F412ZGTX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F412ZGTX_xusb_HSFS INTERFACE
+add_library(GENERIC_F413RHTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F413RHTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F412ZGTX_hid
+# GENERIC_F413RHTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F412ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412Z(E-G)(J-T)")
-set(GENERIC_F412ZGTX_hid_MAXSIZE 1048576)
-set(GENERIC_F412ZGTX_hid_MAXDATASIZE 262144)
-set(GENERIC_F412ZGTX_hid_MCU cortex-m4)
-set(GENERIC_F412ZGTX_hid_FPCONF "-")
-add_library(GENERIC_F412ZGTX_hid INTERFACE)
-target_compile_options(GENERIC_F412ZGTX_hid INTERFACE
-  "SHELL:-DSTM32F412Zx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F413RHTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT")
+set(GENERIC_F413RHTX_hid_MAXSIZE 1572864)
+set(GENERIC_F413RHTX_hid_MAXDATASIZE 327680)
+set(GENERIC_F413RHTX_hid_MCU cortex-m4)
+set(GENERIC_F413RHTX_hid_FPCONF "-")
+add_library(GENERIC_F413RHTX_hid INTERFACE)
+target_compile_options(GENERIC_F413RHTX_hid INTERFACE
+  "SHELL:-DSTM32F413xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZGTX_hid_MCU}
+  -mcpu=${GENERIC_F413RHTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F412ZGTX_hid INTERFACE
+target_compile_definitions(GENERIC_F413RHTX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F412ZGTX"
-	"BOARD_NAME=\"GENERIC_F412ZGTX\""
-	"BOARD_ID=GENERIC_F412ZGTX"
+	"ARDUINO_GENERIC_F413RHTX"
+	"BOARD_NAME=\"GENERIC_F413RHTX\""
+	"BOARD_ID=GENERIC_F413RHTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F412ZGTX_hid INTERFACE
+target_include_directories(GENERIC_F413RHTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F412ZGTX_hid_VARIANT_PATH}
+  ${GENERIC_F413RHTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F412ZGTX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F412ZGTX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413RHTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F413RHTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=1048576"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=262144"
+	"LINKER:--defsym=LD_MAX_SIZE=1572864"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F412ZGTX_hid_MCU}
+  -mcpu=${GENERIC_F413RHTX_hid_MCU}
 )
 
 
-# GENERIC_F413CGUX
+# GENERIC_F413ZGJX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413CGUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU")
-set(GENERIC_F413CGUX_MAXSIZE 1048576)
-set(GENERIC_F413CGUX_MAXDATASIZE 327680)
-set(GENERIC_F413CGUX_MCU cortex-m4)
-set(GENERIC_F413CGUX_FPCONF "-")
-add_library(GENERIC_F413CGUX INTERFACE)
-target_compile_options(GENERIC_F413CGUX INTERFACE
+set(GENERIC_F413ZGJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
+set(GENERIC_F413ZGJX_MAXSIZE 1048576)
+set(GENERIC_F413ZGJX_MAXDATASIZE 327680)
+set(GENERIC_F413ZGJX_MCU cortex-m4)
+set(GENERIC_F413ZGJX_FPCONF "-")
+add_library(GENERIC_F413ZGJX INTERFACE)
+target_compile_options(GENERIC_F413ZGJX INTERFACE
   "SHELL:-DSTM32F413xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413CGUX_MCU}
+  -mcpu=${GENERIC_F413ZGJX_MCU}
 )
-target_compile_definitions(GENERIC_F413CGUX INTERFACE
+target_compile_definitions(GENERIC_F413ZGJX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413CGUX"
-	"BOARD_NAME=\"GENERIC_F413CGUX\""
-	"BOARD_ID=GENERIC_F413CGUX"
+	"ARDUINO_GENERIC_F413ZGJX"
+	"BOARD_NAME=\"GENERIC_F413ZGJX\""
+	"BOARD_ID=GENERIC_F413ZGJX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413CGUX INTERFACE
+target_include_directories(GENERIC_F413ZGJX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413CGUX_VARIANT_PATH}
+  ${GENERIC_F413ZGJX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413CGUX INTERFACE
-  "LINKER:--default-script=${GENERIC_F413CGUX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413ZGJX INTERFACE
+  "LINKER:--default-script=${GENERIC_F413ZGJX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413CGUX_MCU}
+  -mcpu=${GENERIC_F413ZGJX_MCU}
 )
 
-add_library(GENERIC_F413CGUX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F413CGUX_serial_disabled INTERFACE
+add_library(GENERIC_F413ZGJX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F413ZGJX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413CGUX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F413CGUX_serial_generic INTERFACE
+add_library(GENERIC_F413ZGJX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F413ZGJX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F413CGUX_serial_none INTERFACE)
-target_compile_options(GENERIC_F413CGUX_serial_none INTERFACE
+add_library(GENERIC_F413ZGJX_serial_none INTERFACE)
+target_compile_options(GENERIC_F413ZGJX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F413CGUX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F413CGUX_usb_CDC INTERFACE
+add_library(GENERIC_F413ZGJX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F413ZGJX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F413CGUX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F413CGUX_usb_CDCgen INTERFACE
+add_library(GENERIC_F413ZGJX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F413ZGJX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F413CGUX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F413CGUX_usb_HID INTERFACE
+add_library(GENERIC_F413ZGJX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F413ZGJX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F413CGUX_usb_none INTERFACE)
-target_compile_options(GENERIC_F413CGUX_usb_none INTERFACE
+add_library(GENERIC_F413ZGJX_usb_none INTERFACE)
+target_compile_options(GENERIC_F413ZGJX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413CGUX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F413CGUX_xusb_FS INTERFACE
+add_library(GENERIC_F413ZGJX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F413ZGJX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413CGUX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F413CGUX_xusb_HS INTERFACE
+add_library(GENERIC_F413ZGJX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F413ZGJX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F413CGUX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F413CGUX_xusb_HSFS INTERFACE
+add_library(GENERIC_F413ZGJX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F413ZGJX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F413CGUX_hid
+# GENERIC_F413ZGJX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413CGUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU")
-set(GENERIC_F413CGUX_hid_MAXSIZE 1048576)
-set(GENERIC_F413CGUX_hid_MAXDATASIZE 327680)
-set(GENERIC_F413CGUX_hid_MCU cortex-m4)
-set(GENERIC_F413CGUX_hid_FPCONF "-")
-add_library(GENERIC_F413CGUX_hid INTERFACE)
-target_compile_options(GENERIC_F413CGUX_hid INTERFACE
+set(GENERIC_F413ZGJX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
+set(GENERIC_F413ZGJX_hid_MAXSIZE 1048576)
+set(GENERIC_F413ZGJX_hid_MAXDATASIZE 327680)
+set(GENERIC_F413ZGJX_hid_MCU cortex-m4)
+set(GENERIC_F413ZGJX_hid_FPCONF "-")
+add_library(GENERIC_F413ZGJX_hid INTERFACE)
+target_compile_options(GENERIC_F413ZGJX_hid INTERFACE
   "SHELL:-DSTM32F413xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413CGUX_hid_MCU}
+  -mcpu=${GENERIC_F413ZGJX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F413CGUX_hid INTERFACE
+target_compile_definitions(GENERIC_F413ZGJX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413CGUX"
-	"BOARD_NAME=\"GENERIC_F413CGUX\""
-	"BOARD_ID=GENERIC_F413CGUX"
+	"ARDUINO_GENERIC_F413ZGJX"
+	"BOARD_NAME=\"GENERIC_F413ZGJX\""
+	"BOARD_ID=GENERIC_F413ZGJX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413CGUX_hid INTERFACE
+target_include_directories(GENERIC_F413ZGJX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413CGUX_hid_VARIANT_PATH}
+  ${GENERIC_F413ZGJX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413CGUX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F413CGUX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413ZGJX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F413ZGJX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413CGUX_hid_MCU}
+  -mcpu=${GENERIC_F413ZGJX_hid_MCU}
 )
 
 
-# GENERIC_F413CHUX
+# GENERIC_F413ZGTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413CHUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU")
-set(GENERIC_F413CHUX_MAXSIZE 1572864)
-set(GENERIC_F413CHUX_MAXDATASIZE 327680)
-set(GENERIC_F413CHUX_MCU cortex-m4)
-set(GENERIC_F413CHUX_FPCONF "-")
-add_library(GENERIC_F413CHUX INTERFACE)
-target_compile_options(GENERIC_F413CHUX INTERFACE
+set(GENERIC_F413ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
+set(GENERIC_F413ZGTX_MAXSIZE 1048576)
+set(GENERIC_F413ZGTX_MAXDATASIZE 327680)
+set(GENERIC_F413ZGTX_MCU cortex-m4)
+set(GENERIC_F413ZGTX_FPCONF "-")
+add_library(GENERIC_F413ZGTX INTERFACE)
+target_compile_options(GENERIC_F413ZGTX INTERFACE
   "SHELL:-DSTM32F413xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413CHUX_MCU}
+  -mcpu=${GENERIC_F413ZGTX_MCU}
 )
-target_compile_definitions(GENERIC_F413CHUX INTERFACE
+target_compile_definitions(GENERIC_F413ZGTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413CHUX"
-	"BOARD_NAME=\"GENERIC_F413CHUX\""
-	"BOARD_ID=GENERIC_F413CHUX"
+	"ARDUINO_GENERIC_F413ZGTX"
+	"BOARD_NAME=\"GENERIC_F413ZGTX\""
+	"BOARD_ID=GENERIC_F413ZGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413CHUX INTERFACE
+target_include_directories(GENERIC_F413ZGTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413CHUX_VARIANT_PATH}
+  ${GENERIC_F413ZGTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413CHUX INTERFACE
-  "LINKER:--default-script=${GENERIC_F413CHUX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413ZGTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F413ZGTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=1572864"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413CHUX_MCU}
+  -mcpu=${GENERIC_F413ZGTX_MCU}
 )
 
-add_library(GENERIC_F413CHUX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F413CHUX_serial_disabled INTERFACE
+add_library(GENERIC_F413ZGTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F413ZGTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413CHUX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F413CHUX_serial_generic INTERFACE
+add_library(GENERIC_F413ZGTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F413ZGTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F413CHUX_serial_none INTERFACE)
-target_compile_options(GENERIC_F413CHUX_serial_none INTERFACE
+add_library(GENERIC_F413ZGTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F413ZGTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F413CHUX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F413CHUX_usb_CDC INTERFACE
+add_library(GENERIC_F413ZGTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F413ZGTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F413CHUX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F413CHUX_usb_CDCgen INTERFACE
+add_library(GENERIC_F413ZGTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F413ZGTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F413CHUX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F413CHUX_usb_HID INTERFACE
+add_library(GENERIC_F413ZGTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F413ZGTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F413CHUX_usb_none INTERFACE)
-target_compile_options(GENERIC_F413CHUX_usb_none INTERFACE
+add_library(GENERIC_F413ZGTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F413ZGTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413CHUX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F413CHUX_xusb_FS INTERFACE
+add_library(GENERIC_F413ZGTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F413ZGTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413CHUX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F413CHUX_xusb_HS INTERFACE
+add_library(GENERIC_F413ZGTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F413ZGTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F413CHUX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F413CHUX_xusb_HSFS INTERFACE
+add_library(GENERIC_F413ZGTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F413ZGTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F413CHUX_hid
+# GENERIC_F413ZGTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413CHUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU")
-set(GENERIC_F413CHUX_hid_MAXSIZE 1572864)
-set(GENERIC_F413CHUX_hid_MAXDATASIZE 327680)
-set(GENERIC_F413CHUX_hid_MCU cortex-m4)
-set(GENERIC_F413CHUX_hid_FPCONF "-")
-add_library(GENERIC_F413CHUX_hid INTERFACE)
-target_compile_options(GENERIC_F413CHUX_hid INTERFACE
+set(GENERIC_F413ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
+set(GENERIC_F413ZGTX_hid_MAXSIZE 1048576)
+set(GENERIC_F413ZGTX_hid_MAXDATASIZE 327680)
+set(GENERIC_F413ZGTX_hid_MCU cortex-m4)
+set(GENERIC_F413ZGTX_hid_FPCONF "-")
+add_library(GENERIC_F413ZGTX_hid INTERFACE)
+target_compile_options(GENERIC_F413ZGTX_hid INTERFACE
   "SHELL:-DSTM32F413xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413CHUX_hid_MCU}
+  -mcpu=${GENERIC_F413ZGTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F413CHUX_hid INTERFACE
+target_compile_definitions(GENERIC_F413ZGTX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413CHUX"
-	"BOARD_NAME=\"GENERIC_F413CHUX\""
-	"BOARD_ID=GENERIC_F413CHUX"
+	"ARDUINO_GENERIC_F413ZGTX"
+	"BOARD_NAME=\"GENERIC_F413ZGTX\""
+	"BOARD_ID=GENERIC_F413ZGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413CHUX_hid INTERFACE
+target_include_directories(GENERIC_F413ZGTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413CHUX_hid_VARIANT_PATH}
+  ${GENERIC_F413ZGTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413CHUX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F413CHUX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413ZGTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F413ZGTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=1572864"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413CHUX_hid_MCU}
+  -mcpu=${GENERIC_F413ZGTX_hid_MCU}
 )
 
 
-# GENERIC_F413RGTX
+# GENERIC_F413ZHJX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT")
-set(GENERIC_F413RGTX_MAXSIZE 1048576)
-set(GENERIC_F413RGTX_MAXDATASIZE 327680)
-set(GENERIC_F413RGTX_MCU cortex-m4)
-set(GENERIC_F413RGTX_FPCONF "-")
-add_library(GENERIC_F413RGTX INTERFACE)
-target_compile_options(GENERIC_F413RGTX INTERFACE
+set(GENERIC_F413ZHJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
+set(GENERIC_F413ZHJX_MAXSIZE 1572864)
+set(GENERIC_F413ZHJX_MAXDATASIZE 327680)
+set(GENERIC_F413ZHJX_MCU cortex-m4)
+set(GENERIC_F413ZHJX_FPCONF "-")
+add_library(GENERIC_F413ZHJX INTERFACE)
+target_compile_options(GENERIC_F413ZHJX INTERFACE
   "SHELL:-DSTM32F413xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413RGTX_MCU}
+  -mcpu=${GENERIC_F413ZHJX_MCU}
 )
-target_compile_definitions(GENERIC_F413RGTX INTERFACE
+target_compile_definitions(GENERIC_F413ZHJX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413RGTX"
-	"BOARD_NAME=\"GENERIC_F413RGTX\""
-	"BOARD_ID=GENERIC_F413RGTX"
+	"ARDUINO_GENERIC_F413ZHJX"
+	"BOARD_NAME=\"GENERIC_F413ZHJX\""
+	"BOARD_ID=GENERIC_F413ZHJX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413RGTX INTERFACE
+target_include_directories(GENERIC_F413ZHJX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413RGTX_VARIANT_PATH}
+  ${GENERIC_F413ZHJX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413RGTX INTERFACE
-  "LINKER:--default-script=${GENERIC_F413RGTX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413ZHJX INTERFACE
+  "LINKER:--default-script=${GENERIC_F413ZHJX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_SIZE=1572864"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413RGTX_MCU}
+  -mcpu=${GENERIC_F413ZHJX_MCU}
 )
 
-add_library(GENERIC_F413RGTX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F413RGTX_serial_disabled INTERFACE
+add_library(GENERIC_F413ZHJX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F413ZHJX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413RGTX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F413RGTX_serial_generic INTERFACE
+add_library(GENERIC_F413ZHJX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F413ZHJX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F413RGTX_serial_none INTERFACE)
-target_compile_options(GENERIC_F413RGTX_serial_none INTERFACE
+add_library(GENERIC_F413ZHJX_serial_none INTERFACE)
+target_compile_options(GENERIC_F413ZHJX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F413RGTX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F413RGTX_usb_CDC INTERFACE
+add_library(GENERIC_F413ZHJX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F413ZHJX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F413RGTX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F413RGTX_usb_CDCgen INTERFACE
+add_library(GENERIC_F413ZHJX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F413ZHJX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F413RGTX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F413RGTX_usb_HID INTERFACE
+add_library(GENERIC_F413ZHJX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F413ZHJX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F413RGTX_usb_none INTERFACE)
-target_compile_options(GENERIC_F413RGTX_usb_none INTERFACE
+add_library(GENERIC_F413ZHJX_usb_none INTERFACE)
+target_compile_options(GENERIC_F413ZHJX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413RGTX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F413RGTX_xusb_FS INTERFACE
+add_library(GENERIC_F413ZHJX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F413ZHJX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413RGTX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F413RGTX_xusb_HS INTERFACE
+add_library(GENERIC_F413ZHJX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F413ZHJX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F413RGTX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F413RGTX_xusb_HSFS INTERFACE
+add_library(GENERIC_F413ZHJX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F413ZHJX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F413RGTX_hid
+# GENERIC_F413ZHJX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413RGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT")
-set(GENERIC_F413RGTX_hid_MAXSIZE 1048576)
-set(GENERIC_F413RGTX_hid_MAXDATASIZE 327680)
-set(GENERIC_F413RGTX_hid_MCU cortex-m4)
-set(GENERIC_F413RGTX_hid_FPCONF "-")
-add_library(GENERIC_F413RGTX_hid INTERFACE)
-target_compile_options(GENERIC_F413RGTX_hid INTERFACE
+set(GENERIC_F413ZHJX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
+set(GENERIC_F413ZHJX_hid_MAXSIZE 1572864)
+set(GENERIC_F413ZHJX_hid_MAXDATASIZE 327680)
+set(GENERIC_F413ZHJX_hid_MCU cortex-m4)
+set(GENERIC_F413ZHJX_hid_FPCONF "-")
+add_library(GENERIC_F413ZHJX_hid INTERFACE)
+target_compile_options(GENERIC_F413ZHJX_hid INTERFACE
   "SHELL:-DSTM32F413xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413RGTX_hid_MCU}
+  -mcpu=${GENERIC_F413ZHJX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F413RGTX_hid INTERFACE
+target_compile_definitions(GENERIC_F413ZHJX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413RGTX"
-	"BOARD_NAME=\"GENERIC_F413RGTX\""
-	"BOARD_ID=GENERIC_F413RGTX"
+	"ARDUINO_GENERIC_F413ZHJX"
+	"BOARD_NAME=\"GENERIC_F413ZHJX\""
+	"BOARD_ID=GENERIC_F413ZHJX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413RGTX_hid INTERFACE
+target_include_directories(GENERIC_F413ZHJX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413RGTX_hid_VARIANT_PATH}
+  ${GENERIC_F413ZHJX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413RGTX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F413RGTX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413ZHJX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F413ZHJX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_SIZE=1572864"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413RGTX_hid_MCU}
+  -mcpu=${GENERIC_F413ZHJX_hid_MCU}
 )
 
 
-# GENERIC_F413RHTX
+# GENERIC_F413ZHTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413RHTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT")
-set(GENERIC_F413RHTX_MAXSIZE 1572864)
-set(GENERIC_F413RHTX_MAXDATASIZE 327680)
-set(GENERIC_F413RHTX_MCU cortex-m4)
-set(GENERIC_F413RHTX_FPCONF "-")
-add_library(GENERIC_F413RHTX INTERFACE)
-target_compile_options(GENERIC_F413RHTX INTERFACE
+set(GENERIC_F413ZHTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
+set(GENERIC_F413ZHTX_MAXSIZE 1572864)
+set(GENERIC_F413ZHTX_MAXDATASIZE 327680)
+set(GENERIC_F413ZHTX_MCU cortex-m4)
+set(GENERIC_F413ZHTX_FPCONF "-")
+add_library(GENERIC_F413ZHTX INTERFACE)
+target_compile_options(GENERIC_F413ZHTX INTERFACE
   "SHELL:-DSTM32F413xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413RHTX_MCU}
+  -mcpu=${GENERIC_F413ZHTX_MCU}
 )
-target_compile_definitions(GENERIC_F413RHTX INTERFACE
+target_compile_definitions(GENERIC_F413ZHTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413RHTX"
-	"BOARD_NAME=\"GENERIC_F413RHTX\""
-	"BOARD_ID=GENERIC_F413RHTX"
+	"ARDUINO_GENERIC_F413ZHTX"
+	"BOARD_NAME=\"GENERIC_F413ZHTX\""
+	"BOARD_ID=GENERIC_F413ZHTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413RHTX INTERFACE
+target_include_directories(GENERIC_F413ZHTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413RHTX_VARIANT_PATH}
+  ${GENERIC_F413ZHTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413RHTX INTERFACE
-  "LINKER:--default-script=${GENERIC_F413RHTX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413ZHTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F413ZHTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=1572864"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413RHTX_MCU}
+  -mcpu=${GENERIC_F413ZHTX_MCU}
 )
 
-add_library(GENERIC_F413RHTX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F413RHTX_serial_disabled INTERFACE
+add_library(GENERIC_F413ZHTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F413ZHTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413RHTX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F413RHTX_serial_generic INTERFACE
+add_library(GENERIC_F413ZHTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F413ZHTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F413RHTX_serial_none INTERFACE)
-target_compile_options(GENERIC_F413RHTX_serial_none INTERFACE
+add_library(GENERIC_F413ZHTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F413ZHTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F413RHTX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F413RHTX_usb_CDC INTERFACE
+add_library(GENERIC_F413ZHTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F413ZHTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F413RHTX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F413RHTX_usb_CDCgen INTERFACE
+add_library(GENERIC_F413ZHTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F413ZHTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F413RHTX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F413RHTX_usb_HID INTERFACE
+add_library(GENERIC_F413ZHTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F413ZHTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F413RHTX_usb_none INTERFACE)
-target_compile_options(GENERIC_F413RHTX_usb_none INTERFACE
+add_library(GENERIC_F413ZHTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F413ZHTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413RHTX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F413RHTX_xusb_FS INTERFACE
+add_library(GENERIC_F413ZHTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F413ZHTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413RHTX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F413RHTX_xusb_HS INTERFACE
+add_library(GENERIC_F413ZHTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F413ZHTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F413RHTX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F413RHTX_xusb_HSFS INTERFACE
+add_library(GENERIC_F413ZHTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F413ZHTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F413RHTX_hid
+# GENERIC_F413ZHTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413RHTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT")
-set(GENERIC_F413RHTX_hid_MAXSIZE 1572864)
-set(GENERIC_F413RHTX_hid_MAXDATASIZE 327680)
-set(GENERIC_F413RHTX_hid_MCU cortex-m4)
-set(GENERIC_F413RHTX_hid_FPCONF "-")
-add_library(GENERIC_F413RHTX_hid INTERFACE)
-target_compile_options(GENERIC_F413RHTX_hid INTERFACE
+set(GENERIC_F413ZHTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
+set(GENERIC_F413ZHTX_hid_MAXSIZE 1572864)
+set(GENERIC_F413ZHTX_hid_MAXDATASIZE 327680)
+set(GENERIC_F413ZHTX_hid_MCU cortex-m4)
+set(GENERIC_F413ZHTX_hid_FPCONF "-")
+add_library(GENERIC_F413ZHTX_hid INTERFACE)
+target_compile_options(GENERIC_F413ZHTX_hid INTERFACE
   "SHELL:-DSTM32F413xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413RHTX_hid_MCU}
+  -mcpu=${GENERIC_F413ZHTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F413RHTX_hid INTERFACE
+target_compile_definitions(GENERIC_F413ZHTX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413RHTX"
-	"BOARD_NAME=\"GENERIC_F413RHTX\""
-	"BOARD_ID=GENERIC_F413RHTX"
+	"ARDUINO_GENERIC_F413ZHTX"
+	"BOARD_NAME=\"GENERIC_F413ZHTX\""
+	"BOARD_ID=GENERIC_F413ZHTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413RHTX_hid INTERFACE
+target_include_directories(GENERIC_F413ZHTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413RHTX_hid_VARIANT_PATH}
+  ${GENERIC_F413ZHTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413RHTX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F413RHTX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F413ZHTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F413ZHTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=1572864"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413RHTX_hid_MCU}
+  -mcpu=${GENERIC_F413ZHTX_hid_MCU}
 )
 
 
-# GENERIC_F413ZGJX
+# GENERIC_F415RGTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413ZGJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
-set(GENERIC_F413ZGJX_MAXSIZE 1048576)
-set(GENERIC_F413ZGJX_MAXDATASIZE 327680)
-set(GENERIC_F413ZGJX_MCU cortex-m4)
-set(GENERIC_F413ZGJX_FPCONF "-")
-add_library(GENERIC_F413ZGJX INTERFACE)
-target_compile_options(GENERIC_F413ZGJX INTERFACE
-  "SHELL:-DSTM32F413xx   "
+set(GENERIC_F415RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F405RGT_F415RGT")
+set(GENERIC_F415RGTX_MAXSIZE 1048576)
+set(GENERIC_F415RGTX_MAXDATASIZE 131072)
+set(GENERIC_F415RGTX_MCU cortex-m4)
+set(GENERIC_F415RGTX_FPCONF "-")
+add_library(GENERIC_F415RGTX INTERFACE)
+target_compile_options(GENERIC_F415RGTX INTERFACE
+  "SHELL:-DSTM32F415xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZGJX_MCU}
+  -mcpu=${GENERIC_F415RGTX_MCU}
 )
-target_compile_definitions(GENERIC_F413ZGJX INTERFACE
+target_compile_definitions(GENERIC_F415RGTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413ZGJX"
-	"BOARD_NAME=\"GENERIC_F413ZGJX\""
-	"BOARD_ID=GENERIC_F413ZGJX"
+	"ARDUINO_GENERIC_F415RGTX"
+	"BOARD_NAME=\"GENERIC_F415RGTX\""
+	"BOARD_ID=GENERIC_F415RGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413ZGJX INTERFACE
+target_include_directories(GENERIC_F415RGTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413ZGJX_VARIANT_PATH}
+  ${GENERIC_F415RGTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413ZGJX INTERFACE
-  "LINKER:--default-script=${GENERIC_F413ZGJX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F415RGTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F415RGTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZGJX_MCU}
+  -mcpu=${GENERIC_F415RGTX_MCU}
 )
 
-add_library(GENERIC_F413ZGJX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F413ZGJX_serial_disabled INTERFACE
+add_library(GENERIC_F415RGTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F415RGTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413ZGJX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F413ZGJX_serial_generic INTERFACE
+add_library(GENERIC_F415RGTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F415RGTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F413ZGJX_serial_none INTERFACE)
-target_compile_options(GENERIC_F413ZGJX_serial_none INTERFACE
+add_library(GENERIC_F415RGTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F415RGTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F413ZGJX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F413ZGJX_usb_CDC INTERFACE
+add_library(GENERIC_F415RGTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F415RGTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F413ZGJX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F413ZGJX_usb_CDCgen INTERFACE
+add_library(GENERIC_F415RGTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F415RGTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F413ZGJX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F413ZGJX_usb_HID INTERFACE
+add_library(GENERIC_F415RGTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F415RGTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F413ZGJX_usb_none INTERFACE)
-target_compile_options(GENERIC_F413ZGJX_usb_none INTERFACE
+add_library(GENERIC_F415RGTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F415RGTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413ZGJX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F413ZGJX_xusb_FS INTERFACE
+add_library(GENERIC_F415RGTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F415RGTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413ZGJX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F413ZGJX_xusb_HS INTERFACE
+add_library(GENERIC_F415RGTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F415RGTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F413ZGJX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F413ZGJX_xusb_HSFS INTERFACE
+add_library(GENERIC_F415RGTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F415RGTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F413ZGJX_hid
+# GENERIC_F415RGTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413ZGJX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
-set(GENERIC_F413ZGJX_hid_MAXSIZE 1048576)
-set(GENERIC_F413ZGJX_hid_MAXDATASIZE 327680)
-set(GENERIC_F413ZGJX_hid_MCU cortex-m4)
-set(GENERIC_F413ZGJX_hid_FPCONF "-")
-add_library(GENERIC_F413ZGJX_hid INTERFACE)
-target_compile_options(GENERIC_F413ZGJX_hid INTERFACE
-  "SHELL:-DSTM32F413xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F415RGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F405RGT_F415RGT")
+set(GENERIC_F415RGTX_hid_MAXSIZE 1048576)
+set(GENERIC_F415RGTX_hid_MAXDATASIZE 131072)
+set(GENERIC_F415RGTX_hid_MCU cortex-m4)
+set(GENERIC_F415RGTX_hid_FPCONF "-")
+add_library(GENERIC_F415RGTX_hid INTERFACE)
+target_compile_options(GENERIC_F415RGTX_hid INTERFACE
+  "SHELL:-DSTM32F415xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZGJX_hid_MCU}
+  -mcpu=${GENERIC_F415RGTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F413ZGJX_hid INTERFACE
+target_compile_definitions(GENERIC_F415RGTX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413ZGJX"
-	"BOARD_NAME=\"GENERIC_F413ZGJX\""
-	"BOARD_ID=GENERIC_F413ZGJX"
+	"ARDUINO_GENERIC_F415RGTX"
+	"BOARD_NAME=\"GENERIC_F415RGTX\""
+	"BOARD_ID=GENERIC_F415RGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413ZGJX_hid INTERFACE
+target_include_directories(GENERIC_F415RGTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413ZGJX_hid_VARIANT_PATH}
+  ${GENERIC_F415RGTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413ZGJX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F413ZGJX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F415RGTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F415RGTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZGJX_hid_MCU}
+  -mcpu=${GENERIC_F415RGTX_hid_MCU}
 )
 
 
-# GENERIC_F413ZGTX
+# GENERIC_F417IEHX
 # -----------------------------------------------------------------------------
-
-set(GENERIC_F413ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
-set(GENERIC_F413ZGTX_MAXSIZE 1048576)
-set(GENERIC_F413ZGTX_MAXDATASIZE 327680)
-set(GENERIC_F413ZGTX_MCU cortex-m4)
-set(GENERIC_F413ZGTX_FPCONF "-")
-add_library(GENERIC_F413ZGTX INTERFACE)
-target_compile_options(GENERIC_F413ZGTX INTERFACE
-  "SHELL:-DSTM32F413xx   "
+
+set(GENERIC_F417IEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F417IEHX_MAXSIZE 524288)
+set(GENERIC_F417IEHX_MAXDATASIZE 131072)
+set(GENERIC_F417IEHX_MCU cortex-m4)
+set(GENERIC_F417IEHX_FPCONF "-")
+add_library(GENERIC_F417IEHX INTERFACE)
+target_compile_options(GENERIC_F417IEHX INTERFACE
+  "SHELL:-DSTM32F417xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZGTX_MCU}
+  -mcpu=${GENERIC_F417IEHX_MCU}
 )
-target_compile_definitions(GENERIC_F413ZGTX INTERFACE
+target_compile_definitions(GENERIC_F417IEHX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413ZGTX"
-	"BOARD_NAME=\"GENERIC_F413ZGTX\""
-	"BOARD_ID=GENERIC_F413ZGTX"
+	"ARDUINO_GENERIC_F417IEHX"
+	"BOARD_NAME=\"GENERIC_F417IEHX\""
+	"BOARD_ID=GENERIC_F417IEHX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413ZGTX INTERFACE
+target_include_directories(GENERIC_F417IEHX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413ZGTX_VARIANT_PATH}
+  ${GENERIC_F417IEHX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413ZGTX INTERFACE
-  "LINKER:--default-script=${GENERIC_F413ZGTX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F417IEHX INTERFACE
+  "LINKER:--default-script=${GENERIC_F417IEHX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=1048576"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZGTX_MCU}
+  -mcpu=${GENERIC_F417IEHX_MCU}
 )
 
-add_library(GENERIC_F413ZGTX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F413ZGTX_serial_disabled INTERFACE
+add_library(GENERIC_F417IEHX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F417IEHX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413ZGTX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F413ZGTX_serial_generic INTERFACE
+add_library(GENERIC_F417IEHX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F417IEHX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F413ZGTX_serial_none INTERFACE)
-target_compile_options(GENERIC_F413ZGTX_serial_none INTERFACE
+add_library(GENERIC_F417IEHX_serial_none INTERFACE)
+target_compile_options(GENERIC_F417IEHX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F413ZGTX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F413ZGTX_usb_CDC INTERFACE
+add_library(GENERIC_F417IEHX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F417IEHX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F413ZGTX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F413ZGTX_usb_CDCgen INTERFACE
+add_library(GENERIC_F417IEHX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F417IEHX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F413ZGTX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F413ZGTX_usb_HID INTERFACE
+add_library(GENERIC_F417IEHX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F417IEHX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F413ZGTX_usb_none INTERFACE)
-target_compile_options(GENERIC_F413ZGTX_usb_none INTERFACE
+add_library(GENERIC_F417IEHX_usb_none INTERFACE)
+target_compile_options(GENERIC_F417IEHX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413ZGTX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F413ZGTX_xusb_FS INTERFACE
+add_library(GENERIC_F417IEHX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F417IEHX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413ZGTX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F413ZGTX_xusb_HS INTERFACE
+add_library(GENERIC_F417IEHX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F417IEHX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F413ZGTX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F413ZGTX_xusb_HSFS INTERFACE
+add_library(GENERIC_F417IEHX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F417IEHX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F413ZGTX_hid
+# GENERIC_F417IEHX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
-set(GENERIC_F413ZGTX_hid_MAXSIZE 1048576)
-set(GENERIC_F413ZGTX_hid_MAXDATASIZE 327680)
-set(GENERIC_F413ZGTX_hid_MCU cortex-m4)
-set(GENERIC_F413ZGTX_hid_FPCONF "-")
-add_library(GENERIC_F413ZGTX_hid INTERFACE)
-target_compile_options(GENERIC_F413ZGTX_hid INTERFACE
-  "SHELL:-DSTM32F413xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F417IEHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F417IEHX_hid_MAXSIZE 524288)
+set(GENERIC_F417IEHX_hid_MAXDATASIZE 131072)
+set(GENERIC_F417IEHX_hid_MCU cortex-m4)
+set(GENERIC_F417IEHX_hid_FPCONF "-")
+add_library(GENERIC_F417IEHX_hid INTERFACE)
+target_compile_options(GENERIC_F417IEHX_hid INTERFACE
+  "SHELL:-DSTM32F417xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZGTX_hid_MCU}
+  -mcpu=${GENERIC_F417IEHX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F413ZGTX_hid INTERFACE
+target_compile_definitions(GENERIC_F417IEHX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413ZGTX"
-	"BOARD_NAME=\"GENERIC_F413ZGTX\""
-	"BOARD_ID=GENERIC_F413ZGTX"
+	"ARDUINO_GENERIC_F417IEHX"
+	"BOARD_NAME=\"GENERIC_F417IEHX\""
+	"BOARD_ID=GENERIC_F417IEHX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413ZGTX_hid INTERFACE
+target_include_directories(GENERIC_F417IEHX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413ZGTX_hid_VARIANT_PATH}
+  ${GENERIC_F417IEHX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413ZGTX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F413ZGTX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F417IEHX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F417IEHX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=1048576"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZGTX_hid_MCU}
+  -mcpu=${GENERIC_F417IEHX_hid_MCU}
 )
 
 
-# GENERIC_F413ZHJX
+# GENERIC_F417IETX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413ZHJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
-set(GENERIC_F413ZHJX_MAXSIZE 1572864)
-set(GENERIC_F413ZHJX_MAXDATASIZE 327680)
-set(GENERIC_F413ZHJX_MCU cortex-m4)
-set(GENERIC_F413ZHJX_FPCONF "-")
-add_library(GENERIC_F413ZHJX INTERFACE)
-target_compile_options(GENERIC_F413ZHJX INTERFACE
-  "SHELL:-DSTM32F413xx   "
+set(GENERIC_F417IETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F417IETX_MAXSIZE 524288)
+set(GENERIC_F417IETX_MAXDATASIZE 131072)
+set(GENERIC_F417IETX_MCU cortex-m4)
+set(GENERIC_F417IETX_FPCONF "-")
+add_library(GENERIC_F417IETX INTERFACE)
+target_compile_options(GENERIC_F417IETX INTERFACE
+  "SHELL:-DSTM32F417xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZHJX_MCU}
+  -mcpu=${GENERIC_F417IETX_MCU}
 )
-target_compile_definitions(GENERIC_F413ZHJX INTERFACE
+target_compile_definitions(GENERIC_F417IETX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413ZHJX"
-	"BOARD_NAME=\"GENERIC_F413ZHJX\""
-	"BOARD_ID=GENERIC_F413ZHJX"
+	"ARDUINO_GENERIC_F417IETX"
+	"BOARD_NAME=\"GENERIC_F417IETX\""
+	"BOARD_ID=GENERIC_F417IETX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413ZHJX INTERFACE
+target_include_directories(GENERIC_F417IETX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413ZHJX_VARIANT_PATH}
+  ${GENERIC_F417IETX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413ZHJX INTERFACE
-  "LINKER:--default-script=${GENERIC_F413ZHJX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F417IETX INTERFACE
+  "LINKER:--default-script=${GENERIC_F417IETX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=1572864"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZHJX_MCU}
+  -mcpu=${GENERIC_F417IETX_MCU}
 )
 
-add_library(GENERIC_F413ZHJX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F413ZHJX_serial_disabled INTERFACE
+add_library(GENERIC_F417IETX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F417IETX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413ZHJX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F413ZHJX_serial_generic INTERFACE
+add_library(GENERIC_F417IETX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F417IETX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F413ZHJX_serial_none INTERFACE)
-target_compile_options(GENERIC_F413ZHJX_serial_none INTERFACE
+add_library(GENERIC_F417IETX_serial_none INTERFACE)
+target_compile_options(GENERIC_F417IETX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F413ZHJX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F413ZHJX_usb_CDC INTERFACE
+add_library(GENERIC_F417IETX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F417IETX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F413ZHJX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F413ZHJX_usb_CDCgen INTERFACE
+add_library(GENERIC_F417IETX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F417IETX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F413ZHJX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F413ZHJX_usb_HID INTERFACE
+add_library(GENERIC_F417IETX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F417IETX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F413ZHJX_usb_none INTERFACE)
-target_compile_options(GENERIC_F413ZHJX_usb_none INTERFACE
+add_library(GENERIC_F417IETX_usb_none INTERFACE)
+target_compile_options(GENERIC_F417IETX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413ZHJX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F413ZHJX_xusb_FS INTERFACE
+add_library(GENERIC_F417IETX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F417IETX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413ZHJX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F413ZHJX_xusb_HS INTERFACE
+add_library(GENERIC_F417IETX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F417IETX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F413ZHJX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F413ZHJX_xusb_HSFS INTERFACE
+add_library(GENERIC_F417IETX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F417IETX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F413ZHJX_hid
+# GENERIC_F417IETX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413ZHJX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
-set(GENERIC_F413ZHJX_hid_MAXSIZE 1572864)
-set(GENERIC_F413ZHJX_hid_MAXDATASIZE 327680)
-set(GENERIC_F413ZHJX_hid_MCU cortex-m4)
-set(GENERIC_F413ZHJX_hid_FPCONF "-")
-add_library(GENERIC_F413ZHJX_hid INTERFACE)
-target_compile_options(GENERIC_F413ZHJX_hid INTERFACE
-  "SHELL:-DSTM32F413xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F417IETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F417IETX_hid_MAXSIZE 524288)
+set(GENERIC_F417IETX_hid_MAXDATASIZE 131072)
+set(GENERIC_F417IETX_hid_MCU cortex-m4)
+set(GENERIC_F417IETX_hid_FPCONF "-")
+add_library(GENERIC_F417IETX_hid INTERFACE)
+target_compile_options(GENERIC_F417IETX_hid INTERFACE
+  "SHELL:-DSTM32F417xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZHJX_hid_MCU}
+  -mcpu=${GENERIC_F417IETX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F413ZHJX_hid INTERFACE
+target_compile_definitions(GENERIC_F417IETX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413ZHJX"
-	"BOARD_NAME=\"GENERIC_F413ZHJX\""
-	"BOARD_ID=GENERIC_F413ZHJX"
+	"ARDUINO_GENERIC_F417IETX"
+	"BOARD_NAME=\"GENERIC_F417IETX\""
+	"BOARD_ID=GENERIC_F417IETX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413ZHJX_hid INTERFACE
+target_include_directories(GENERIC_F417IETX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413ZHJX_hid_VARIANT_PATH}
+  ${GENERIC_F417IETX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413ZHJX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F413ZHJX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F417IETX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F417IETX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=1572864"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZHJX_hid_MCU}
+  -mcpu=${GENERIC_F417IETX_hid_MCU}
 )
 
 
-# GENERIC_F413ZHTX
+# GENERIC_F417IGHX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413ZHTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
-set(GENERIC_F413ZHTX_MAXSIZE 1572864)
-set(GENERIC_F413ZHTX_MAXDATASIZE 327680)
-set(GENERIC_F413ZHTX_MCU cortex-m4)
-set(GENERIC_F413ZHTX_FPCONF "-")
-add_library(GENERIC_F413ZHTX INTERFACE)
-target_compile_options(GENERIC_F413ZHTX INTERFACE
-  "SHELL:-DSTM32F413xx   "
+set(GENERIC_F417IGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F417IGHX_MAXSIZE 1048576)
+set(GENERIC_F417IGHX_MAXDATASIZE 131072)
+set(GENERIC_F417IGHX_MCU cortex-m4)
+set(GENERIC_F417IGHX_FPCONF "-")
+add_library(GENERIC_F417IGHX INTERFACE)
+target_compile_options(GENERIC_F417IGHX INTERFACE
+  "SHELL:-DSTM32F417xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZHTX_MCU}
+  -mcpu=${GENERIC_F417IGHX_MCU}
 )
-target_compile_definitions(GENERIC_F413ZHTX INTERFACE
+target_compile_definitions(GENERIC_F417IGHX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413ZHTX"
-	"BOARD_NAME=\"GENERIC_F413ZHTX\""
-	"BOARD_ID=GENERIC_F413ZHTX"
+	"ARDUINO_GENERIC_F417IGHX"
+	"BOARD_NAME=\"GENERIC_F417IGHX\""
+	"BOARD_ID=GENERIC_F417IGHX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413ZHTX INTERFACE
+target_include_directories(GENERIC_F417IGHX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413ZHTX_VARIANT_PATH}
+  ${GENERIC_F417IGHX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413ZHTX INTERFACE
-  "LINKER:--default-script=${GENERIC_F413ZHTX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F417IGHX INTERFACE
+  "LINKER:--default-script=${GENERIC_F417IGHX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
-	"LINKER:--defsym=LD_MAX_SIZE=1572864"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZHTX_MCU}
+  -mcpu=${GENERIC_F417IGHX_MCU}
 )
 
-add_library(GENERIC_F413ZHTX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F413ZHTX_serial_disabled INTERFACE
+add_library(GENERIC_F417IGHX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F417IGHX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413ZHTX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F413ZHTX_serial_generic INTERFACE
+add_library(GENERIC_F417IGHX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F417IGHX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F413ZHTX_serial_none INTERFACE)
-target_compile_options(GENERIC_F413ZHTX_serial_none INTERFACE
+add_library(GENERIC_F417IGHX_serial_none INTERFACE)
+target_compile_options(GENERIC_F417IGHX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F413ZHTX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F413ZHTX_usb_CDC INTERFACE
+add_library(GENERIC_F417IGHX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F417IGHX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F413ZHTX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F413ZHTX_usb_CDCgen INTERFACE
+add_library(GENERIC_F417IGHX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F417IGHX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F413ZHTX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F413ZHTX_usb_HID INTERFACE
+add_library(GENERIC_F417IGHX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F417IGHX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F413ZHTX_usb_none INTERFACE)
-target_compile_options(GENERIC_F413ZHTX_usb_none INTERFACE
+add_library(GENERIC_F417IGHX_usb_none INTERFACE)
+target_compile_options(GENERIC_F417IGHX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413ZHTX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F413ZHTX_xusb_FS INTERFACE
+add_library(GENERIC_F417IGHX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F417IGHX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F413ZHTX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F413ZHTX_xusb_HS INTERFACE
+add_library(GENERIC_F417IGHX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F417IGHX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F413ZHTX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F413ZHTX_xusb_HSFS INTERFACE
+add_library(GENERIC_F417IGHX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F417IGHX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F413ZHTX_hid
+# GENERIC_F417IGHX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F413ZHTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)")
-set(GENERIC_F413ZHTX_hid_MAXSIZE 1572864)
-set(GENERIC_F413ZHTX_hid_MAXDATASIZE 327680)
-set(GENERIC_F413ZHTX_hid_MCU cortex-m4)
-set(GENERIC_F413ZHTX_hid_FPCONF "-")
-add_library(GENERIC_F413ZHTX_hid INTERFACE)
-target_compile_options(GENERIC_F413ZHTX_hid INTERFACE
-  "SHELL:-DSTM32F413xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F417IGHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F417IGHX_hid_MAXSIZE 1048576)
+set(GENERIC_F417IGHX_hid_MAXDATASIZE 131072)
+set(GENERIC_F417IGHX_hid_MCU cortex-m4)
+set(GENERIC_F417IGHX_hid_FPCONF "-")
+add_library(GENERIC_F417IGHX_hid INTERFACE)
+target_compile_options(GENERIC_F417IGHX_hid INTERFACE
+  "SHELL:-DSTM32F417xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZHTX_hid_MCU}
+  -mcpu=${GENERIC_F417IGHX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F413ZHTX_hid INTERFACE
+target_compile_definitions(GENERIC_F417IGHX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F413ZHTX"
-	"BOARD_NAME=\"GENERIC_F413ZHTX\""
-	"BOARD_ID=GENERIC_F413ZHTX"
+	"ARDUINO_GENERIC_F417IGHX"
+	"BOARD_NAME=\"GENERIC_F417IGHX\""
+	"BOARD_ID=GENERIC_F417IGHX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F413ZHTX_hid INTERFACE
+target_include_directories(GENERIC_F417IGHX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F413ZHTX_hid_VARIANT_PATH}
+  ${GENERIC_F417IGHX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F413ZHTX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F413ZHTX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F417IGHX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F417IGHX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
-	"LINKER:--defsym=LD_MAX_SIZE=1572864"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=327680"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F413ZHTX_hid_MCU}
+  -mcpu=${GENERIC_F417IGHX_hid_MCU}
 )
 
 
-# GENERIC_F415RGTX
+# GENERIC_F417IGTX
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F415RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F405RGT_F415RGT")
-set(GENERIC_F415RGTX_MAXSIZE 1048576)
-set(GENERIC_F415RGTX_MAXDATASIZE 131072)
-set(GENERIC_F415RGTX_MCU cortex-m4)
-set(GENERIC_F415RGTX_FPCONF "-")
-add_library(GENERIC_F415RGTX INTERFACE)
-target_compile_options(GENERIC_F415RGTX INTERFACE
-  "SHELL:-DSTM32F415xx   "
+set(GENERIC_F417IGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F417IGTX_MAXSIZE 1048576)
+set(GENERIC_F417IGTX_MAXDATASIZE 131072)
+set(GENERIC_F417IGTX_MCU cortex-m4)
+set(GENERIC_F417IGTX_FPCONF "-")
+add_library(GENERIC_F417IGTX INTERFACE)
+target_compile_options(GENERIC_F417IGTX INTERFACE
+  "SHELL:-DSTM32F417xx   "
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F415RGTX_MCU}
+  -mcpu=${GENERIC_F417IGTX_MCU}
 )
-target_compile_definitions(GENERIC_F415RGTX INTERFACE
+target_compile_definitions(GENERIC_F417IGTX INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F415RGTX"
-	"BOARD_NAME=\"GENERIC_F415RGTX\""
-	"BOARD_ID=GENERIC_F415RGTX"
+	"ARDUINO_GENERIC_F417IGTX"
+	"BOARD_NAME=\"GENERIC_F417IGTX\""
+	"BOARD_ID=GENERIC_F417IGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F415RGTX INTERFACE
+target_include_directories(GENERIC_F417IGTX INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F415RGTX_VARIANT_PATH}
+  ${GENERIC_F417IGTX_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F415RGTX INTERFACE
-  "LINKER:--default-script=${GENERIC_F415RGTX_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F417IGTX INTERFACE
+  "LINKER:--default-script=${GENERIC_F417IGTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F415RGTX_MCU}
+  -mcpu=${GENERIC_F417IGTX_MCU}
 )
 
-add_library(GENERIC_F415RGTX_serial_disabled INTERFACE)
-target_compile_options(GENERIC_F415RGTX_serial_disabled INTERFACE
+add_library(GENERIC_F417IGTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_F417IGTX_serial_disabled INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F415RGTX_serial_generic INTERFACE)
-target_compile_options(GENERIC_F415RGTX_serial_generic INTERFACE
+add_library(GENERIC_F417IGTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_F417IGTX_serial_generic INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED"
 )
-add_library(GENERIC_F415RGTX_serial_none INTERFACE)
-target_compile_options(GENERIC_F415RGTX_serial_none INTERFACE
+add_library(GENERIC_F417IGTX_serial_none INTERFACE)
+target_compile_options(GENERIC_F417IGTX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
-add_library(GENERIC_F415RGTX_usb_CDC INTERFACE)
-target_compile_options(GENERIC_F415RGTX_usb_CDC INTERFACE
+add_library(GENERIC_F417IGTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_F417IGTX_usb_CDC INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
 )
-add_library(GENERIC_F415RGTX_usb_CDCgen INTERFACE)
-target_compile_options(GENERIC_F415RGTX_usb_CDCgen INTERFACE
+add_library(GENERIC_F417IGTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_F417IGTX_usb_CDCgen INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
 )
-add_library(GENERIC_F415RGTX_usb_HID INTERFACE)
-target_compile_options(GENERIC_F415RGTX_usb_HID INTERFACE
+add_library(GENERIC_F417IGTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_F417IGTX_usb_HID INTERFACE
   "SHELL:-DUSBCON  -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
 )
-add_library(GENERIC_F415RGTX_usb_none INTERFACE)
-target_compile_options(GENERIC_F415RGTX_usb_none INTERFACE
+add_library(GENERIC_F417IGTX_usb_none INTERFACE)
+target_compile_options(GENERIC_F417IGTX_usb_none INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F415RGTX_xusb_FS INTERFACE)
-target_compile_options(GENERIC_F415RGTX_xusb_FS INTERFACE
+add_library(GENERIC_F417IGTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_F417IGTX_xusb_FS INTERFACE
   "SHELL:"
 )
-add_library(GENERIC_F415RGTX_xusb_HS INTERFACE)
-target_compile_options(GENERIC_F415RGTX_xusb_HS INTERFACE
+add_library(GENERIC_F417IGTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_F417IGTX_xusb_HS INTERFACE
   "SHELL:-DUSE_USB_HS"
 )
-add_library(GENERIC_F415RGTX_xusb_HSFS INTERFACE)
-target_compile_options(GENERIC_F415RGTX_xusb_HSFS INTERFACE
+add_library(GENERIC_F417IGTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_F417IGTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
-# GENERIC_F415RGTX_hid
+# GENERIC_F417IGTX_hid
 # -----------------------------------------------------------------------------
 
-set(GENERIC_F415RGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F405RGT_F415RGT")
-set(GENERIC_F415RGTX_hid_MAXSIZE 1048576)
-set(GENERIC_F415RGTX_hid_MAXDATASIZE 131072)
-set(GENERIC_F415RGTX_hid_MCU cortex-m4)
-set(GENERIC_F415RGTX_hid_FPCONF "-")
-add_library(GENERIC_F415RGTX_hid INTERFACE)
-target_compile_options(GENERIC_F415RGTX_hid INTERFACE
-  "SHELL:-DSTM32F415xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
+set(GENERIC_F417IGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)")
+set(GENERIC_F417IGTX_hid_MAXSIZE 1048576)
+set(GENERIC_F417IGTX_hid_MAXDATASIZE 131072)
+set(GENERIC_F417IGTX_hid_MCU cortex-m4)
+set(GENERIC_F417IGTX_hid_FPCONF "-")
+add_library(GENERIC_F417IGTX_hid INTERFACE)
+target_compile_options(GENERIC_F417IGTX_hid INTERFACE
+  "SHELL:-DSTM32F417xx  -DHAL_UART_MODULE_ENABLED -DBL_HID"
   "SHELL:"
   "SHELL:"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F415RGTX_hid_MCU}
+  -mcpu=${GENERIC_F417IGTX_hid_MCU}
 )
-target_compile_definitions(GENERIC_F415RGTX_hid INTERFACE
+target_compile_definitions(GENERIC_F417IGTX_hid INTERFACE
   "STM32F4xx"
-	"ARDUINO_GENERIC_F415RGTX"
-	"BOARD_NAME=\"GENERIC_F415RGTX\""
-	"BOARD_ID=GENERIC_F415RGTX"
+	"ARDUINO_GENERIC_F417IGTX"
+	"BOARD_NAME=\"GENERIC_F417IGTX\""
+	"BOARD_ID=GENERIC_F417IGTX"
 	"VARIANT_H=\"variant_generic.h\""
 )
-target_include_directories(GENERIC_F415RGTX_hid INTERFACE
+target_include_directories(GENERIC_F417IGTX_hid INTERFACE
   ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
   ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
-  ${GENERIC_F415RGTX_hid_VARIANT_PATH}
+  ${GENERIC_F417IGTX_hid_VARIANT_PATH}
 )
 
-target_link_options(GENERIC_F415RGTX_hid INTERFACE
-  "LINKER:--default-script=${GENERIC_F415RGTX_hid_VARIANT_PATH}/ldscript.ld"
+target_link_options(GENERIC_F417IGTX_hid INTERFACE
+  "LINKER:--default-script=${GENERIC_F417IGTX_hid_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
 	"LINKER:--defsym=LD_MAX_SIZE=1048576"
 	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
-  -mcpu=${GENERIC_F415RGTX_hid_MCU}
+  -mcpu=${GENERIC_F417IGTX_hid_MCU}
 )
 
 
diff --git a/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/generic_clock.c b/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/generic_clock.c
index c678774282..9d459b81e0 100644
--- a/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/generic_clock.c
+++ b/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/generic_clock.c
@@ -23,8 +23,42 @@
   */
 WEAK void SystemClock_Config(void)
 {
-  /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+  RCC_OscInitTypeDef RCC_OscInitStruct = {};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 168;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 7;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
+    Error_Handler();
+  }
 }
 
 #endif /* ARDUINO_GENERIC_* */
diff --git a/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/ldscript.ld b/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/ldscript.ld
new file mode 100644
index 0000000000..fadb21be91
--- /dev/null
+++ b/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/ldscript.ld
@@ -0,0 +1,208 @@
+/*
+******************************************************************************
+**
+** @file        : LinkerScript.ld
+**
+** @author      : Auto-generated by STM32CubeIDE
+**
+** @brief       : Linker script for STM32F407IGHx Device from STM32F4 series
+**                      1024KBytes FLASH
+**                      64KBytes CCMRAM
+**                      128KBytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+******************************************************************************
+** @attention
+**
+** Copyright (c) 2025 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  CCMRAM    (xrw)    : ORIGIN = 0x10000000,   LENGTH = 64K
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = LD_MAX_DATA_SIZE
+  FLASH    (rx)    : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+
+  } >RAM AT> FLASH
+
+  _siccmram = LOADADDR(.ccmram);
+
+  /* CCM-RAM section
+  *
+  * IMPORTANT NOTE!
+  * If initialized variables will be placed in this section,
+  * the startup code needs to be modified to copy the init-values.
+  */
+  .ccmram :
+  {
+    . = ALIGN(4);
+    _sccmram = .;       /* create a global symbol at ccmram start */
+    *(.ccmram)
+    *(.ccmram*)
+
+    . = ALIGN(4);
+    _eccmram = .;       /* create a global symbol at ccmram end */
+  } >CCMRAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}