Add RoCC interface to Vanadis

src/sst/elements/vanadis/Makefile.am

@@ -86,6 +86,7 @@ inst/vpartialload.h \
 inst/vpartialstore.h \
 inst/vpcaddi.h \
 inst/vregfmt.h \
+inst/vrocc.h \
 inst/vscmp.h \
 inst/vscmpi.h \
 inst/vsetreg.h \
@@ -252,7 +253,9 @@ os/syscall/write.h \
 os/syscall/writev.h \
 \
 os/resp/voscallresp.h \
-os/resp/vosexitresp.h
+os/resp/vosexitresp.h \
+rocc/vroccinterface.h \
+rocc/vbasicrocc.h
 
 
 EXTRA_DIST = \
@@ -562,10 +565,18 @@ EXTRA_DIST = \
 	tests/small/misc/hpcg/hpcg.dat \
 	tests/small/misc/hpcg/mipsel/hpcg \
 	tests/small/misc/hpcg/riscv64/hpcg \
+\
+	tests/small/rocc/basic-rocc/Makefile \
+	tests/small/rocc/basic-rocc/basic-rocc.c \
+	tests/small/rocc/basic-rocc/riscv64/basic-rocc \
+	tests/small/rocc/basic-rocc/riscv64/2rocc/sst.stdout.gold \
+	tests/small/rocc/basic-rocc/riscv64/2rocc/vanadis.stdout.gold \
+	tests/small/rocc/basic-rocc/riscv64/2rocc/vanadis.stderr.gold \
 \
 	tests/basic_vanadis.py \
 	tests/no_rtr_vanadis.py \
 	tests/testsuite_default_vanadis.py \
+	tests/rocc_vanadis.py \
 \
 	tests/riscv-tests/patch.txt \
 	tests/riscv-tests/README \

src/sst/elements/vanadis/decoder/vriscv64decoder.h

@@ -456,6 +456,20 @@ class VanadisRISCV64Decoder : public VanadisDecoder
                 } break;
                 }
             } break;
+            case 0xb:
+            {
+                // custom encoding space for RoCC0 instructions
+                // space derived from custom-0 in table 19.1 of RISC-V Manual
+                processR(ins, op_code, rd, rs1, rs2, func_code3, func_code7);
+                output->verbose(
+                        CALL_INFO, 16, 0, "----> RoCC w/ accelerator id: %" PRIu8 ", rd: %" PRIu16 ", rs1: %" PRIu16
+                        ", rs2: %" PRIu16 ", and func7: %" PRIu32 "\n", 
+                        0, rd, rs1, rs2, func_code7);
+                bundle->addInstruction(new VanadisRoCCInstruction(
+                    ins_address, hw_thr, options, rs1, rs2, rd, func_code3 & 0x1, func_code3 & 0x2, 
+                    func_code3 & 0x4, func_code7, 0));
+                decode_fault = false;
+            } break;
             case 0x23:
             {
                 // Store data
@@ -477,6 +491,20 @@ class VanadisRISCV64Decoder : public VanadisDecoder
                     decode_fault = false;
                 }
             } break;
+            case 0x2b:
+            {
+                // custom encoding space for RoCC1 instructions
+                // space derived from custom-1 in table 19.1 of RISC-V Manual
+                processR(ins, op_code, rd, rs1, rs2, func_code3, func_code7);
+                output->verbose(
+                        CALL_INFO, 16, 0, "----> RoCC w/ accelerator id: %" PRIu8 ", rd: %" PRIu16 ", rs1: %" PRIu16
+                        ", rs2: %" PRIu16 ", and func7: %" PRIu32 "\n", 
+                        1, rd, rs1, rs2, func_code7);
+                bundle->addInstruction(new VanadisRoCCInstruction(
+                    ins_address, hw_thr, options, rs1, rs2, rd, func_code3 & 0x1, func_code3 & 0x2, 
+                    func_code3 & 0x4, func_code7, 1));
+                decode_fault = false;
+            } break;
             case 0x13:
             {
                 // Immediate arithmetic
@@ -1141,6 +1169,20 @@ class VanadisRISCV64Decoder : public VanadisDecoder
                     }
                 }
             } break; // end of  0x73:
+            case 0x7b:
+            {
+                // custom encoding space for RoCC3 instructions
+                // space derived from custom-3 in table 19.1 of RISC-V Manual
+                processR(ins, op_code, rd, rs1, rs2, func_code3, func_code7);
+                output->verbose(
+                        CALL_INFO, 16, 0, "----> RoCC w/ accelerator id: %" PRIu8 ", rd: %" PRIu16 ", rs1: %" PRIu16
+                        ", rs2: %" PRIu16 ", and func7: %" PRIu32 "\n", 
+                        3, rd, rs1, rs2, func_code7);
+                bundle->addInstruction(new VanadisRoCCInstruction(
+                    ins_address, hw_thr, options, rs1, rs2, rd, func_code3 & 0x1, func_code3 & 0x2, 
+                    func_code3 & 0x4, func_code7, 3));
+                decode_fault = false;
+            } break;
             case 0x3B:
             {
                 // 64b integer arithmetic-W
@@ -2132,6 +2174,20 @@ class VanadisRISCV64Decoder : public VanadisDecoder
                 } break;
                 }
             } break;
+            case 0x5b:
+            {
+                // custom encoding space for RoCC2 instructions
+                // space derived from custom-2 in table 19.1 of RISC-V Manual
+                processR(ins, op_code, rd, rs1, rs2, func_code3, func_code7);
+                output->verbose(
+                        CALL_INFO, 16, 0, "----> RoCC w/ accelerator id: %" PRIu8 ", rd: %" PRIu16 ", rs1: %" PRIu16
+                        ", rs2: %" PRIu16 ", and func7: %" PRIu32 "\n", 
+                        2, rd, rs1, rs2, func_code7);
+                bundle->addInstruction(new VanadisRoCCInstruction(
+                    ins_address, hw_thr, options, rs1, rs2, rd, func_code3 & 0x1, func_code3 & 0x2, 
+                    func_code3 & 0x4, func_code7, 2));
+                decode_fault = false;
+            } break;
             case 0x43:
             {
                 uint32_t fmt;

src/sst/elements/vanadis/inst/vinstall.h

@@ -123,5 +123,7 @@
 #include "inst/vfpclass.h"
 #include "inst/vmin.h"
 
+// RoCC Custom
+#include "inst/vrocc.h"
 
 #endif

src/sst/elements/vanadis/inst/vinsttype.h

@@ -31,7 +31,11 @@ enum VanadisFunctionalUnitType {
     INST_SYSCALL,
     INST_FENCE,
     INST_NOOP,
-    INST_FAULT
+    INST_FAULT,
+    INST_ROCC0,
+    INST_ROCC1,
+    INST_ROCC2,
+    INST_ROCC3
 };
 
 inline const char*

src/sst/elements/vanadis/inst/vrocc.h

@@ -0,0 +1,104 @@
+// Copyright 2009-2025 NTESS. Under the terms
+// of Contract DE-NA0003525 with NTESS, the U.S.
+// Government retains certain rights in this software.
+//
+// Copyright (c) 2009-2025, NTESS
+// All rights reserved.
+//
+// Portions are copyright of other developers:
+// See the file CONTRIBUTORS.TXT in the top level directory
+// of the distribution for more information.
+//
+// This file is part of the SST software package. For license
+// information, see the LICENSE file in the top level directory of the
+// distribution.
+
+#ifndef _H_VANADIS_ROCC_INST
+#define _H_VANADIS_ROCC_INST
+
+#include "inst/vinst.h"
+#include "inst/vrocc.h"
+
+#include "rocc/vroccinterface.h"
+
+#include <cstdio>
+
+namespace SST {
+namespace Vanadis {
+
+class VanadisRoCCInstruction : public VanadisInstruction
+{
+
+public:
+    VanadisRoCCInstruction(
+        const uint64_t addr, const uint32_t hw_thr, const VanadisDecoderOptions* isa_opts, 
+        const uint16_t rs1, const int16_t rs2, const uint16_t rd, const bool xd, const bool xs1, 
+        const bool xs2, uint32_t func_code7, uint8_t accelerator_id) :
+        VanadisInstruction(addr, hw_thr, isa_opts, 2, 1, 2, 1, 0, 0, 0, 0)
+    {
+
+        isa_int_regs_in[0] = rs1;
+        isa_int_regs_in[1] = rs2;
+        isa_int_regs_out[0] = rd;
+
+        this->func7 = func_code7;
+        this->rd = rd;
+        this->xs1 = xs1;
+        this->xs2 = xs2;
+        this->xd = xd;
+
+        switch (accelerator_id) {
+            case 0:
+                this->funcType = INST_ROCC0;
+                this->instCode = "RoCC0";
+                break;
+
+            case 1:
+                this->funcType = INST_ROCC1;
+                this->instCode = "RoCC1";
+                break;
+
+            case 2:
+                this->funcType = INST_ROCC2;
+                this->instCode = "RoCC2";
+                break;
+
+            case 3:
+                this->funcType = INST_ROCC3;
+                this->instCode = "RoCC3";
+                break;
+
+            default:
+                break;
+        }
+
+    }
+
+    VanadisRoCCInstruction* clone() { return new VanadisRoCCInstruction(*this); }
+
+    virtual VanadisFunctionalUnitType getInstFuncType() const { return funcType; }
+
+    virtual const char* getInstCode() const { return instCode; }
+
+    virtual void printToBuffer(char* buffer, size_t buffer_size)
+    {
+        snprintf(buffer, buffer_size, instCode);
+    }
+
+    virtual void execute(SST::Output* output, VanadisRegisterFile* regFile) {
+        markExecuted(); 
+    }
+
+    char* instCode;
+    VanadisFunctionalUnitType funcType;
+    uint8_t func7;
+    uint8_t rd;
+    bool xs1;
+    bool xs2;
+    bool xd;
+};
+
+} // namespace Vanadis
+} // namespace SST
+
+#endif