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Copy path原版反编译.dts
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原版反编译.dts
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/dts-v1/;
/memreserve/ 0x0000000004600000 0x0000000000015000;
/memreserve/ 0x0000000004bf0000 0x00000000001e6bbc;
/ {
compatible = "rockchip,android", "rockchip,rk3399-excavator-edp", "rockchip,rk3399";
interrupt-parent = <0x1>;
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Rockchip RK3399 Excavator Board edp (Android)";
memory {
reg = <0x0 0x200000 0x0 0x8200000 0x0 0xa200000 0x0 0xede00000>;
device_type = "memory";
};
ddr_timing {
compatible = "rockchip,ddr-timing";
ddr3_speed_bin = <0x15>;
pd_idle = <0x0>;
sr_idle = <0x0>;
sr_mc_gate_idle = <0x0>;
srpd_lite_idle = <0x0>;
standby_idle = <0x0>;
auto_lp_dis_freq = <0x29a>;
ddr3_dll_dis_freq = <0x12c>;
phy_dll_dis_freq = <0x104>;
ddr3_odt_dis_freq = <0x29a>;
ddr3_drv = <0x28>;
ddr3_odt = <0x78>;
phy_ddr3_ca_drv = <0x28>;
phy_ddr3_dq_drv = <0x28>;
phy_ddr3_odt = <0xf0>;
lpddr3_odt_dis_freq = <0x29a>;
lpddr3_drv = <0x22>;
lpddr3_odt = <0xf0>;
phy_lpddr3_ca_drv = <0x22>;
phy_lpddr3_dq_drv = <0x22>;
phy_lpddr3_odt = <0xf0>;
lpddr4_odt_dis_freq = <0x320>;
lpddr4_drv = <0xf0>;
lpddr4_dq_odt = <0x28>;
lpddr4_ca_odt = <0x0>;
phy_lpddr4_ca_drv = <0x28>;
phy_lpddr4_ck_cs_drv = <0x28>;
phy_lpddr4_dq_drv = <0x3c>;
phy_lpddr4_odt = <0x28>;
phandle = <0x97>;
};
aliases {
i2c0 = "/i2c@ff3c0000";
i2c1 = "/i2c@ff110000";
i2c2 = "/i2c@ff120000";
i2c3 = "/i2c@ff130000";
i2c4 = "/i2c@ff3d0000";
i2c5 = "/i2c@ff140000";
i2c6 = "/i2c@ff150000";
i2c7 = "/i2c@ff160000";
i2c8 = "/i2c@ff3e0000";
serial0 = "/serial@ff180000";
serial1 = "/serial@ff190000";
serial2 = "/serial@ff1a0000";
serial3 = "/serial@ff1b0000";
serial4 = "/serial@ff370000";
dsi0 = "/dsi@ff960000";
dsi1 = "/dsi@ff968000";
};
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
cpu-map {
cluster0 {
core0 {
cpu = <0x2>;
};
core1 {
cpu = <0x3>;
};
core2 {
cpu = <0x4>;
};
core3 {
cpu = <0x5>;
};
};
cluster1 {
core0 {
cpu = <0x6>;
};
core1 {
cpu = <0x7>;
};
};
};
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
#cooling-cells = <0x2>;
clocks = <0x8 0x8>;
cpu-idle-states = <0x9 0xa>;
dynamic-power-coefficient = <0x64>;
operating-points-v2 = <0xb>;
sched-energy-costs = <0xc 0xd>;
cpu-supply = <0xe>;
phandle = <0x2>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
clocks = <0x8 0x8>;
cpu-idle-states = <0x9 0xa>;
dynamic-power-coefficient = <0x64>;
operating-points-v2 = <0xb>;
sched-energy-costs = <0xc 0xd>;
cpu-supply = <0xe>;
phandle = <0x3>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
clocks = <0x8 0x8>;
cpu-idle-states = <0x9 0xa>;
dynamic-power-coefficient = <0x64>;
operating-points-v2 = <0xb>;
sched-energy-costs = <0xc 0xd>;
cpu-supply = <0xe>;
phandle = <0x4>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
clocks = <0x8 0x8>;
cpu-idle-states = <0x9 0xa>;
dynamic-power-coefficient = <0x64>;
operating-points-v2 = <0xb>;
sched-energy-costs = <0xc 0xd>;
cpu-supply = <0xe>;
phandle = <0x5>;
};
cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x0 0x100>;
enable-method = "psci";
#cooling-cells = <0x2>;
clocks = <0x8 0x9>;
cpu-idle-states = <0x9 0xa>;
dynamic-power-coefficient = <0x1b4>;
operating-points-v2 = <0xf>;
sched-energy-costs = <0x10 0x11>;
cpu-supply = <0x12>;
phandle = <0x6>;
};
cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x0 0x101>;
enable-method = "psci";
clocks = <0x8 0x9>;
cpu-idle-states = <0x9 0xa>;
dynamic-power-coefficient = <0x1b4>;
operating-points-v2 = <0xf>;
sched-energy-costs = <0x10 0x11>;
cpu-supply = <0x12>;
phandle = <0x7>;
};
idle-states {
entry-method = "psci";
cpu-sleep {
compatible = "arm,idle-state";
local-timer-stop;
arm,psci-suspend-param = <0x10000>;
entry-latency-us = <0x78>;
exit-latency-us = <0xfa>;
min-residency-us = <0x384>;
phandle = <0x9>;
};
cluster-sleep {
compatible = "arm,idle-state";
local-timer-stop;
arm,psci-suspend-param = <0x1010000>;
entry-latency-us = <0x190>;
exit-latency-us = <0x1f4>;
min-residency-us = <0x7d0>;
phandle = <0xa>;
};
};
};
pmu_a53 {
compatible = "arm,cortex-a53-pmu";
interrupts = <0x1 0x7 0x8 0x13>;
};
pmu_a72 {
compatible = "arm,cortex-a72-pmu";
interrupts = <0x1 0x7 0x8 0x14>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <0x1 0xd 0x8 0x0 0x1 0xe 0x8 0x0 0x1 0xb 0x8 0x0 0x1 0xa 0x8 0x0>;
};
xin24m {
compatible = "fixed-clock";
clock-frequency = <0x16e3600>;
clock-output-names = "xin24m";
#clock-cells = <0x0>;
};
dummy_cpll {
compatible = "fixed-clock";
clock-frequency = <0x0>;
clock-output-names = "dummy_cpll";
#clock-cells = <0x0>;
};
dummy_vpll {
compatible = "fixed-clock";
clock-frequency = <0x0>;
clock-output-names = "dummy_vpll";
#clock-cells = <0x0>;
};
amba {
compatible = "arm,amba-bus";
#address-cells = <0x2>;
#size-cells = <0x2>;
ranges;
dma-controller@ff6d0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0xff6d0000 0x0 0x4000>;
interrupts = <0x0 0x5 0x4 0x0 0x0 0x6 0x4 0x0>;
#dma-cells = <0x1>;
clocks = <0x8 0xd3>;
clock-names = "apb_pclk";
peripherals-req-type-burst;
phandle = <0x61>;
};
dma-controller@ff6e0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0xff6e0000 0x0 0x4000>;
interrupts = <0x0 0x7 0x4 0x0 0x0 0x8 0x4 0x0>;
#dma-cells = <0x1>;
clocks = <0x8 0xd4>;
clock-names = "apb_pclk";
peripherals-req-type-burst;
phandle = <0x50>;
};
};
ethernet@fe300000 {
compatible = "rockchip,rk3399-gmac";
reg = <0x0 0xfe300000 0x0 0x10000>;
rockchip,grf = <0x15>;
interrupts = <0x0 0xc 0x4 0x0>;
interrupt-names = "macirq";
clocks = <0x8 0x69 0x8 0x67 0x8 0x68 0x8 0x66 0x8 0x6a 0x8 0xd5 0x8 0x166>;
clock-names = "stmmaceth", "mac_clk_rx", "mac_clk_tx", "clk_mac_ref", "clk_mac_refout", "aclk_mac", "pclk_mac";
resets = <0x8 0x89>;
reset-names = "stmmaceth";
power-domains = <0x16 0x16>;
status = "okay";
phy-supply = <0x17>;
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <0x18 0xf 0x1>;
snps,reset-active-low;
snps,reset-delays-us = <0x0 0x2710 0xc350>;
assigned-clocks = <0x8 0xa6>;
assigned-clock-parents = <0x19>;
pinctrl-names = "default";
pinctrl-0 = <0x1a>;
tx_delay = <0x28>;
rx_delay = <0x11>;
};
dwmmc@fe310000 {
compatible = "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe310000 0x0 0x4000>;
interrupts = <0x0 0x40 0x4 0x0>;
clock-freq-min-max = <0x30d40 0x2faf080>;
clocks = <0x8 0x1ee 0x8 0x4d 0x8 0x9c 0x8 0x9d>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
power-domains = <0x16 0x1c>;
status = "okay";
clock-frequency = <0x2faf080>;
supports-sdio;
bus-width = <0x4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <0x1b>;
non-removable;
num-slots = <0x1>;
pinctrl-names = "default";
pinctrl-0 = <0x1c 0x1d 0x1e>;
sd-uhs-sdr104;
};
dwmmc@fe320000 {
compatible = "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe320000 0x0 0x4000>;
interrupts = <0x0 0x41 0x4 0x0>;
clock-freq-min-max = <0x186a0 0x8f0d180>;
clocks = <0x8 0x1ce 0x8 0x4c 0x8 0x9a 0x8 0x9b>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
power-domains = <0x16 0x1b>;
status = "okay";
clock-frequency = <0x8f0d180>;
supports-sd;
bus-width = <0x4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
num-slots = <0x1>;
vmmc-supply = <0x1f>;
vqmmc-supply = <0x20>;
pinctrl-names = "default";
pinctrl-0 = <0x21 0x22 0x23 0x24>;
};
sdhci@fe330000 {
compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
reg = <0x0 0xfe330000 0x0 0x10000>;
interrupts = <0x0 0xb 0x4 0x0>;
arasan,soc-ctl-syscon = <0x15>;
assigned-clocks = <0x8 0x4e>;
assigned-clock-rates = <0xbebc200>;
clocks = <0x8 0x4e 0x8 0xf0>;
clock-names = "clk_xin", "clk_ahb";
clock-output-names = "emmc_cardclock";
#clock-cells = <0x0>;
phys = <0x25>;
phy-names = "phy_arasan";
power-domains = <0x16 0x17>;
status = "okay";
bus-width = <0x8>;
mmc-hs400-1_8v;
supports-emmc;
non-removable;
keep-power-in-suspend;
mmc-hs400-enhanced-strobe;
assigned-clock-parents = <0x8 0x5>;
phandle = <0x9f>;
};
usb@fe340000 {
compatible = "generic-ehci";
reg = <0x0 0xfe340000 0x0 0x30000>;
interrupts = <0x0 0x21 0x4 0x0>;
clocks = <0x8 0x1cc 0x8 0x79 0x8 0x154>;
clock-names = "hclk_hsic", "clk_hsicphy", "pclk_hsicphy";
rockchip-has-usic;
status = "disabled";
};
usb@fe380000 {
compatible = "generic-ehci";
reg = <0x0 0xfe380000 0x0 0x20000>;
interrupts = <0x0 0x1a 0x4 0x0>;
clocks = <0x8 0x1c8 0x8 0x1c9 0x8 0xa8>;
clock-names = "hclk_host0", "hclk_host0_arb", "usbphy0_480m";
phys = <0x26>;
phy-names = "usb";
power-domains = <0x16 0xe>;
status = "okay";
};
usb@fe3a0000 {
compatible = "generic-ohci";
reg = <0x0 0xfe3a0000 0x0 0x20000>;
interrupts = <0x0 0x1c 0x4 0x0>;
clocks = <0x8 0x1c8 0x8 0x1c9 0x8 0xa8>;
clock-names = "hclk_host0", "hclk_host0_arb", "usbphy0_480m";
phys = <0x26>;
phy-names = "usb";
power-domains = <0x16 0xe>;
status = "okay";
};
usb@fe3c0000 {
compatible = "generic-ehci";
reg = <0x0 0xfe3c0000 0x0 0x20000>;
interrupts = <0x0 0x1e 0x4 0x0>;
clocks = <0x8 0x1ca 0x8 0x1cb 0x8 0xa9>;
clock-names = "hclk_host1", "hclk_host1_arb", "usbphy1_480m";
phys = <0x27>;
phy-names = "usb";
power-domains = <0x16 0xe>;
status = "okay";
};
usb@fe3e0000 {
compatible = "generic-ohci";
reg = <0x0 0xfe3e0000 0x0 0x20000>;
interrupts = <0x0 0x20 0x4 0x0>;
clocks = <0x8 0x1ca 0x8 0x1cb 0x8 0xa9>;
clock-names = "hclk_host1", "hclk_host1_arb", "usbphy1_480m";
phys = <0x27>;
phy-names = "usb";
power-domains = <0x16 0xe>;
status = "okay";
};
usb@fe800000 {
compatible = "rockchip,rk3399-dwc3";
clocks = <0x8 0x81 0x8 0x83 0x8 0xf6 0x8 0xf9>;
clock-names = "ref_clk", "suspend_clk", "bus_clk", "grf_clk";
power-domains = <0x16 0x18>;
resets = <0x8 0x125>;
reset-names = "usb3-otg";
#address-cells = <0x2>;
#size-cells = <0x2>;
ranges;
needs-reset-on-resume;
status = "okay";
extcon = <0x28>;
dwc3@fe800000 {
compatible = "snps,dwc3";
reg = <0x0 0xfe800000 0x0 0x100000>;
interrupts = <0x0 0x69 0x4 0x0>;
dr_mode = "otg";
phys = <0x29 0x2a>;
phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide";
snps,dis_enblslpm_quirk;
snps,dis-u2-freeclk-exists-quirk;
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,tx-ipgap-linecheck-dis-quirk;
snps,xhci-slow-suspend-quirk;
snps,xhci-trb-ent-quirk;
snps,usb3-warm-reset-on-resume-quirk;
status = "okay";
};
};
usb@fe900000 {
compatible = "rockchip,rk3399-dwc3";
clocks = <0x8 0x82 0x8 0x84 0x8 0xf7 0x8 0xf9>;
clock-names = "ref_clk", "suspend_clk", "bus_clk", "grf_clk";
power-domains = <0x16 0x18>;
vbus-5v-gpios = <0x2b 0x8 0x0>;
resets = <0x8 0x126>;
reset-names = "usb3-otg";
#address-cells = <0x2>;
#size-cells = <0x2>;
ranges;
needs-reset-on-resume;
status = "okay";
dwc3@fe900000 {
compatible = "snps,dwc3";
reg = <0x0 0xfe900000 0x0 0x100000>;
interrupts = <0x0 0x6e 0x4 0x0>;
dr_mode = "host";
phys = <0x2c 0x2d>;
phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide";
snps,dis_enblslpm_quirk;
snps,dis-u2-freeclk-exists-quirk;
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,tx-ipgap-linecheck-dis-quirk;
snps,xhci-slow-suspend-quirk;
snps,xhci-trb-ent-quirk;
snps,usb3-warm-reset-on-resume-quirk;
status = "okay";
};
};
dp@fec00000 {
compatible = "rockchip,rk3399-cdn-dp";
reg = <0x0 0xfec00000 0x0 0x100000>;
interrupts = <0x0 0x9 0x4 0x0>;
clocks = <0x8 0x72 0x8 0x175 0x8 0xa1 0x8 0x16f>;
clock-names = "core-clk", "pclk", "spdif", "grf";
assigned-clocks = <0x8 0x72>;
assigned-clock-rates = <0x5f5e100>;
power-domains = <0x16 0x15>;
phys = <0x2e>;
resets = <0x8 0x103 0x8 0x148 0x8 0x14a 0x8 0xfd>;
reset-names = "spdif", "dptx", "apb", "core";
rockchip,grf = <0x15>;
#address-cells = <0x1>;
#size-cells = <0x0>;
#sound-dai-cells = <0x1>;
status = "okay";
extcon = <0x2f>;
phandle = <0xd6>;
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
port {
#address-cells = <0x1>;
#size-cells = <0x0>;
endpoint@0 {
reg = <0x0>;
remote-endpoint = <0x30>;
status = "okay";
phandle = <0xb2>;
};
endpoint@1 {
reg = <0x1>;
remote-endpoint = <0x31>;
status = "disabled";
phandle = <0xab>;
};
};
port@1 {
reg = <0x1>;
endpoint {
remote-endpoint = <0x32>;
phandle = <0xf0>;
};
};
};
};
interrupt-controller@fee00000 {
compatible = "arm,gic-v3";
#interrupt-cells = <0x4>;
#address-cells = <0x2>;
#size-cells = <0x2>;
ranges;
interrupt-controller;
reg = <0x0 0xfee00000 0x0 0x10000 0x0 0xfef00000 0x0 0xc0000 0x0 0xfff00000 0x0 0x10000 0x0 0xfff10000 0x0 0x10000 0x0 0xfff20000 0x0 0x10000>;
interrupts = <0x1 0x9 0x4 0x0>;
phandle = <0x1>;
interrupt-controller@fee20000 {
compatible = "arm,gic-v3-its";
msi-controller;
reg = <0x0 0xfee20000 0x0 0x20000>;
phandle = <0x8d>;
};
ppi-partitions {
interrupt-partition-0 {
affinity = <0x2 0x3 0x4 0x5>;
phandle = <0x13>;
};
interrupt-partition-1 {
affinity = <0x6 0x7>;
phandle = <0x14>;
};
};
};
saradc@ff100000 {
compatible = "rockchip,rk3399-saradc";
reg = <0x0 0xff100000 0x0 0x100>;
interrupts = <0x0 0x3e 0x4 0x0>;
#io-channel-cells = <0x1>;
clocks = <0x8 0x50 0x8 0x165>;
clock-names = "saradc", "apb_pclk";
resets = <0x8 0xd4>;
reset-names = "saradc-apb";
status = "okay";
phandle = <0xe8>;
};
i2c@ff3c0000 {
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff3c0000 0x0 0x1000>;
clocks = <0x33 0x9 0x33 0x1b>;
clock-names = "i2c", "pclk";
interrupts = <0x0 0x39 0x4 0x0>;
pinctrl-names = "default";
pinctrl-0 = <0x34>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "okay";
i2c-scl-rising-time-ns = <0xa8>;
i2c-scl-falling-time-ns = <0x4>;
clock-frequency = <0x61a80>;
rtc@51 {
compatible = "rtc,hym8563";
reg = <0x51>;
};
syr827@40 {
compatible = "silergy,syr827";
reg = <0x40>;
vin-supply = <0x35>;
regulator-compatible = "fan53555-reg";
pinctrl-names = "default";
pinctrl-0 = <0x36>;
vsel-gpios = <0x37 0x11 0x0>;
regulator-name = "vdd_cpu_b";
regulator-min-microvolt = <0xadf34>;
regulator-max-microvolt = <0x16e360>;
regulator-ramp-delay = <0x3e8>;
fcs,suspend-voltage-selector = <0x1>;
regulator-always-on;
regulator-boot-on;
regulator-initial-state = <0x3>;
phandle = <0x12>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
syr828@41 {
compatible = "silergy,syr828";
reg = <0x41>;
vin-supply = <0x35>;
regulator-compatible = "fan53555-reg";
pinctrl-names = "default";
pinctrl-0 = <0x38>;
vsel-gpios = <0x37 0xe 0x0>;
regulator-name = "vdd_gpu";
regulator-min-microvolt = <0xadf34>;
regulator-max-microvolt = <0x16e360>;
regulator-ramp-delay = <0x3e8>;
fcs,suspend-voltage-selector = <0x1>;
regulator-always-on;
regulator-boot-on;
regulator-initial-state = <0x3>;
phandle = <0xa6>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
pmic@1b {
compatible = "rockchip,rk808";
reg = <0x1b>;
interrupt-parent = <0x37>;
interrupts = <0xa 0x8>;
pinctrl-names = "default";
pinctrl-0 = <0x39 0x3a>;
rockchip,system-power-controller;
wakeup-source;
#clock-cells = <0x1>;
clock-output-names = "xin32k", "rk808-clkout2";
vcc1-supply = <0x3b>;
vcc2-supply = <0x3b>;
vcc3-supply = <0x3b>;
vcc4-supply = <0x3b>;
vcc6-supply = <0x3b>;
vcc7-supply = <0x3b>;
vcc8-supply = <0x3b>;
vcc9-supply = <0x3b>;
vcc10-supply = <0x3b>;
vcc11-supply = <0x3b>;
vcc12-supply = <0x3b>;
vddio-supply = <0x3c>;
phandle = <0xd9>;
regulators {
DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0xb71b0>;
regulator-max-microvolt = <0x149970>;
regulator-ramp-delay = <0x1771>;
regulator-name = "vdd_center";
phandle = <0x99>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0xb71b0>;
regulator-max-microvolt = <0x149970>;
regulator-ramp-delay = <0x1771>;
regulator-name = "vdd_cpu_l";
phandle = <0xe>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_ddr";
regulator-state-mem {
regulator-on-in-suspend;
};
};
DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x1b7740>;
regulator-max-microvolt = <0x1b7740>;
regulator-name = "vcc_1v8";
phandle = <0x84>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <0x1b7740>;
};
};
LDO_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x1b7740>;
regulator-max-microvolt = <0x1b7740>;
regulator-name = "vcc1v8_dvp";
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x2dc6c0>;
regulator-max-microvolt = <0x2dc6c0>;
regulator-name = "vcc3v0_tp";
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x1b7740>;
regulator-max-microvolt = <0x1b7740>;
regulator-name = "vcc1v8_pmu";
phandle = <0x3c>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <0x1b7740>;
};
};
LDO_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x1b7740>;
regulator-max-microvolt = <0x325aa0>;
regulator-name = "vcc_sd";
phandle = <0x20>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <0x325aa0>;
};
};
LDO_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x2dc6c0>;
regulator-max-microvolt = <0x2dc6c0>;
regulator-name = "vcca3v0_codec";
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x16e360>;
regulator-max-microvolt = <0x16e360>;
regulator-name = "vcc_1v5";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <0x16e360>;
};
};
LDO_REG7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x1b7740>;
regulator-max-microvolt = <0x1b7740>;
regulator-name = "vcca1v8_codec";
phandle = <0x9e>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x2dc6c0>;
regulator-max-microvolt = <0x2dc6c0>;
regulator-name = "vcc_3v0";
phandle = <0x9d>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <0x2dc6c0>;
};
};
SWITCH_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc3v3_s3";
regulator-state-mem {
regulator-off-in-suspend;
};
};
SWITCH_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc3v3_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
i2c@ff110000 {
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff110000 0x0 0x1000>;
clocks = <0x8 0x41 0x8 0x155>;
clock-names = "i2c", "pclk";
interrupts = <0x0 0x3b 0x4 0x0>;
pinctrl-names = "default";
pinctrl-0 = <0x3d>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "okay";
i2c-scl-rising-time-ns = <0xa4>;
i2c-scl-falling-time-ns = <0xf>;
clock-frequency = <0x61a80>;
es8388@11 {
#sound-dai-cells = <0x0>;
compatible = "everest,es8388";
reg = <0x11>;
clocks = <0x8 0x59>;
clock-names = "mclk";
pinctrl-names = "default";
pinctrl-0 = <0x3e>;
spk-con-gpio = <0x2b 0xb 0x0>;
hp-det-gpio = <0x3f 0x1c 0x0>;
status = "okay";
phandle = <0xe2>;
};
rt5651@1a {
#sound-dai-cells = <0x0>;
compatible = "rockchip,rt5651";
reg = <0x1a>;
clocks = <0x8 0x59>;
clock-names = "mclk";
pinctrl-names = "default";
pinctrl-0 = <0x3e>;
spk-con-gpio = <0x2b 0xb 0x0>;
hp-det-gpio = <0x3f 0x1c 0x1>;
status = "disabled";
phandle = <0xe1>;
};
gsl3673@40 {
compatible = "GSL,GSL3673";
reg = <0x40>;
screen_max_x = <0x600>;
screen_max_y = <0x800>;
irq_gpio_number = <0x37 0x14 0x8>;
rst_gpio_number = <0x3f 0x16 0x0>;
};
tc358749x@0f {
compatible = "toshiba,tc358749x";
reg = <0xf>;
power-gpios = <0x40 0x6 0x0>;
power18-gpios = <0x40 0x9 0x0>;
power33-gpios = <0x40 0x5 0x0>;
csi-ctl-gpios = <0x40 0xa 0x0>;
stanby-gpios = <0x40 0x8 0x0>;
reset-gpios = <0x40 0x7 0x0>;
int-gpios = <0x40 0xc 0x0>;
pinctrl-names = "default";
pinctrl-0 = <0x41>;
status = "okay";
phandle = <0xf1>;
};
};
i2c@ff120000 {
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff120000 0x0 0x1000>;
clocks = <0x8 0x42 0x8 0x156>;
clock-names = "i2c", "pclk";
interrupts = <0x0 0x23 0x4 0x0>;
pinctrl-names = "default";
pinctrl-0 = <0x42>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c@ff130000 {
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff130000 0x0 0x1000>;
clocks = <0x8 0x43 0x8 0x157>;
clock-names = "i2c", "pclk";
interrupts = <0x0 0x22 0x4 0x0>;
pinctrl-names = "default";
pinctrl-0 = <0x43>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c@ff140000 {
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff140000 0x0 0x1000>;
clocks = <0x8 0x44 0x8 0x158>;
clock-names = "i2c", "pclk";
interrupts = <0x0 0x26 0x4 0x0>;
pinctrl-names = "default";
pinctrl-0 = <0x44>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c@ff150000 {
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff150000 0x0 0x1000>;
clocks = <0x8 0x45 0x8 0x159>;
clock-names = "i2c", "pclk";
interrupts = <0x0 0x25 0x4 0x0>;
pinctrl-names = "default";
pinctrl-0 = <0x45>;
#address-cells = <0x1>;