From 90b406aae49f00357277f09bb25c9b7cf0d57f6d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sun, 4 Jun 2023 21:27:13 +0200 Subject: [PATCH 01/14] add output to gitignore --- .gitignore | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitignore b/.gitignore index f6537508..33b07514 100644 --- a/.gitignore +++ b/.gitignore @@ -3,4 +3,4 @@ *.rs.bk *.svd target -ci/svd2rust-regress/Cargo.lock +output From 4ea35e5bdf7acc9eaada7483d5bd6cd7d151c561 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sun, 4 Jun 2023 21:27:26 +0200 Subject: [PATCH 02/14] Improve svd2rust-regress --- .github/workflows/ci.yml | 26 + Cargo.toml | 5 + ci/svd2rust-regress/Cargo.toml | 9 +- ci/svd2rust-regress/src/errors.rs | 9 - ci/svd2rust-regress/src/github.rs | 169 ++ ci/svd2rust-regress/src/main.rs | 416 +-- ci/svd2rust-regress/src/svd_test.rs | 378 +-- ci/svd2rust-regress/src/tests.rs | 4168 +-------------------------- ci/svd2rust-regress/tests.json | 4098 ++++++++++++++++++++++++++ 9 files changed, 4766 insertions(+), 4512 deletions(-) delete mode 100644 ci/svd2rust-regress/src/errors.rs create mode 100644 ci/svd2rust-regress/src/github.rs create mode 100644 ci/svd2rust-regress/tests.json diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index ca0b9cf1..281705c2 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -171,3 +171,29 @@ jobs: uses: Swatinem/rust-cache@v2 - run: cargo fmt --all -- --check + + artifact: + name: Build svd2rust artifact + if: github.event_name == 'pull_request' + needs: [check] + runs-on: ubuntu-latest + steps: + - uses: actions/checkout@v3 + + - uses: dtolnay/rust-toolchain@master + with: + toolchain: stable + + - name: Cache Dependencies + uses: Swatinem/rust-cache@v2 + + - name: Build svd2rust artifact + run: cargo build --release + + - run: mv target/release/svd2rust svd2rust-x86_64-unknown-linux-gnu-$(git rev-parse --short HEAD) + + - name: Upload artifact + uses: actions/upload-artifact@v3 + with: + name: artifact-svd2rust-x86_64-unknown-linux-gnu + path: svd2rust-x86_64-unknown-linux-gnu* diff --git a/Cargo.toml b/Cargo.toml index d861cdc2..de83adaf 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -69,3 +69,8 @@ version = "0.14.6" [dependencies.syn] version = "2.0" features = ["full","extra-traits"] + +[workspace] +members = ["ci/svd2rust-regress"] +default-members = ["."] +exclude = ["output"] \ No newline at end of file diff --git a/ci/svd2rust-regress/Cargo.toml b/ci/svd2rust-regress/Cargo.toml index 641368f9..3d36943c 100644 --- a/ci/svd2rust-regress/Cargo.toml +++ b/ci/svd2rust-regress/Cargo.toml @@ -5,8 +5,13 @@ version = "0.1.0" authors = ["James Munns ", "The svd2rust developers"] [dependencies] -clap = { version = "4.1", features = ["color", "derive"] } +clap = { version = "4.1", features = ["color", "derive", "string"] } svd2rust = { path = "../../" } reqwest = { version = "0.11", features= ["blocking"] } rayon = "1.4" -error-chain = "0.12" +anyhow = "1" +thiserror = "1" +serde = "1" +serde_json = "1" +prettyplease = "0.2" +syn = "2" diff --git a/ci/svd2rust-regress/src/errors.rs b/ci/svd2rust-regress/src/errors.rs deleted file mode 100644 index cf598bf5..00000000 --- a/ci/svd2rust-regress/src/errors.rs +++ /dev/null @@ -1,9 +0,0 @@ -use std::path::PathBuf; -error_chain! { - errors { - ProcessFailed(command: String, stderr: Option, stdout: Option, previous_processes_stderr: Vec) { - description("Process Failed") - display("Process Failed - {}", command) - } - } -} diff --git a/ci/svd2rust-regress/src/github.rs b/ci/svd2rust-regress/src/github.rs new file mode 100644 index 00000000..2f0bf222 --- /dev/null +++ b/ci/svd2rust-regress/src/github.rs @@ -0,0 +1,169 @@ +use std::process::{Command, Output}; +use std::{ffi::OsStr, path::Path}; +use std::{iter::IntoIterator, path::PathBuf}; + +use anyhow::Context; + +pub fn run_gh(args: I) -> Command +where + I: IntoIterator, + S: AsRef, +{ + let mut command = Command::new("gh"); + command.args(args); + command +} + +pub fn get_current_pr() -> Result { + let pr = run_gh([ + "pr", + "view", + "--json", + "number", + "--template", + "{{.number}}", + ]) + .output()?; + String::from_utf8(pr.stdout)? + .trim() + .parse() + .map_err(Into::into) +} + +pub fn get_pr_run_id(pr: usize) -> Result { + let run_id = run_gh([ + "api", + &format!("repos/:owner/:repo/actions/runs?event=pull_request&pr={pr}"), + "--jq", + r#"[.workflow_runs[] | select(.name == "Continuous integration")][0] | .id"#, + ]) + .output()?; + String::from_utf8(run_id.stdout)? + .trim() + .parse() + .map_err(Into::into) +} + +pub fn get_release_run_id(event: &str) -> Result { + let query = match event { + "master" => "branch=master".to_owned(), + _ => anyhow::bail!("unknown event"), + }; + let run_id = dbg!(run_gh([ + "api", + &format!("repos/:owner/:repo/actions/runs?{query}"), + "--jq", + r#"[.workflow_runs[] | select(.name == "release")][0] | .id"#, + ]) + .output()) + .with_context(|| "couldn't run gh")?; + String::from_utf8(run_id.stdout)? + .trim() + .parse() + .map_err(Into::into) +} + +fn find(dir: &Path, begins: &str) -> Result, anyhow::Error> { + let find = |entry, begins: &str| -> Result, std::io::Error> { + let entry: std::fs::DirEntry = entry?; + let filename = entry.file_name(); + let filename = filename.to_string_lossy(); + if entry.metadata()?.is_file() && filename.starts_with(begins) { + Ok(Some(entry.path())) + } else { + Ok(None) + } + }; + let mut read_dir = std::fs::read_dir(dir)?; + read_dir + .find_map(|entry| find(entry, begins).transpose()) + .transpose() + .map_err(Into::into) +} + +pub fn get_release_binary_artifact( + reference: &str, + output_dir: &Path, +) -> Result { + let output_dir = output_dir.join(reference); + if let Some(binary) = find(&output_dir, "svd2rust")? { + return Ok(binary); + } + + match reference { + reference if reference.starts_with('v') || matches!(reference, "master" | "latest") => { + let tag = if reference == "master" { + Some("Unreleased") + } else if reference == "latest" { + None + } else { + Some(reference) + }; + run_gh([ + "release", + "download", + "--pattern", + "svd2rust-x86_64-unknown-linux-gnu.gz", + "--dir", + ]) + .arg(&output_dir) + .args(tag) + .status()?; + + Command::new("tar") + .arg("-xzf") + .arg(output_dir.join("svd2rust-x86_64-unknown-linux-gnu.gz")) + .arg("-C") + .arg(&output_dir) + .output() + .expect("Failed to execute command"); + } + _ => { + let run_id = get_release_run_id(reference)?; + run_gh([ + "run", + "download", + &run_id.to_string(), + "-n", + "svd2rust-x86_64-unknown-linux-gnu", + "--dir", + ]) + .arg(&output_dir) + .output()?; + } + } + let binary = find(&output_dir, "svd2rust")?; + binary.ok_or_else(|| anyhow::anyhow!("no binary found")) +} + +pub fn get_pr_binary_artifact(pr: usize, output_dir: &Path) -> Result { + let output_dir = output_dir.join(format!("{pr}")); + let run_id = get_pr_run_id(pr)?; + run_gh([ + "run", + "download", + &run_id.to_string(), + "-n", + "artifact-svd2rust-x86_64-unknown-linux-gnu", + "--dir", + ]) + .arg(&output_dir) + .output()?; + let mut read_dir = std::fs::read_dir(output_dir)?; + let binary = read_dir + .find_map(|entry| { + let find = |entry| -> Result, std::io::Error> { + let entry: std::fs::DirEntry = entry?; + let filename = entry.file_name(); + let filename = filename.to_string_lossy(); + if entry.metadata()?.is_file() && filename.starts_with("svd2rust-regress") { + Ok(Some(entry.path())) + } else { + Ok(None) + } + }; + find(entry).transpose() + }) + .transpose()?; + binary.ok_or_else(|| anyhow::anyhow!("no binary found")) +} diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index 3ee39955..b53718dc 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -1,12 +1,7 @@ -#[macro_use] -extern crate error_chain; - -mod errors; mod svd_test; mod tests; use clap::Parser; -use error_chain::ChainedError; use rayon::prelude::*; use std::fs::File; use std::io::Read; @@ -15,99 +10,272 @@ use std::process::{exit, Command}; use std::sync::atomic::{AtomicBool, Ordering}; use std::time::Instant; -#[derive(Parser, Debug)] +/// Returns the cargo workspace for the manifest +pub fn get_cargo_workspace() -> &'static std::path::Path { + static WORKSPACE: std::sync::OnceLock = std::sync::OnceLock::new(); + #[derive(Debug, serde::Deserialize)] + pub struct CargoMetadata { + pub workspace_root: PathBuf, + } + WORKSPACE.get_or_init(|| { + std::process::Command::new("cargo") + .args(["metadata", "--format-version", "1"]) + .output() + .map(|v| String::from_utf8(v.stdout)) + .unwrap() + .map_err(anyhow::Error::from) + .and_then(|s: String| serde_json::from_str::(&s).map_err(Into::into)) + .unwrap() + .workspace_root + }) +} + +#[derive(clap::Parser, Debug)] #[command(name = "svd2rust-regress")] -struct Opt { +pub struct Tests { /// Run a long test (it's very long) #[clap(short = 'l', long)] - long_test: bool, - - /// Path to an `svd2rust` binary, relative or absolute. - /// Defaults to `target/release/svd2rust[.exe]` of this repository - /// (which must be already built) - #[clap(short = 'p', long = "svd2rust-path")] - bin_path: Option, + pub long_test: bool, // TODO: Consider using the same strategy cargo uses for passing args to rustc via `--` /// Run svd2rust with `--atomics` #[clap(long)] - atomics: bool, + pub atomics: bool, /// Filter by chip name, case sensitive, may be combined with other filters - #[clap(short = 'c', long, value_parser = validate_chips)] - chip: Vec, + #[clap(short = 'c', long)] + pub chip: Vec, /// Filter by manufacturer, case sensitive, may be combined with other filters #[clap( - short = 'm', - long = "manufacturer", - value_parser = validate_manufacturer, - )] - mfgr: Option, + short = 'm', + long = "manufacturer", + value_parser = validate_manufacturer, +)] + pub mfgr: Option, /// Filter by architecture, case sensitive, may be combined with other filters /// Options are: "CortexM", "RiscV", "Msp430", "Mips" and "XtensaLX" #[clap( - short = 'a', - long = "architecture", - value_parser = validate_architecture, - )] - arch: Option, + short = 'a', + long = "architecture", + value_parser = validate_architecture, +)] + pub arch: Option, /// Include tests expected to fail (will cause a non-zero return code) #[clap(short = 'b', long)] - bad_tests: bool, + pub bad_tests: bool, /// Enable formatting with `rustfmt` #[clap(short = 'f', long)] - format: bool, + pub format: bool, /// Print all available test using the specified filters #[clap(long)] - list: bool, + pub list: bool, + // TODO: Specify smaller subset of tests? Maybe with tags? + // TODO: Compile svd2rust? +} + +impl Tests { + fn run( + &self, + opt: &Opts, + bin_path: &PathBuf, + rustfmt_bin_path: Option<&PathBuf>, + ) -> Result, anyhow::Error> { + let tests = tests::tests(None)? + .iter() + // Short test? + .filter(|t| t.should_run(!self.long_test)) + // selected architecture? + .filter(|t| { + if let Some(ref arch) = self.arch { + arch == &format!("{:?}", t.arch) + } else { + true + } + }) + // selected manufacturer? + .filter(|t| { + if let Some(ref mfgr) = self.mfgr { + mfgr == &format!("{:?}", t.mfgr) + } else { + true + } + }) + // Specify chip - note: may match multiple + .filter(|t| { + if !self.chip.is_empty() { + self.chip.iter().any(|c| c == &t.chip) + } else { + true + } + }) + // Run failable tests? + .filter(|t| self.bad_tests || t.should_pass) + .collect::>(); + if self.list { + // FIXME: Prettier output + eprintln!("{:?}", tests.iter().map(|t| t.name()).collect::>()); + exit(0); + } + if tests.is_empty() { + eprintln!("No tests run, you might want to use `--bad-tests` and/or `--long-test`"); + } + let any_fails = AtomicBool::new(false); + tests.par_iter().for_each(|t| { + let start = Instant::now(); + + match t.test(bin_path, rustfmt_bin_path, self.atomics, opt.verbose) { + Ok(s) => { + if let Some(stderrs) = s { + let mut buf = String::new(); + for stderr in stderrs { + read_file(&stderr, &mut buf); + } + eprintln!( + "Passed: {} - {} seconds\n{}", + t.name(), + start.elapsed().as_secs(), + buf + ); + } else { + eprintln!( + "Passed: {} - {} seconds", + t.name(), + start.elapsed().as_secs() + ); + } + } + Err(e) => { + any_fails.store(true, Ordering::Release); + let additional_info = if opt.verbose > 0 { + match &e { + svd_test::TestError::Process(svd_test::ProcessFailed { + stderr: Some(ref stderr), + previous_processes_stderr, + .. + }) => { + let mut buf = String::new(); + if opt.verbose > 1 { + for stderr in previous_processes_stderr { + read_file(stderr, &mut buf); + } + } + read_file(stderr, &mut buf); + buf + } + _ => "".into(), + } + } else { + "".into() + }; + eprintln!( + "Failed: {} - {} seconds. {:?}{}", + t.name(), + start.elapsed().as_secs(), + anyhow::Error::new(e), + additional_info, + ); + } + } + }); + if any_fails.load(Ordering::Acquire) { + exit(1); + } else { + exit(0); + } + } +} + +#[derive(clap::Subcommand, Debug)] +pub enum Subcommand { + Tests(Tests), +} + +#[derive(Parser, Debug)] +#[command(name = "svd2rust-regress")] +pub struct Opts { + /// Use verbose output + #[clap(global = true, long, short = 'v', action = clap::ArgAction::Count)] + pub verbose: u8, + + /// Path to an `svd2rust` binary, relative or absolute. + /// Defaults to `target/release/svd2rust[.exe]` of this repository + /// (which must be already built) + #[clap(global = true, short = 'p', long = "svd2rust-path", default_value = default_svd2rust())] + pub bin_path: PathBuf, /// Path to an `rustfmt` binary, relative or absolute. /// Defaults to `$(rustup which rustfmt)` - #[clap(long)] - rustfmt_bin_path: Option, + #[clap(global = true, long)] + pub rustfmt_bin_path: Option, /// Specify what rustup toolchain to use when compiling chip(s) - #[clap(long = "toolchain")] // , env = "RUSTUP_TOOLCHAIN" - rustup_toolchain: Option, + #[clap(global = true, long = "toolchain")] // , env = "RUSTUP_TOOLCHAIN" + pub rustup_toolchain: Option, - /// Use verbose output - #[clap(long, short = 'v', action = clap::ArgAction::Count)] - verbose: u8, - // TODO: Specify smaller subset of tests? Maybe with tags? - // TODO: Compile svd2rust? -} + /// Test cases to run, defaults to `tests.json` + #[clap(global = true, long, default_value = default_test_cases())] + pub test_cases: std::path::PathBuf, -fn validate_chips(s: &str) -> Result<(), String> { - if tests::TESTS.iter().any(|t| t.chip == s) { - Ok(()) - } else { - Err(format!("Chip `{}` is not a valid value", s)) + #[clap(subcommand)] + subcommand: Subcommand, +} +impl Opts { + fn use_rustfmt(&self) -> bool { + match self.subcommand { + Subcommand::Tests(Tests { format, .. }) => format, + } } } -fn validate_architecture(s: &str) -> Result<(), String> { - if tests::TESTS.iter().any(|t| format!("{:?}", t.arch) == s) { +/// Hack to use ci/tests.json as default value when running as `cargo run` +fn default_test_cases() -> std::ffi::OsString { + std::env::var_os("CARGO_MANIFEST_DIR") + .map(|mut e| { + e.extend([std::ffi::OsStr::new("/tests.json")]); + std::path::PathBuf::from(e) + .strip_prefix(std::env::current_dir().unwrap()) + .unwrap() + .to_owned() + .into_os_string() + }) + .unwrap_or_else(|| std::ffi::OsString::from("tests.json".to_owned())) +} + +fn default_svd2rust() -> std::ffi::OsString { + get_cargo_workspace() + .join("target/release/svd2rust") + .into_os_string() +} + +fn validate_architecture(s: &str) -> Result<(), anyhow::Error> { + if tests::tests(None)? + .iter() + .any(|t| format!("{:?}", t.arch) == s) + { Ok(()) } else { - Err(format!("Architecture `{s}` is not a valid value")) + anyhow::bail!("Architecture `{s}` is not a valid value") } } -fn validate_manufacturer(s: &str) -> Result<(), String> { - if tests::TESTS.iter().any(|t| format!("{:?}", t.mfgr) == s) { +fn validate_manufacturer(s: &str) -> Result<(), anyhow::Error> { + if tests::tests(None)? + .iter() + .any(|t| format!("{:?}", t.mfgr) == s) + { Ok(()) } else { - Err(format!("Manufacturer `{s}` is not a valid value")) + anyhow::bail!("Manufacturer `{s}` is not a valid value") } } /// Validate any assumptions made by this program -fn validate_tests(tests: &[&tests::TestCase]) { +fn validate_tests(tests: &[tests::TestCase]) { use std::collections::HashSet; let mut fail = false; @@ -139,47 +307,32 @@ fn read_file(path: &PathBuf, buf: &mut String) { .expect("Couldn't read file to string"); } -fn main() { - let opt = Opt::parse(); +fn main() -> Result<(), anyhow::Error> { + let opt = Opts::parse(); // Validate all test pre-conditions - validate_tests(tests::TESTS); + validate_tests(tests::tests(Some(&opt))?); - // Determine default svd2rust path - let default_svd2rust_iter = ["..", "..", "..", "..", "target", "release"]; - - let default_svd2rust = if cfg!(windows) { - default_svd2rust_iter.iter().chain(["svd2rust.exe"].iter()) - } else { - default_svd2rust_iter.iter().chain(["svd2rust"].iter()) - } - .collect(); - - let bin_path = match opt.bin_path { - Some(ref bp) => bp, - None => &default_svd2rust, - }; + let bin_path = &opt.bin_path; + anyhow::ensure!(bin_path.exists(), "svd2rust binary does not exist"); let default_rustfmt: Option = if let Some((v, true)) = Command::new("rustup") - .args(&["which", "rustfmt"]) + .args(["which", "rustfmt"]) .output() .ok() .map(|o| (o.stdout, o.status.success())) { Some(String::from_utf8_lossy(&v).into_owned().trim().into()) } else { - if opt.format && opt.rustfmt_bin_path.is_none() { - panic!("rustfmt binary not found, is rustup and rustfmt-preview installed?"); - } None }; - let rustfmt_bin_path = match (&opt.rustfmt_bin_path, opt.format) { + let rustfmt_bin_path = match (&opt.rustfmt_bin_path, opt.use_rustfmt()) { (_, false) => None, - (&Some(ref path), true) => Some(path), + (Some(path), true) => Some(path), (&None, true) => { // FIXME: Use Option::filter instead when stable, rust-lang/rust#45860 - if default_rustfmt.iter().find(|p| p.is_file()).is_none() { + if !default_rustfmt.iter().any(|p| p.is_file()) { panic!("No rustfmt found"); } default_rustfmt.as_ref() @@ -191,114 +344,7 @@ fn main() { std::env::set_var("RUSTUP_TOOLCHAIN", toolchain); } - // collect enabled tests - let tests = tests::TESTS - .iter() - // Short test? - .filter(|t| t.should_run(!opt.long_test)) - // selected architecture? - .filter(|t| { - if let Some(ref arch) = opt.arch { - arch == &format!("{:?}", t.arch) - } else { - true - } - }) - // selected manufacturer? - .filter(|t| { - if let Some(ref mfgr) = opt.mfgr { - mfgr == &format!("{:?}", t.mfgr) - } else { - true - } - }) - // Specify chip - note: may match multiple - .filter(|t| { - if !opt.chip.is_empty() { - opt.chip.iter().any(|c| c == t.chip) - } else { - true - } - }) - // Run failable tests? - .filter(|t| opt.bad_tests || t.should_pass) - .collect::>(); - - if opt.list { - // FIXME: Prettier output - eprintln!("{:?}", tests.iter().map(|t| t.name()).collect::>()); - exit(0); - } - if tests.is_empty() { - eprintln!("No tests run, you might want to use `--bad-tests` and/or `--long-test`"); - } - - let any_fails = AtomicBool::new(false); - - // TODO: It would be more efficient to reuse directories, so we don't - // have to rebuild all the deps crates - tests.par_iter().for_each(|t| { - let start = Instant::now(); - - match svd_test::test(t, &bin_path, rustfmt_bin_path, opt.atomics, opt.verbose) { - Ok(s) => { - if let Some(stderrs) = s { - let mut buf = String::new(); - for stderr in stderrs { - read_file(&stderr, &mut buf); - } - eprintln!( - "Passed: {} - {} seconds\n{}", - t.name(), - start.elapsed().as_secs(), - buf - ); - } else { - eprintln!( - "Passed: {} - {} seconds", - t.name(), - start.elapsed().as_secs() - ); - } - } - Err(e) => { - any_fails.store(true, Ordering::Release); - let additional_info = if opt.verbose > 0 { - match *e.kind() { - errors::ErrorKind::ProcessFailed( - _, - _, - Some(ref stderr), - ref previous_processes_stderr, - ) => { - let mut buf = String::new(); - if opt.verbose > 1 { - for stderr in previous_processes_stderr { - read_file(&stderr, &mut buf); - } - } - read_file(&stderr, &mut buf); - buf - } - _ => "".into(), - } - } else { - "".into() - }; - eprintln!( - "Failed: {} - {} seconds. {}{}", - t.name(), - start.elapsed().as_secs(), - e.display_chain().to_string().trim_end(), - additional_info, - ); - } - } - }); - - if any_fails.load(Ordering::Acquire) { - exit(1); - } else { - exit(0); + match &opt.subcommand { + Subcommand::Tests(tests_opts) => tests_opts.run(&opt, bin_path, rustfmt_bin_path)?, } } diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index a1404660..ea7c6b57 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -1,9 +1,14 @@ -use crate::errors::*; +use anyhow::{Context, Result}; +use svd2rust::Target; + use crate::tests::TestCase; -use std::fs::{self, File, OpenOptions}; use std::io::prelude::*; use std::path::PathBuf; use std::process::{Command, Output}; +use std::{ + fs::{self, File, OpenOptions}, + path::Path, +}; const CRATES_ALL: &[&str] = &["critical-section = \"1.0\"", "vcell = \"0.1.2\""]; const CRATES_MSP430: &[&str] = &["msp430 = \"0.4.0\"", "msp430-rt = \"0.4.0\""]; @@ -21,22 +26,45 @@ fn path_helper(input: &[&str]) -> PathBuf { input.iter().collect() } -fn path_helper_base(base: &PathBuf, input: &[&str]) -> PathBuf { - let mut path = base.clone(); - input.iter().for_each(|p| path.push(p)); - path +fn path_helper_base(base: &Path, input: &[&str]) -> PathBuf { + input + .iter() + .fold(base.to_owned(), |b: PathBuf, p| b.join(p)) } /// Create and write to file -fn file_helper(payload: &str, path: &PathBuf) -> Result<()> { - let mut f = File::create(path).chain_err(|| format!("Failed to create {path:?}"))?; +fn file_helper(payload: &str, path: &Path) -> Result<()> { + let mut f = File::create(path).with_context(|| format!("Failed to create {path:?}"))?; f.write_all(payload.as_bytes()) - .chain_err(|| format!("Failed to write to {path:?}"))?; + .with_context(|| format!("Failed to write to {path:?}"))?; Ok(()) } +#[derive(thiserror::Error)] +#[error("Process failed - {command}")] +pub struct ProcessFailed { + pub command: String, + pub stderr: Option, + pub stdout: Option, + pub previous_processes_stderr: Vec, +} + +#[derive(Debug, thiserror::Error)] +pub enum TestError { + #[error(transparent)] + Process(#[from] ProcessFailed), + #[error("Failed to run test")] + Other(#[from] anyhow::Error), +} + +impl std::fmt::Debug for ProcessFailed { + fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { + f.write_str("Process failed") + } +} + trait CommandHelper { fn capture_outputs( &self, @@ -45,7 +73,7 @@ trait CommandHelper { stdout: Option<&PathBuf>, stderr: Option<&PathBuf>, previous_processes_stderr: &[PathBuf], - ) -> Result<()>; + ) -> Result<(), TestError>; } impl CommandHelper for Output { @@ -56,7 +84,7 @@ impl CommandHelper for Output { stdout: Option<&PathBuf>, stderr: Option<&PathBuf>, previous_processes_stderr: &[PathBuf], - ) -> Result<()> { + ) -> Result<(), TestError> { if let Some(out) = stdout { let out_payload = String::from_utf8_lossy(&self.stdout); file_helper(&out_payload, out)?; @@ -68,12 +96,12 @@ impl CommandHelper for Output { }; if cant_fail && !self.status.success() { - return Err(ErrorKind::ProcessFailed( - name.into(), - stdout.cloned(), - stderr.cloned(), - previous_processes_stderr.to_vec(), - ) + return Err(ProcessFailed { + command: name.into(), + stdout: stdout.cloned(), + stderr: stderr.cloned(), + previous_processes_stderr: previous_processes_stderr.to_vec(), + } .into()); } @@ -81,171 +109,171 @@ impl CommandHelper for Output { } } -pub fn test( - t: &TestCase, - bin_path: &PathBuf, - rustfmt_bin_path: Option<&PathBuf>, - atomics: bool, - verbosity: u8, -) -> Result>> { - let user = match std::env::var("USER") { - Ok(val) => val, - Err(_) => "rusttester".into(), - }; - - // Remove the existing chip directory, if it exists - let chip_dir = path_helper(&["output", &t.name()]); - if let Err(err) = fs::remove_dir_all(&chip_dir) { - match err.kind() { - std::io::ErrorKind::NotFound => (), - _ => Err(err).chain_err(|| "While removing chip directory")?, - } - } - - // Used to build the output from stderr for -v and -vv* - let mut process_stderr_paths: Vec = vec![]; - - // Create a new cargo project. It is necesary to set the user, otherwise - // cargo init will not work (when running in a container with no user set) - Command::new("cargo") - .env("USER", user) - .arg("init") - .arg("--name") - .arg(&t.name()) - .arg("--vcs") - .arg("none") - .arg(&chip_dir) - .output() - .chain_err(|| "Failed to cargo init")? - .capture_outputs(true, "cargo init", None, None, &[])?; - - // Add some crates to the Cargo.toml of our new project - let svd_toml = path_helper_base(&chip_dir, &["Cargo.toml"]); - let mut file = OpenOptions::new() - .write(true) - .append(true) - .open(svd_toml) - .chain_err(|| "Failed to open Cargo.toml for appending")?; - - use crate::tests::Target; - let crates = CRATES_ALL - .iter() - .chain(match &t.arch { - Target::CortexM => CRATES_CORTEX_M.iter(), - Target::RISCV => CRATES_RISCV.iter(), - Target::Mips => CRATES_MIPS.iter(), - Target::Msp430 => CRATES_MSP430.iter(), - Target::XtensaLX => CRATES_XTENSALX.iter(), - Target::None => unreachable!(), - }) - .chain(if atomics { - CRATES_ATOMICS.iter() +impl TestCase { + pub fn test( + &self, + bin_path: &PathBuf, + rustfmt_bin_path: Option<&PathBuf>, + atomics: bool, + verbosity: u8, + ) -> Result>, TestError> { + let (chip_dir, mut process_stderr_paths) = + self.setup_case(atomics, bin_path, rustfmt_bin_path)?; + // Run `cargo check`, capturing stderr to a log file + let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); + let output = Command::new("cargo") + .arg("check") + .current_dir(&chip_dir) + .output() + .with_context(|| "failed to check")?; + output.capture_outputs( + true, + "cargo check", + None, + Some(&cargo_check_err_file), + &process_stderr_paths, + )?; + process_stderr_paths.push(cargo_check_err_file); + Ok(if verbosity > 1 { + Some(process_stderr_paths) } else { - [].iter() + None }) - .chain(PROFILE_ALL.iter()) - .chain(FEATURES_ALL.iter()) - .chain(match &t.arch { - Target::XtensaLX => FEATURES_XTENSALX.iter(), - _ => [].iter(), - }); - - for c in crates { - writeln!(file, "{}", c).chain_err(|| "Failed to append to file!")?; } - // Download the SVD as specified in the URL - // TODO: Check for existing svd files? `--no-cache` flag? - let svd = reqwest::blocking::get(&t.svd_url()) - .chain_err(|| "Failed to get svd URL")? - .text() - .chain_err(|| "SVD is bad text")?; - - // Write SVD contents to file - let chip_svd = format!("{}.svd", &t.chip); - let svd_file = path_helper_base(&chip_dir, &[&chip_svd]); - file_helper(&svd, &svd_file)?; - - // Generate the lib.rs from the SVD file using the specified `svd2rust` binary - // If the architecture is cortex-m or msp430 we move the generated lib.rs file to src/ - let lib_rs_file = path_helper_base(&chip_dir, &["src", "lib.rs"]); - let svd2rust_err_file = path_helper_base(&chip_dir, &["svd2rust.err.log"]); - let target = match t.arch { - Target::CortexM => "cortex-m", - Target::Msp430 => "msp430", - Target::Mips => "mips", - Target::RISCV => "riscv", - Target::XtensaLX => "xtensa-lx", - Target::None => unreachable!(), - }; - let mut svd2rust_bin = Command::new(bin_path); - if atomics { - svd2rust_bin.arg("--atomics"); - } - - let output = svd2rust_bin - .args(&["-i", &chip_svd]) - .args(&["--target", &target]) - .current_dir(&chip_dir) - .output() - .chain_err(|| "failed to execute process")?; - output.capture_outputs( - true, - "svd2rust", - Some(&lib_rs_file).filter(|_| { - (t.arch != Target::CortexM) - && (t.arch != Target::Msp430) - && (t.arch != Target::XtensaLX) - }), - Some(&svd2rust_err_file), - &[], - )?; - process_stderr_paths.push(svd2rust_err_file); - - match t.arch { - Target::CortexM | Target::Mips | Target::Msp430 | Target::XtensaLX => { - // TODO: Give error the path to stderr - fs::rename(path_helper_base(&chip_dir, &["lib.rs"]), &lib_rs_file) - .chain_err(|| "While moving lib.rs file")? + pub fn setup_case( + &self, + atomics: bool, + bin_path: &PathBuf, + rustfmt_bin_path: Option<&PathBuf>, + ) -> Result<(PathBuf, Vec), TestError> { + let user = match std::env::var("USER") { + Ok(val) => val, + Err(_) => "rusttester".into(), + }; + let chip_dir = path_helper(&["output", &self.name()]); + if let Err(err) = fs::remove_dir_all(&chip_dir) { + match err.kind() { + std::io::ErrorKind::NotFound => (), + _ => Err(err).with_context(|| "While removing chip directory")?, + } } - _ => {} - } - - let rustfmt_err_file = path_helper_base(&chip_dir, &["rustfmt.err.log"]); - if let Some(rustfmt_bin_path) = rustfmt_bin_path { - // Run `cargo fmt`, capturing stderr to a log file - - let output = Command::new(rustfmt_bin_path) - .arg(lib_rs_file) + let mut process_stderr_paths: Vec = vec![]; + Command::new("cargo") + .env("USER", user) + .arg("init") + .arg("--name") + .arg(&self.name()) + .arg("--vcs") + .arg("none") + .arg(&chip_dir) .output() - .chain_err(|| "failed to format")?; + .with_context(|| "Failed to cargo init")? + .capture_outputs(true, "cargo init", None, None, &[])?; + let svd_toml = path_helper_base(&chip_dir, &["Cargo.toml"]); + let mut file = OpenOptions::new() + .write(true) + .append(true) + .open(svd_toml) + .with_context(|| "Failed to open Cargo.toml for appending")?; + let crates = CRATES_ALL + .iter() + .chain(match &self.arch { + Target::CortexM => CRATES_CORTEX_M.iter(), + Target::RISCV => CRATES_RISCV.iter(), + Target::Mips => CRATES_MIPS.iter(), + Target::Msp430 => CRATES_MSP430.iter(), + Target::XtensaLX => CRATES_XTENSALX.iter(), + Target::None => unreachable!(), + }) + .chain(if atomics { + CRATES_ATOMICS.iter() + } else { + [].iter() + }) + .chain(PROFILE_ALL.iter()) + .chain(FEATURES_ALL.iter()) + .chain(match &self.arch { + Target::XtensaLX => FEATURES_XTENSALX.iter(), + _ => [].iter(), + }); + for c in crates { + writeln!(file, "{}", c).with_context(|| "Failed to append to file!")?; + } + let svd = reqwest::blocking::get(self.svd_url()) + .with_context(|| "Failed to get svd URL")? + .text() + .with_context(|| "SVD is bad text")?; + let chip_svd = format!("{}.svd", &self.chip); + let svd_file = path_helper_base(&chip_dir, &[&chip_svd]); + file_helper(&svd, &svd_file)?; + let lib_rs_file = path_helper_base(&chip_dir, &["src", "lib.rs"]); + let svd2rust_err_file = path_helper_base(&chip_dir, &["svd2rust.err.log"]); + let target = match self.arch { + Target::CortexM => "cortex-m", + Target::Msp430 => "msp430", + Target::Mips => "mips", + Target::RISCV => "riscv", + Target::XtensaLX => "xtensa-lx", + Target::None => unreachable!(), + }; + let mut svd2rust_bin = Command::new(bin_path); + if atomics { + svd2rust_bin.arg("--atomics"); + } + let output = svd2rust_bin + .args(["-i", &chip_svd]) + .args(["--target", target]) + .current_dir(&chip_dir) + .output() + .with_context(|| "failed to execute process")?; output.capture_outputs( - false, - "rustfmt", - None, - Some(&rustfmt_err_file), - &process_stderr_paths, + true, + "svd2rust", + Some(&lib_rs_file).filter(|_| { + (self.arch != Target::CortexM) + && (self.arch != Target::Msp430) + && (self.arch != Target::XtensaLX) + }), + Some(&svd2rust_err_file), + &[], )?; - process_stderr_paths.push(rustfmt_err_file); + process_stderr_paths.push(svd2rust_err_file); + match self.arch { + Target::CortexM | Target::Mips | Target::Msp430 | Target::XtensaLX => { + // TODO: Give error the path to stderr + fs::rename(path_helper_base(&chip_dir, &["lib.rs"]), &lib_rs_file) + .with_context(|| "While moving lib.rs file")? + } + _ => {} + } + let lib_rs = + fs::read_to_string(&lib_rs_file).with_context(|| "Failed to read lib.rs file")?; + let file = syn::parse_file(&lib_rs) + .with_context(|| format!("couldn't parse {}", lib_rs_file.display()))?; + File::options() + .write(true) + .open(&lib_rs_file) + .with_context(|| format!("couldn't open {}", lib_rs_file.display()))? + .write(prettyplease::unparse(&file).as_bytes()) + .with_context(|| format!("couldn't write {}", lib_rs_file.display()))?; + let rustfmt_err_file = path_helper_base(&chip_dir, &["rustfmt.err.log"]); + if let Some(rustfmt_bin_path) = rustfmt_bin_path { + // Run `cargo fmt`, capturing stderr to a log file + + let output = Command::new(rustfmt_bin_path) + .arg(lib_rs_file) + .output() + .with_context(|| "failed to format")?; + output.capture_outputs( + false, + "rustfmt", + None, + Some(&rustfmt_err_file), + &process_stderr_paths, + )?; + process_stderr_paths.push(rustfmt_err_file); + } + Ok((chip_dir, process_stderr_paths)) } - // Run `cargo check`, capturing stderr to a log file - let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); - let output = Command::new("cargo") - .arg("check") - .current_dir(&chip_dir) - .output() - .chain_err(|| "failed to check")?; - output.capture_outputs( - true, - "cargo check", - None, - Some(&cargo_check_err_file), - &process_stderr_paths, - )?; - process_stderr_paths.push(cargo_check_err_file); - Ok(if verbosity > 1 { - Some(process_stderr_paths) - } else { - None - }) } diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index 9020924f..ac86f737 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -1,7 +1,10 @@ +use self::RunWhen::*; +use anyhow::Context; pub use svd2rust::util::Target; use svd2rust::util::ToSanitizedCase; -#[derive(Debug)] +#[allow(clippy::upper_case_acronyms)] +#[derive(Debug, serde::Serialize, serde::Deserialize)] pub enum Manufacturer { Atmel, Freescale, @@ -20,7 +23,7 @@ pub enum Manufacturer { Espressif, } -#[derive(Debug)] +#[derive(Debug, serde::Serialize, serde::Deserialize)] pub enum RunWhen { Always, NotShort, @@ -29,18 +32,19 @@ pub enum RunWhen { Never, } +#[derive(serde::Serialize, serde::Deserialize)] pub struct TestCase { pub arch: Target, pub mfgr: Manufacturer, - pub chip: &'static str, - svd_url: Option<&'static str>, + pub chip: String, + svd_url: Option, pub should_pass: bool, run_when: RunWhen, } impl TestCase { pub fn svd_url(&self) -> String { - match self.svd_url { + match &self.svd_url { Some(u) => u.to_owned(), None => format!("https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/{vendor:?}/{chip}.svd", vendor = self.mfgr, @@ -58,4145 +62,27 @@ impl TestCase { } pub fn name(&self) -> String { - format!("{:?}-{}", self.mfgr, self.chip.replace(".", "_")) + format!("{:?}-{}", self.mfgr, self.chip.replace('.', "_")) .to_sanitized_snake_case() .into() } } -use self::Manufacturer::*; -use self::RunWhen::*; -use self::Target::{CortexM, Mips, Msp430, XtensaLX, RISCV}; +pub fn tests(opts: Option<&crate::Opts>) -> Result<&'static [TestCase], anyhow::Error> { + pub static TESTS: std::sync::OnceLock> = std::sync::OnceLock::new(); -// NOTE: All chip names must be unique! -pub const TESTS: &[&TestCase] = &[ - // BAD-SVD missing resetValue - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9CN11", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9CN12", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9G10", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9G15", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9G20", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9G25", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9G35", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9M10", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9M11", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9N12", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9X25", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9X35", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3A4C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3A8C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N00A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N00B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N0A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N0B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N0C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N1A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N1B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N1C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N2A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N2B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N2C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N4A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N4B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N4C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S1A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S1B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S1C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S2A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S2B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S2C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S4A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S4B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S4C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S8B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S8C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3SD8B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3SD8C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3U1C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3U1E", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3U2C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3U2E", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3U4C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3U4E", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3X4C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3X4E", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3X8C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3X8E", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM4S16B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM4S16C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM4S8B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM4S8C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM4SD32B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM4SD32C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMA5D31", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMA5D33", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMA5D34", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMA5D35", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // FIXME(#107) "failed to resolve. Use of undeclared type or module `sercom0`" - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21E15A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21E16A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21E17A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21E18A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21G16A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21G17A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21G18A", - svd_url: Some( - "https://raw.githubusercontent.com/wez/atsamd21-rs/master/svd/ATSAMD21G18A.svd", - ), - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21J16A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21J17A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21J18A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMR21E16A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMR21E17A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMR21E18A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMR21G16A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMR21G17A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMR21G18A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD bad enumeratedValue value - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV56F20", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV56F22", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV56F24", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV58F20", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV58F22", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV58F24", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD field names are equivalent when case is ignored - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK61F15", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK61F15WS", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK70F12", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK70F15", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK70F15WS", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // Test 1/3 of these to save time - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK02F12810", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK10D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK10D5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK10D7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK10DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK10F12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK11D5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK11D5WS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK11DA5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK12D5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK20D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK20D5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK20D7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK20DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK20F12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK21D5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK21D5WS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK21DA5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK21F12", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK21FA12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK22D5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK22F12", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK22F12810", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK22F25612", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK22F51212", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK22FA12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK24F12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK24F25612", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK26F18", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK30D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK30D7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK30DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK40D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK40D7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK40DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK50D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK50D7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK50DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK51D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK51D7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK51DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK52D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK52DZ10", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK53D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK53DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK60D10", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK60DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK60F15", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK63F12", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK64F12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK65F18", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK66F18", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK80F25615", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK81F25615", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK82F25615", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE14F16", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE14Z7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE15Z7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE16F16", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE18F16", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL28T7_CORE0", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL28T7_CORE1", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL28Z7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL81Z7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL82Z7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKS22F12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV10Z1287", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV10Z7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV11Z7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV30F12810", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV31F12810", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV31F25612", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV31F51212", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV40F15", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV42F16", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV43F15", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV44F15", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV44F16", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV45F15", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV46F15", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV46F16", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW20Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW21D5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW21Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW22D5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW24D5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW30Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW31Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW40Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW41Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE02Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE04Z1284", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE04Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE06Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE14D7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE15D7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL02Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL03Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL04Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL05Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL13Z644", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL14Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL15Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL16Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL17Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL17Z644", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL24Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL25Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL26Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL27Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL27Z644", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL33Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL33Z644", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL34Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL36Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL43Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL46Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKM14ZA5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKM33ZA5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKM34Z7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKM34ZA5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW01Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "SKEAZ1284", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "SKEAZN642", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "SKEAZN84", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF10xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF10xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF11xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF11xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF11xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF11xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF12xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF12xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF13xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF13xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF13xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF13xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF14xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF14xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF14xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF15xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF15xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF15xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF1AxL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF1AxM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF1AxN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF31xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF31xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF31xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF31xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF34xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF34xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF34xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF42xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF42xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFA3xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFA3xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFA3xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFA4xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFA4xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFA4xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFAAxL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFAAxM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFAAxN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFB4xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFB4xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFB4xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B160L", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B160R", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B360L", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B360R", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B460L", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B460R", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B560L", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B560R", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF10xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF10xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF11xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF11xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF11xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF11xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF12xJ", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF12xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF12xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF12xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF12xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF12xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF21xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF21xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF30xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF30xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF31xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF31xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF31xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF31xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF32xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF32xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF32xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF32xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF32xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF40xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF40xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF41xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF41xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF41xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF41xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF42xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF42xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF50xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF50xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF51xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF51xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF51xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF51xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF52xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF52xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF52xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF52xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF52xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF61xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF61xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BFD1xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BFD1xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "S6E1A1", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "S6E2CC", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Holtek, - chip: "ht32f125x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Holtek, - chip: "ht32f175x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Holtek, - chip: "ht32f275x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Nordic, - chip: "nrf51", - svd_url: None, - should_pass: true, - run_when: Always, - }, - // BAD-SVD two enumeratedValues have the same value - &TestCase { - arch: CortexM, - mfgr: Nordic, - chip: "nrf52", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Nuvoton, - chip: "M051_Series", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Nuvoton, - chip: "NUC100_Series", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD two enumeratedValues have the same name - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11Exx_v5", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11Uxx_v7", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11xx_v6a", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11xx_v6", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC13Uxx_v1", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC15xx_v0.7", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC800_v0.3", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11E6x_v0.8", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC176x5x_v0.2", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11Cxx_v9", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD missing resetValue - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC178x_7x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC178x_7x_v0.8", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC408x_7x_v0.7", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11Axxv0.6", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD bad identifier: contains a '.' - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11D14_svd_v4", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC13xx_svd_v1", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD bad identifier: contains a '/' - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC18xx_svd_v18", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC43xx_43Sxx", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD uses the identifier '_' to name a reserved bitfield value - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC1102_4_v4", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // FIXME(???) "duplicate definitions for `write`" - // #99 regression test - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC5410x_v0.4", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "MK22F25612", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "MK22F51212", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "MKW41Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3C1x4_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3C1x6_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3C1x7_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3L1x4_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3L1x6_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3L1x7_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3U1x4_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3U1x6_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3U1x7_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - // FIXME(???) panicked at "c.text.clone()" - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3L1x8_SVD", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF12xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF12xL", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF42xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF42xL", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF12xJ", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF12xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF12xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF16xx", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF32xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF32xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF36xx", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF42xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF42xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF46xx", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF52xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF52xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF56xx", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - // Test half of these for the sake of time - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF10xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF10xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF11xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF11xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF11xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF11xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF13xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF13xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF13xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF13xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF14xL", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF14xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF14xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF15xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF15xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF15xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF31xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF31xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF31xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF31xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF34xL", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF34xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF34xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFA3xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFA3xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFA3xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFA4xL", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFA4xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFA4xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFB4xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFB4xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFB4xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF10xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF10xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF11xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF11xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF11xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF11xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF12xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF12xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF12xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF21xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF21xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF30xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF30xR", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF31xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF31xR", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF31xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF31xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF32xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF32xL", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF32xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF40xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF40xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF41xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF41xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF41xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF41xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF50xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF50xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF51xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF51xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF51xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF51xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF52xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF52xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF52xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF61xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF61xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BFD1xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BFD1xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F030", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F031x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F042x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F072x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F091x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F0xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F100xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F101xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F102xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F103xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F105xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F107xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F20x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F21x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F301", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F302", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F303", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F3x4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F373", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F401", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F405", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F407", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F410", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F411", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F412", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F413", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F427", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F429", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F446", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F469", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x2", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x3", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x6", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x9", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G07x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G431xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G441xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G471xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G474xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G483xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G484xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L100", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L15xC", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L15xxE", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L15xxxA", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L1xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L4x6", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32W108", - svd_url: None, - should_pass: true, - run_when: Always, - }, - // FIXME(#91) "field is never used: `register`" - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L051x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L052x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L053x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L062x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L063x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD resetValue is bigger than the register size - &TestCase { - arch: CortexM, - mfgr: Toshiba, - chip: "M365", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Toshiba, - chip: "M367", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Toshiba, - chip: "M368", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Toshiba, - chip: "M369", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Toshiba, - chip: "M36B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Toshiba, - chip: "M061", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: RISCV, - mfgr: SiFive, - chip: "E310x", - svd_url: Some("https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd"), - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: Msp430, - mfgr: TexasInstruments, - chip: "msp430g2553", - svd_url: Some("https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd"), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: Msp430, - mfgr: TexasInstruments, - chip: "msp430fr2355", - svd_url: Some( - "https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd", - ), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: XtensaLX, - mfgr: Espressif, - chip: "esp32", - svd_url: Some( - "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd", - ), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: XtensaLX, - mfgr: Espressif, - chip: "esp32s2", - svd_url: Some( - "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd", - ), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: XtensaLX, - mfgr: Espressif, - chip: "esp32s3", - svd_url: Some( - "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd", - ), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: RISCV, - mfgr: Espressif, - chip: "esp32c3", - svd_url: Some( - "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd", - ), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: Mips, - mfgr: Microchip, - chip: "pic32mx170f256b", - svd_url: Some( - "https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched", - ), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: Mips, - mfgr: Microchip, - chip: "pic32mx270f256b", - svd_url: Some( - "https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched", - ), - should_pass: true, - run_when: Always, - }, -]; + if let Some(cases) = TESTS.get() { + Ok(cases) + } else { + let path = opts + .map(|o| o.test_cases.clone()) + .ok_or_else(|| anyhow::format_err!("no test cases specified"))?; + let cases: Vec = serde_json::from_reader( + std::fs::OpenOptions::new() + .read(true) + .open(&path) + .with_context(|| format!("couldn't open file {}", path.display()))?, + )?; + Ok(TESTS.get_or_init(|| cases)) + } +} diff --git a/ci/svd2rust-regress/tests.json b/ci/svd2rust-regress/tests.json new file mode 100644 index 00000000..6a968e25 --- /dev/null +++ b/ci/svd2rust-regress/tests.json @@ -0,0 +1,4098 @@ +[ + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9CN11", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9CN12", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9G10", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9G15", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9G20", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9G25", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9G35", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9M10", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9M11", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9N12", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9X25", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9X35", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3A4C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3A8C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N00A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N00B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N0A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N0B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N0C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N1A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N1B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N1C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N2A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N2B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N2C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N4A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N4B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N4C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S1A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S1B", + "svd_url": null, + "should_pass": false, + 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"chip": "STM32G471xx", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32G474xx", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32G483xx", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32G484xx", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L100", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L15xC", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L15xxE", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L15xxxA", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L1xx", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L4x6", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32W108", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L051x", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L052x", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L053x", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L062x", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L063x", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Toshiba", + "chip": "M365", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Toshiba", + "chip": "M367", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Toshiba", + "chip": "M368", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Toshiba", + "chip": "M369", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Toshiba", + "chip": "M36B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Toshiba", + "chip": "M061", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "riscv", + "mfgr": "SiFive", + "chip": "E310x", + "svd_url": "https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd", + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "msp430", + "mfgr": "TexasInstruments", + "chip": "msp430g2553", + "svd_url": "https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "msp430", + "mfgr": "TexasInstruments", + "chip": "msp430fr2355", + "svd_url": "https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "xtensa-lx", + "mfgr": "Espressif", + "chip": "esp32", + "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "xtensa-lx", + "mfgr": "Espressif", + "chip": "esp32s2", + "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "xtensa-lx", + "mfgr": "Espressif", + "chip": "esp32s3", + "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "riscv", + "mfgr": "Espressif", + "chip": "esp32c3", + "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "mips", + "mfgr": "Microchip", + "chip": "pic32mx170f256b", + "svd_url": "https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "mips", + "mfgr": "Microchip", + "chip": "pic32mx270f256b", + "svd_url": "https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched", + "should_pass": true, + "run_when": "Always" + } +] \ No newline at end of file From 1831ff40cf490ac9cade9468eefc3d9495f897f7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Tue, 6 Jun 2023 00:22:39 +0200 Subject: [PATCH 03/14] Implement diff and ci command --- .cargo/config.toml | 3 + .github/workflows/ci.yml | 28 +- .github/workflows/diff.yml | 73 ++ Cargo.lock | 1093 ++++++++++++++++++++++++++- ci/svd2rust-regress/Cargo.toml | 6 +- ci/svd2rust-regress/src/ci.rs | 43 ++ ci/svd2rust-regress/src/command.rs | 73 ++ ci/svd2rust-regress/src/diff.rs | 294 +++++++ ci/svd2rust-regress/src/github.rs | 211 ++++-- ci/svd2rust-regress/src/main.rs | 247 ++++-- ci/svd2rust-regress/src/svd_test.rs | 138 +++- ci/svd2rust-regress/src/tests.rs | 47 +- src/config.rs | 20 +- 13 files changed, 2070 insertions(+), 206 deletions(-) create mode 100644 .github/workflows/diff.yml create mode 100644 ci/svd2rust-regress/src/ci.rs create mode 100644 ci/svd2rust-regress/src/command.rs create mode 100644 ci/svd2rust-regress/src/diff.rs diff --git a/.cargo/config.toml b/.cargo/config.toml index 3c32d251..f897ca7b 100644 --- a/.cargo/config.toml +++ b/.cargo/config.toml @@ -1,2 +1,5 @@ [target.aarch64-unknown-linux-gnu] linker = "aarch64-linux-gnu-gcc" + +[alias] +regress = "run -p svd2rust-regress --" \ No newline at end of file diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 281705c2..5d239663 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -21,7 +21,12 @@ jobs: runs-on: ubuntu-latest strategy: matrix: - TARGET: [x86_64-unknown-linux-gnu, x86_64-apple-darwin, x86_64-pc-windows-msvc] + TARGET: + [ + x86_64-unknown-linux-gnu, + x86_64-apple-darwin, + x86_64-pc-windows-msvc, + ] steps: - uses: actions/checkout@v4 @@ -176,24 +181,35 @@ jobs: name: Build svd2rust artifact if: github.event_name == 'pull_request' needs: [check] - runs-on: ubuntu-latest + runs-on: ${{ matrix.runs-on }} + strategy: + matrix: + include: + - target: x86_64-unknown-linux-gnu + runs-on: ubuntu-latest + - target: aarch64-apple-darwin + runs-on: macos-latest + - target: x86_64-pc-windows-msvc + runs-on: windows-latest + suffix: .exe steps: - uses: actions/checkout@v3 - uses: dtolnay/rust-toolchain@master with: toolchain: stable + targets: ${{ matrix.target }} - name: Cache Dependencies uses: Swatinem/rust-cache@v2 - name: Build svd2rust artifact - run: cargo build --release + run: cargo build --release --target ${{ matrix.target }} - - run: mv target/release/svd2rust svd2rust-x86_64-unknown-linux-gnu-$(git rev-parse --short HEAD) + - run: mv target/${{ matrix.target }}/release/svd2rust${{ matrix.suffix || '' }} svd2rust-${{ matrix.target }}-$(git rev-parse --short HEAD)${{ matrix.suffix || '' }} - name: Upload artifact uses: actions/upload-artifact@v3 with: - name: artifact-svd2rust-x86_64-unknown-linux-gnu - path: svd2rust-x86_64-unknown-linux-gnu* + name: artifact-svd2rust-${{ matrix.target }} + path: svd2rust-${{ matrix.target }}* diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml new file mode 100644 index 00000000..50f8424f --- /dev/null +++ b/.github/workflows/diff.yml @@ -0,0 +1,73 @@ +name: Diff +on: + issue_comment: + types: [created] + +jobs: + generate: + runs-on: ubuntu-latest + outputs: + diffs: ${{ steps.regress-ci.outputs.diffs }} + if: ${{ github.event.issue.pull_request }} + steps: + - uses: actions/checkout@v4 + + - uses: dtolnay/rust-toolchain@master + with: + toolchain: stable + + - name: Cache + uses: Swatinem/rust-cache@v2 + + - run: cargo regress ci + id: regress-ci + env: + GITHUB_COMMENT: ${{ github.event.comment.body }} + GITHUB_COMMENT_PR: ${{ github.event.comment.issue_url }} + diff: + runs-on: ubuntu-latest + needs: [generate] + if: needs.generate.outputs.diffs != '{}' && needs.generate.outputs.diffs != '[]' && needs.generate.outputs.diffs != '' + strategy: + matrix: + include: ${{ fromJson(needs.generate.outputs.diffs) }} + steps: + - uses: actions/checkout@v4 + + - uses: dtolnay/rust-toolchain@master + with: + toolchain: stable + + - name: Cache + uses: Swatinem/rust-cache@v2 + with: + cache-on-failure: true + + - uses: taiki-e/install-action@v2 + if: matrix.needs_semver_checks + with: + tool: cargo-semver-checks + + - uses: taiki-e/install-action@v2 + with: + tool: git-delta + + - run: cargo regress diff ${{ matrix.command }} --use-pager-directly + env: + GH_TOKEN: ${{ github.token }} + GITHUB_PR: ${{ matrix.pr }} + GIT_PAGER: delta --hunk-header-style omit + summary: + runs-on: ubuntu-latest + needs: [diff] + if: always() + steps: + - uses: actions/checkout@v4 + + - run: | + PR_ID=$(echo "${{ github.event.comment.issue_url }}" | grep -o '[0-9]\+$') + gh run view ${{ github.run_id }} --json jobs | \ + jq -r '"Diff for [comment]("+$comment+")\n\n" + ([.jobs[] | select(.name | startswith("diff")) | "- [" + (.name | capture("\\((?[^,]+),.*") | .name) + "](" + .url + "?pr=" + $pr_id + "#step:7:45)"] | join("\n"))' --arg pr_id "$PR_ID" --arg comment "${{ github.event.comment.url }}"| \ + gh pr comment "$PR_ID" --body "$(< /dev/stdin)" + env: + GH_TOKEN: ${{ github.token }} diff --git a/Cargo.lock b/Cargo.lock index 16ba7348..74b0237e 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -2,6 +2,21 @@ # It is not intended for manual editing. version = 3 +[[package]] +name = "addr2line" +version = "0.21.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8a30b2e23b9e17a9f90641c7ab1549cd9b44f296d3ccbf309d2863cfe398a0cb" +dependencies = [ + "gimli", +] + +[[package]] +name = "adler" +version = "1.0.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f26201604c87b1e01bd3d98f8d5d9a8fcbb815e8cedb41ffccbeb4bf593a35fe" + [[package]] name = "aho-corasick" version = "1.1.2" @@ -77,6 +92,39 @@ version = "0.7.4" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "96d30a06541fbafbc7f82ed10c06164cfbd2c401138f6addd8404629c4b16711" +[[package]] +name = "autocfg" +version = "1.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa" + +[[package]] +name = "backtrace" +version = "0.3.69" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2089b7e3f35b9dd2d0ed921ead4f6d318c27680d4a5bd167b3ee120edb105837" +dependencies = [ + "addr2line", + "cc", + "cfg-if", + "libc", + "miniz_oxide", + "object", + "rustc-demangle", +] + +[[package]] +name = "base64" +version = "0.21.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "35636a1494ede3b646cc98f74f8e62c773a38a659ebc777a2cf26b9b74171df9" + +[[package]] +name = "bitflags" +version = "1.3.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a" + [[package]] name = "bitflags" version = "2.4.1" @@ -94,6 +142,33 @@ dependencies = [ "constant_time_eq", ] +[[package]] +name = "bumpalo" +version = "3.14.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7f30e7476521f6f8af1a1c4c0b8cc94f0bee37d91763d0ca2665f299b6cd8aec" + +[[package]] +name = "bytes" +version = "1.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a2bd12c1caf447e69cd4528f47f94d203fd2582878ecb9e9465484c4148a8223" + +[[package]] +name = "cc" +version = "1.0.83" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f1174fb0b6ec23863f8b971027804a42614e347eafb0a95bf0b12cdae21fc4d0" +dependencies = [ + "libc", +] + +[[package]] +name = "cfg-if" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" + [[package]] name = "clap" version = "4.4.10" @@ -101,6 +176,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "41fffed7514f420abec6d183b1d3acfd9099c79c3a10a06ade4f8203f1411272" dependencies = [ "clap_builder", + "clap_derive", ] [[package]] @@ -115,6 +191,18 @@ dependencies = [ "strsim", ] +[[package]] +name = "clap_derive" +version = "4.4.7" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cf9804afaaf59a91e75b022a30fb7229a7901f60c755489cc61c9b423b836442" +dependencies = [ + "heck", + "proc-macro2", + "quote", + "syn 2.0.39", +] + [[package]] name = "clap_lex" version = "0.6.0" @@ -133,6 +221,55 @@ version = "0.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "f7144d30dcf0fafbce74250a3963025d8d52177934239851c917d29f1df280c2" +[[package]] +name = "core-foundation" +version = "0.9.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "194a7a9e6de53fa55116934067c844d9d749312f75c6f6d0980e8c252f8c2146" +dependencies = [ + "core-foundation-sys", + "libc", +] + +[[package]] +name = "core-foundation-sys" +version = "0.8.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e496a50fda8aacccc86d7529e2c1e0892dbd0f898a6b5645b5561b89c3210efa" + +[[package]] +name = "crossbeam-deque" +version = "0.8.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ce6fd6f855243022dcecf8702fef0c297d4338e226845fe067f6341ad9fa0cef" +dependencies = [ + "cfg-if", + "crossbeam-epoch", + "crossbeam-utils", +] + +[[package]] +name = "crossbeam-epoch" +version = "0.9.15" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ae211234986c545741a7dc064309f67ee1e5ad243d0e48335adc0484d960bcc7" +dependencies = [ + "autocfg", + "cfg-if", + "crossbeam-utils", + "memoffset", + "scopeguard", +] + +[[package]] +name = "crossbeam-utils" +version = "0.8.16" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5a22b2d63d4d1dc0b7f1b6b2747dd0088008a9be28b6ddf0b1e7d335e3037294" +dependencies = [ + "cfg-if", +] + [[package]] name = "darling" version = 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"serde" version = "1.0.193" @@ -461,6 +1134,18 @@ dependencies = [ "serde", ] +[[package]] +name = "serde_urlencoded" +version = "0.7.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d3491c14715ca2294c4d6a88f15e84739788c1d030eed8c110436aafdaa2f3fd" +dependencies = [ + "form_urlencoded", + "itoa", + "ryu", + "serde", +] + [[package]] name = "serde_yaml" version = "0.9.27" @@ -474,6 +1159,50 @@ dependencies = [ "unsafe-libyaml", ] +[[package]] +name = "sharded-slab" +version = "0.1.7" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f40ca3c46823713e0d4209592e8d6e826aa57e928f09752619fc696c499637f6" +dependencies = [ + "lazy_static", +] + +[[package]] +name = "slab" +version = "0.4.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8f92a496fb766b417c996b9c5e57daf2f7ad3b0bebe1ccfca4856390e3d3bb67" +dependencies = [ + "autocfg", +] + +[[package]] +name = "smallvec" +version = "1.11.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4dccd0940a2dcdf68d092b8cbab7dc0ad8fa938bf95787e1b916b0e3d0e8e970" + +[[package]] +name = "socket2" +version = "0.4.10" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9f7916fc008ca5542385b89a3d3ce689953c143e9304a9bf8beec1de48994c0d" +dependencies = [ + "libc", + "winapi", +] + +[[package]] +name = "socket2" +version = "0.5.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7b5fac59a5cb5dd637972e5fca70daf0523c9067fcdc4842f053dae04a18f8e9" +dependencies = [ + "libc", + "windows-sys", +] + [[package]] name = "strsim" version = "0.10.0" @@ -527,6 +1256,26 @@ dependencies = [ "thiserror", ] +[[package]] +name = "svd2rust-regress" +version = "0.1.0" +dependencies = [ + "anyhow", + "clap", + "prettyplease", + "rayon", + "reqwest", + "serde", + "serde_json", + "svd2rust", + "syn 2.0.39", + "thiserror", + "tracing", + "tracing-subscriber", + "which", + "wildmatch", +] + [[package]] name = "syn" version = "1.0.109" @@ -549,6 +1298,40 @@ dependencies = [ "unicode-ident", ] +[[package]] +name = "system-configuration" +version = "0.5.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ba3a3adc5c275d719af8cb4272ea1c4a6d668a777f37e115f6d11ddbc1c8e0e7" +dependencies = [ + "bitflags 1.3.2", + "core-foundation", + "system-configuration-sys", +] + +[[package]] +name = "system-configuration-sys" +version = "0.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a75fb188eb626b924683e3b95e3a48e63551fcfb51949de2f06a9d91dbee93c9" +dependencies = [ + "core-foundation-sys", + "libc", +] + +[[package]] +name = "tempfile" +version = "3.8.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7ef1adac450ad7f4b3c28589471ade84f25f731a7a0fe30d71dfa9f60fd808e5" +dependencies = [ + "cfg-if", + "fastrand", + "redox_syscall", + "rustix", + "windows-sys", +] + [[package]] name = "termcolor" version = "1.4.0" @@ -578,6 +1361,71 @@ dependencies = [ "syn 2.0.39", ] +[[package]] +name = "thread_local" +version = "1.1.7" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3fdd6f064ccff2d6567adcb3873ca630700f00b5ad3f060c25b5dcfd9a4ce152" +dependencies = [ + "cfg-if", + "once_cell", +] + +[[package]] +name = "tinyvec" +version = "1.6.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "87cc5ceb3875bb20c2890005a4e226a4651264a5c75edb2421b52861a0a0cb50" +dependencies = [ + "tinyvec_macros", +] + +[[package]] +name = "tinyvec_macros" +version = "0.1.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1f3ccbac311fea05f86f61904b462b55fb3df8837a366dfc601a0161d0532f20" + +[[package]] +name = "tokio" +version = "1.34.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d0c014766411e834f7af5b8f4cf46257aab4036ca95e9d2c144a10f59ad6f5b9" +dependencies = [ + "backtrace", + "bytes", + "libc", + "mio", + "num_cpus", + "pin-project-lite", + "socket2 0.5.5", + "windows-sys", +] + +[[package]] +name = "tokio-native-tls" +version = "0.3.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "bbae76ab933c85776efabc971569dd6119c580d8f5d448769dec1764bf796ef2" +dependencies = [ + "native-tls", + "tokio", +] + +[[package]] +name = "tokio-util" +version = "0.7.10" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5419f34732d9eb6ee4c3578b7989078579b7f039cbbb9ca2c4da015749371e15" +dependencies = [ + "bytes", + "futures-core", + "futures-sink", + "pin-project-lite", + "tokio", + "tracing", +] + [[package]] name = "toml" version = "0.7.8" @@ -612,18 +1460,117 @@ dependencies = [ "winnow", ] +[[package]] +name = "tower-service" +version = "0.3.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b6bc1c9ce2b5135ac7f93c72918fc37feb872bdc6a5533a8b85eb4b86bfdae52" + +[[package]] +name = "tracing" +version = "0.1.40" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c3523ab5a71916ccf420eebdf5521fcef02141234bbc0b8a49f2fdc4544364ef" +dependencies = [ + "pin-project-lite", + "tracing-attributes", + "tracing-core", +] + +[[package]] +name = "tracing-attributes" +version = "0.1.27" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "34704c8d6ebcbc939824180af020566b01a7c01f80641264eba0999f6c2b6be7" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.39", +] + +[[package]] +name = "tracing-core" +version = "0.1.32" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c06d3da6113f116aaee68e4d601191614c9053067f9ab7f6edbcb161237daa54" +dependencies = [ + "once_cell", + "valuable", +] + +[[package]] +name = "tracing-log" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ee855f1f400bd0e5c02d150ae5de3840039a3f54b025156404e34c23c03f47c3" +dependencies = [ + "log", + "once_cell", + "tracing-core", +] + +[[package]] +name = "tracing-subscriber" +version = "0.3.18" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ad0f048c97dbd9faa9b7df56362b8ebcaa52adb06b498c050d2f4e32f90a7a8b" +dependencies = [ + "matchers", + "nu-ansi-term", + "once_cell", + "regex", + "sharded-slab", + "smallvec", + "thread_local", + "tracing", + "tracing-core", + "tracing-log", +] + +[[package]] +name = "try-lock" +version = "0.2.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3528ecfd12c466c6f163363caf2d02a71161dd5e1cc6ae7b34207ea2d42d81ed" + +[[package]] +name = "unicode-bidi" +version = "0.3.13" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "92888ba5573ff080736b3648696b70cafad7d250551175acbaa4e0385b3e1460" + [[package]] name = "unicode-ident" version = "1.0.12" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "3354b9ac3fae1ff6755cb6db53683adb661634f67557942dea4facebec0fee4b" +[[package]] +name = "unicode-normalization" +version = "0.1.22" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5c5713f0fc4b5db668a2ac63cdb7bb4469d8c9fed047b1d0292cc7b0ce2ba921" +dependencies = [ + "tinyvec", +] + [[package]] name = "unsafe-libyaml" version = "0.2.9" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "f28467d3e1d3c6586d8f25fa243f544f5800fec42d97032474e17222c2b75cfa" +[[package]] +name = "url" +version = "2.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "31e6302e3bb753d46e83516cae55ae196fc0c309407cf11ab35cc51a4c2a4633" +dependencies = [ + "form_urlencoded", + "idna", + "percent-encoding", +] + [[package]] name = "utf8-width" version = "0.1.7" @@ -636,6 +1583,128 @@ version = "0.2.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "711b9620af191e0cdc7468a8d14e709c3dcdb115b36f838e601583af800a370a" +[[package]] +name = "valuable" +version = "0.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "830b7e5d4d90034032940e4ace0d9a9a057e7a45cd94e6c007832e39edb82f6d" + +[[package]] +name = "vcpkg" +version = "0.2.15" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "accd4ea62f7bb7a82fe23066fb0957d48ef677f6eeb8215f372f52e48bb32426" + +[[package]] +name = "want" +version = "0.3.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "bfa7760aed19e106de2c7c0b581b509f2f25d3dacaf737cb82ac61bc6d760b0e" +dependencies = [ + "try-lock", +] + +[[package]] +name = "wasi" +version = "0.11.0+wasi-snapshot-preview1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9c8d87e72b64a3b4db28d11ce29237c246188f4f51057d65a7eab63b7987e423" + +[[package]] +name = "wasm-bindgen" +version = "0.2.89" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0ed0d4f68a3015cc185aff4db9506a015f4b96f95303897bfa23f846db54064e" +dependencies = [ + "cfg-if", + "wasm-bindgen-macro", +] + +[[package]] +name = "wasm-bindgen-backend" +version = "0.2.89" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1b56f625e64f3a1084ded111c4d5f477df9f8c92df113852fa5a374dbda78826" +dependencies = [ + "bumpalo", + "log", + "once_cell", + "proc-macro2", + "quote", + "syn 2.0.39", + "wasm-bindgen-shared", +] + +[[package]] +name = "wasm-bindgen-futures" +version = "0.4.39" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ac36a15a220124ac510204aec1c3e5db8a22ab06fd6706d881dc6149f8ed9a12" +dependencies = [ + "cfg-if", + "js-sys", + "wasm-bindgen", + "web-sys", +] + +[[package]] +name = "wasm-bindgen-macro" +version = "0.2.89" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0162dbf37223cd2afce98f3d0785506dcb8d266223983e4b5b525859e6e182b2" +dependencies = [ + "quote", + "wasm-bindgen-macro-support", +] + +[[package]] +name = "wasm-bindgen-macro-support" +version = "0.2.89" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f0eb82fcb7930ae6219a7ecfd55b217f5f0893484b7a13022ebb2b2bf20b5283" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.39", + "wasm-bindgen-backend", + "wasm-bindgen-shared", +] + +[[package]] +name = "wasm-bindgen-shared" +version = "0.2.89" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7ab9b36309365056cd639da3134bf87fa8f3d86008abf99e612384a6eecd459f" + +[[package]] +name = "web-sys" +version = "0.3.66" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "50c24a44ec86bb68fbecd1b3efed7e85ea5621b39b35ef2766b66cd984f8010f" +dependencies = [ + "js-sys", + "wasm-bindgen", +] + +[[package]] +name = "which" +version = "5.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9bf3ea8596f3a0dd5980b46430f2058dfe2c36a27ccfbb1845d6fbfcd9ba6e14" +dependencies = [ + "either", + "home", + "once_cell", + "rustix", + "windows-sys", +] + +[[package]] +name = "wildmatch" +version = "2.1.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ee583bdc5ff1cf9db20e9db5bb3ff4c3089a8f6b8b31aff265c9aba85812db86" + [[package]] name = "winapi" version = "0.3.9" @@ -808,6 +1877,16 @@ dependencies = [ "memchr", ] +[[package]] +name = "winreg" +version = "0.50.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "524e57b2c537c0f9b1e69f1965311ec12182b4122e45035b1508cd24d2adadb1" +dependencies = [ + "cfg-if", + "windows-sys", +] + [[package]] name = "xmlparser" version = "0.13.6" diff --git a/ci/svd2rust-regress/Cargo.toml b/ci/svd2rust-regress/Cargo.toml index 3d36943c..7f7ea214 100644 --- a/ci/svd2rust-regress/Cargo.toml +++ b/ci/svd2rust-regress/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" authors = ["James Munns ", "The svd2rust developers"] [dependencies] -clap = { version = "4.1", features = ["color", "derive", "string"] } +clap = { version = "4.1", features = ["color", "derive", "string", "env"] } svd2rust = { path = "../../" } reqwest = { version = "0.11", features= ["blocking"] } rayon = "1.4" @@ -15,3 +15,7 @@ serde = "1" serde_json = "1" prettyplease = "0.2" syn = "2" +wildmatch = "2.1.1" +which = "5.0.0" +tracing = "0.1.40" +tracing-subscriber = { version = "0.3.18", features = ["env-filter", "fmt"] } diff --git a/ci/svd2rust-regress/src/ci.rs b/ci/svd2rust-regress/src/ci.rs new file mode 100644 index 00000000..e8c4d2b1 --- /dev/null +++ b/ci/svd2rust-regress/src/ci.rs @@ -0,0 +1,43 @@ +use crate::Opts; + +#[derive(clap::Parser, Debug)] +#[clap(name = "continuous-integration")] +pub struct Ci { + #[clap(long)] + pub format: bool, + /// Enable splitting `lib.rs` with `form` + #[clap(long)] + pub form_lib: bool, + #[clap(env = "GITHUB_COMMENT")] + pub comment: String, + #[clap(env = "GITHUB_COMMENT_PR")] + pub comment_pr: String, +} + +#[derive(serde::Serialize)] +struct Diff { + command: String, + needs_semver_checks: bool, + pr: usize, +} + +impl Ci { + pub fn run(&self, _opts: &Opts) -> Result<(), anyhow::Error> { + let mut diffs = vec![]; + for line in self.comment.lines() { + let Some(command) = line.strip_prefix("/ci diff ") else { + continue; + }; + + diffs.push(Diff { + needs_semver_checks: command.contains("semver"), + command: command.to_owned(), + pr: self.comment_pr.split('/').last().unwrap().parse()?, + }); + } + let json = serde_json::to_string(&diffs)?; + crate::gha_print(&json); + crate::gha_output("diffs", &json)?; + Ok(()) + } +} diff --git a/ci/svd2rust-regress/src/command.rs b/ci/svd2rust-regress/src/command.rs new file mode 100644 index 00000000..77291bd0 --- /dev/null +++ b/ci/svd2rust-regress/src/command.rs @@ -0,0 +1,73 @@ +use std::process::Command; + +use anyhow::Context; + +pub trait CommandExt { + #[track_caller] + fn run(&mut self, hide: bool) -> Result<(), anyhow::Error>; + + #[track_caller] + fn get_output(&mut self) -> Result; + + #[track_caller] + fn get_output_string(&mut self) -> Result; + + fn display(&self) -> String; +} + +impl CommandExt for Command { + #[track_caller] + fn run(&mut self, hide: bool) -> Result<(), anyhow::Error> { + if hide { + self.stdout(std::process::Stdio::null()) + .stdin(std::process::Stdio::null()); + } + let status = self + .status() + .with_context(|| format!("fail! {}", self.display()))?; + if status.success() { + Ok(()) + } else { + anyhow::bail!("command `{}` failed", self.display()) + } + } + + #[track_caller] + fn get_output(&mut self) -> Result { + let output = self.output().with_context(|| { + format!( + "command `{}{}` couldn't be run", + self.get_current_dir() + .map(|d| format!("{} ", d.display())) + .unwrap_or_default(), + self.display() + ) + })?; + if output.status.success() { + Ok(output) + } else { + anyhow::bail!( + "command `{}` failed: stdout: {}\nstderr: {}", + self.display(), + String::from_utf8_lossy(&output.stdout), + String::from_utf8_lossy(&output.stderr), + ) + } + } + + #[track_caller] + fn get_output_string(&mut self) -> Result { + String::from_utf8(self.get_output()?.stdout).map_err(Into::into) + } + + fn display(&self) -> String { + format!( + "{} {}", + self.get_program().to_string_lossy(), + self.get_args() + .map(|s| s.to_string_lossy()) + .collect::>() + .join(" ") + ) + } +} diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs new file mode 100644 index 00000000..0a79f1a5 --- /dev/null +++ b/ci/svd2rust-regress/src/diff.rs @@ -0,0 +1,294 @@ +use std::path::PathBuf; + +use anyhow::Context; + +use crate::github; +use crate::Opts; + +#[derive(clap::Parser, Debug)] +#[clap(name = "diff")] +pub struct Diffing { + /// The base version of svd2rust to use and the command input, defaults to latest master build + /// + /// Change the base version by starting with `@` followed by the source. + /// + /// supports `@pr` for current pr, `@master` for latest master build, or a version tag like `@v0.30.0` + #[clap(global = true, long, alias = "base")] + pub baseline: Option, + + #[clap(global = true, long, alias = "head")] + pub current: Option, + + /// Enable formatting with `rustfmt` + #[clap(global = true, short = 'f', long)] + pub format: bool, + + /// Enable splitting `lib.rs` with `form` + #[clap(global = true, long)] + pub form_split: bool, + + #[clap(subcommand)] + pub sub: Option, + + #[clap(long, short = 'c')] + pub chip: Vec, + + /// Filter by manufacturer, case sensitive, may be combined with other filters + #[clap( + short = 'm', + long = "manufacturer", + ignore_case = true, + value_parser = crate::manufacturers(), + )] + pub mfgr: Option, + + /// Filter by architecture, case sensitive, may be combined with other filters + #[clap( + short = 'a', + long = "architecture", + ignore_case = true, + value_parser = crate::architectures(), + )] + pub arch: Option, + + #[clap(global = true, long)] + pub diff_folder: Option, + + #[clap(hide = true, env = "GITHUB_PR")] + pub pr: Option, + + #[clap(env = "GIT_PAGER", long)] + pub pager: Option, + + /// if set, will use pager directly instead of `git -c core.pager` + #[clap(long, short = 'P')] + pub use_pager_directly: bool, + + #[clap(last = true)] + pub args: Option, +} + +#[derive(clap::Parser, Debug, Clone, Copy)] +pub enum DiffingMode { + Semver, + Diff, +} + +type Source<'s> = Option<&'s str>; +type Command<'s> = Option<&'s str>; + +impl Diffing { + pub fn run(&self, opts: &Opts) -> Result<(), anyhow::Error> { + let [baseline, current] = self + .make_case(opts) + .with_context(|| "couldn't setup test case")?; + match self.sub.unwrap_or(DiffingMode::Diff) { + DiffingMode::Diff => { + let mut command; + if let Some(pager) = &self.pager { + if self.use_pager_directly { + let mut pager = pager.split_whitespace(); + command = std::process::Command::new(pager.next().unwrap()); + command.args(pager); + } else { + command = std::process::Command::new("git"); + command.env("GIT_PAGER", pager); + } + } else { + command = std::process::Command::new("git"); + command.arg("--no-pager"); + } + if !self.use_pager_directly { + command.args(["diff", "--no-index", "--minimal"]); + } + command + .args([&*baseline.0, &*current.0]) + .status() + .with_context(|| "couldn't run diff") + .map(|_| ()) + } + DiffingMode::Semver => std::process::Command::new("cargo") + .args(["semver-checks", "check-release"]) + .arg("--baseline-root") + .arg(baseline.0) + .arg("--manifest-path") + .arg(current.0.join("Cargo.toml")) + .status() + .with_context(|| "couldn't run semver-checks") + .map(|_| ()), + } + } + + pub fn make_case(&self, opts: &Opts) -> Result<[(PathBuf, Vec); 2], anyhow::Error> { + let [(baseline_bin, baseline_cmd), (current_bin, current_cmd)] = self + .svd2rust_setup(opts) + .with_context(|| "couldn't setup svd2rust")?; + let tests = crate::tests::tests(Some(opts.test_cases.as_ref())) + .with_context(|| "no tests found")?; + + let tests = tests + .iter() + .filter(|t| { + if let Some(ref arch) = self.arch { + arch.to_ascii_lowercase() + .eq_ignore_ascii_case(&t.arch.to_string()) + } else { + true + } + }) + // selected manufacturer? + .filter(|t| { + if let Some(ref mfgr) = self.mfgr { + mfgr.to_ascii_lowercase() + .eq_ignore_ascii_case(&t.mfgr.to_string().to_ascii_lowercase()) + } else { + true + } + }) + .filter(|t| { + if !self.chip.is_empty() { + self.chip.iter().any(|c| { + wildmatch::WildMatch::new(&c.to_ascii_lowercase()) + .matches(&t.chip.to_ascii_lowercase()) + }) + } else { + false + } + }) + .collect::>(); + if tests.len() != 1 { + let error = anyhow::anyhow!("diff requires exactly one test case"); + if tests.is_empty() { + return Err(error.context("matched no tests")); + } else if tests.len() > 10 { + return Err(error.context(format!("matched multiple ({}) tests", tests.len()))); + } + return Err(error.context(format!( + "matched multiple ({}) tests\n{:?}", + tests.len(), + tests.iter().map(|t| t.name()).collect::>() + ))); + } + + let baseline = tests[0] + .setup_case( + &opts.output_dir.join("baseline"), + &baseline_bin, + baseline_cmd, + ) + .with_context(|| "couldn't create head")?; + let current = tests[0] + .setup_case(&opts.output_dir.join("current"), ¤t_bin, current_cmd) + .with_context(|| "couldn't create base")?; + + Ok([baseline, current]) + } + + fn get_source_and_command<'s>(&'s self) -> [Option<(Source, Command)>; 2] { + let split = |s: &'s str| -> (Source, Command) { + if let Some(s) = s.strip_prefix('@') { + if let Some((source, cmd)) = s.split_once(' ') { + (Some(source), Some(cmd.trim())) + } else { + (Some(s), None) + } + } else { + (None, Some(s.trim())) + } + }; + + let baseline = self.baseline.as_deref().map(split); + + let current = self.current.as_deref().map(split); + [baseline, current] + } + + pub fn svd2rust_setup(&self, opts: &Opts) -> Result<[(PathBuf, Command); 2], anyhow::Error> { + // FIXME: refactor this to be less ugly + let [baseline_sc, current_sc] = self.get_source_and_command(); + let baseline = match baseline_sc.and_then(|(source, _)| source) { + reference @ None | reference @ Some("" | "master") => { + github::get_release_binary_artifact(reference.unwrap_or("master"), &opts.output_dir) + .with_context(|| "couldn't get svd2rust latest unreleased artifact")? + } + Some("pr") if self.pr.is_none() => { + let (number, sha) = + github::get_current_pr().with_context(|| "couldn't get current pr")?; + github::get_pr_binary_artifact(number, &sha, &opts.output_dir) + .with_context(|| "couldn't get pr artifact")? + } + Some("pr") => { + let (number, sha) = + github::get_pr(self.pr.unwrap()).with_context(|| "couldn't get current pr")?; + github::get_pr_binary_artifact(number, &sha, &opts.output_dir) + .with_context(|| "couldn't get pr artifact")? + } + Some("debug") => crate::get_cargo_metadata() + .target_directory + .join(format!("debug/svd2rust{}", std::env::consts::EXE_SUFFIX)), + Some("release") => crate::get_cargo_metadata() + .target_directory + .join(format!("release/svd2rust{}", std::env::consts::EXE_SUFFIX)), + Some(reference) => github::get_release_binary_artifact(reference, &opts.output_dir) + .with_context(|| format!("could not get svd2rust for {reference}"))?, + }; + + let current = match current_sc.and_then(|(source, _)| source) { + None | Some("" | "pr") if self.pr.is_none() => { + let (number, sha) = + github::get_current_pr().with_context(|| "couldn't get current pr")?; + github::get_pr_binary_artifact(number, &sha, &opts.output_dir) + .with_context(|| "couldn't get pr artifact")? + } + None | Some("" | "pr") => { + let (number, sha) = + github::get_pr(self.pr.unwrap()).with_context(|| "couldn't get current pr")?; + github::get_pr_binary_artifact(number, &sha, &opts.output_dir) + .with_context(|| "couldn't get pr artifact")? + } + Some("debug") => crate::get_cargo_metadata() + .target_directory + .join(format!("debug/svd2rust{}", std::env::consts::EXE_SUFFIX)), + Some("release") => crate::get_cargo_metadata() + .target_directory + .join(format!("release/svd2rust{}", std::env::consts::EXE_SUFFIX)), + Some(reference) => github::get_release_binary_artifact(reference, &opts.output_dir) + .with_context(|| format!("could not get svd2rust for {reference}"))?, + }; + + Ok([ + ( + baseline.canonicalize()?, + baseline_sc.and_then(|(_, cmd)| cmd), + ), + (current.canonicalize()?, current_sc.and_then(|(_, cmd)| cmd)), + ]) + } +} + +#[cfg(test)] +#[test] +pub fn diffing_cli_works() { + use clap::Parser; + + Diffing::parse_from(["diff", "pr"]); + Diffing::parse_from(["diff", "--base", "", "--head", "\"--atomics\""]); + Diffing::parse_from(["diff", "--base", "\"@master\"", "--head", "\"@pr\""]); + Diffing::parse_from([ + "diff", + "--base", + "\"@master\"", + "--head", + "\"@pr\"", + "--chip", + "STM32F401", + ]); + Diffing::parse_from([ + "diff", + "--base", + "\"@master\"", + "--head", + "\"@pr --atomics\"", + ]); + Diffing::parse_from(["diff", "--head", "\"--atomics\""]); +} diff --git a/ci/svd2rust-regress/src/github.rs b/ci/svd2rust-regress/src/github.rs index 2f0bf222..996d6e87 100644 --- a/ci/svd2rust-regress/src/github.rs +++ b/ci/svd2rust-regress/src/github.rs @@ -1,9 +1,11 @@ -use std::process::{Command, Output}; +use std::process::Command; use std::{ffi::OsStr, path::Path}; use std::{iter::IntoIterator, path::PathBuf}; use anyhow::Context; +use crate::command::CommandExt; + pub fn run_gh(args: I) -> Command where I: IntoIterator, @@ -14,34 +16,54 @@ where command } -pub fn get_current_pr() -> Result { - let pr = run_gh([ - "pr", - "view", - "--json", - "number", - "--template", - "{{.number}}", - ]) - .output()?; - String::from_utf8(pr.stdout)? - .trim() - .parse() - .map_err(Into::into) +pub fn get_current_pr() -> Result<(usize, String), anyhow::Error> { + #[derive(serde::Deserialize)] + struct Pr { + number: usize, + #[serde(rename = "headRefOid")] + head_ref_oid: String, + } + let pr = run_gh(["pr", "view", "--json", "headRefOid,number"]).get_output_string()?; + let Pr { + number, + head_ref_oid, + } = serde_json::from_str(&pr)?; + + Ok((number, head_ref_oid)) +} + +pub fn get_pr(pr: usize) -> Result<(usize, String), anyhow::Error> { + #[derive(serde::Deserialize)] + struct Pr { + number: usize, + #[serde(rename = "headRefOid")] + head_ref_oid: String, + } + let pr = run_gh(["pr", "view", &pr.to_string(), "--json", "headRefOid,number"]) + .get_output_string()?; + let Pr { + number, + head_ref_oid, + } = serde_json::from_str(&pr)?; + + Ok((number, head_ref_oid)) } -pub fn get_pr_run_id(pr: usize) -> Result { +pub fn get_sha_run_id(sha: &str) -> Result { let run_id = run_gh([ "api", - &format!("repos/:owner/:repo/actions/runs?event=pull_request&pr={pr}"), + &format!("repos/:owner/:repo/actions/runs?event=pull_request&head_sha={sha}"), "--jq", r#"[.workflow_runs[] | select(.name == "Continuous integration")][0] | .id"#, ]) - .output()?; - String::from_utf8(run_id.stdout)? + .get_output_string()?; + if run_id.trim().is_empty() { + anyhow::bail!("no run id found for sha `{}`", sha); + } + run_id .trim() .parse() - .map_err(Into::into) + .with_context(|| anyhow::anyhow!("couldn't parse api output: {run_id}")) } pub fn get_release_run_id(event: &str) -> Result { @@ -49,26 +71,30 @@ pub fn get_release_run_id(event: &str) -> Result { "master" => "branch=master".to_owned(), _ => anyhow::bail!("unknown event"), }; - let run_id = dbg!(run_gh([ + let run_id = run_gh([ "api", &format!("repos/:owner/:repo/actions/runs?{query}"), "--jq", r#"[.workflow_runs[] | select(.name == "release")][0] | .id"#, ]) - .output()) - .with_context(|| "couldn't run gh")?; - String::from_utf8(run_id.stdout)? - .trim() - .parse() - .map_err(Into::into) + .get_output_string()?; + run_id.trim().parse().map_err(Into::into) } -fn find(dir: &Path, begins: &str) -> Result, anyhow::Error> { +fn find_executable(dir: &Path, begins: &str) -> Result, anyhow::Error> { let find = |entry, begins: &str| -> Result, std::io::Error> { let entry: std::fs::DirEntry = entry?; let filename = entry.file_name(); let filename = filename.to_string_lossy(); - if entry.metadata()?.is_file() && filename.starts_with(begins) { + if entry.metadata()?.is_file() + && filename.starts_with(begins) + && (entry.path().extension().is_none() + || entry + .path() + .extension() + .is_some_and(|s| s == std::env::consts::EXE_EXTENSION)) + && !entry.path().extension().is_some_and(|s| s == "gz") + { Ok(Some(entry.path())) } else { Ok(None) @@ -85,10 +111,7 @@ pub fn get_release_binary_artifact( reference: &str, output_dir: &Path, ) -> Result { - let output_dir = output_dir.join(reference); - if let Some(binary) = find(&output_dir, "svd2rust")? { - return Ok(binary); - } + let output_dir = output_dir.join(".binary").join(reference); match reference { reference if reference.starts_with('v') || matches!(reference, "master" | "latest") => { @@ -99,27 +122,38 @@ pub fn get_release_binary_artifact( } else { Some(reference) }; - run_gh([ - "release", - "download", - "--pattern", - "svd2rust-x86_64-unknown-linux-gnu.gz", - "--dir", - ]) - .arg(&output_dir) - .args(tag) - .status()?; - Command::new("tar") - .arg("-xzf") - .arg(output_dir.join("svd2rust-x86_64-unknown-linux-gnu.gz")) - .arg("-C") + let artifact = if cfg!(target_os = "linux") && cfg!(target_arch = "x86_64") { + "svd2rust-x86_64-unknown-linux-gnu.gz" + } else if cfg!(target_os = "linux") && cfg!(target_arch = "aarch64") { + "svd2rust-aarch64-unknown-linux-gnu.gz" + } else if cfg!(windows) { + "svd2rust-x86_64-pc-windows-msvc.exe" + } else if cfg!(target_os = "macos") && cfg!(target_arch = "x86_64") { + "svd2rust-x86_64-apple-darwin.gz" + } else if cfg!(target_os = "macos") && cfg!(target_arch = "aarch64") { + "svd2rust-aarch64-apple-darwin.gz" + } else { + anyhow::bail!("regress with release artifact doesn't support current platform") + }; + + std::fs::remove_dir_all(&output_dir).ok(); + + run_gh(["release", "download", "--pattern", artifact, "--dir"]) .arg(&output_dir) - .output() - .expect("Failed to execute command"); + .args(tag) + .run(true)?; + + if cfg!(target_os = "linux") || cfg!(target_os = "macos") { + Command::new("gzip") + .arg("-d") + .arg(output_dir.join(artifact)) + .get_output()?; + } } _ => { - let run_id = get_release_run_id(reference)?; + let run_id = + get_release_run_id(reference).with_context(|| "couldn't get release run id")?; run_gh([ "run", "download", @@ -129,41 +163,68 @@ pub fn get_release_binary_artifact( "--dir", ]) .arg(&output_dir) - .output()?; + .run(true)?; } } - let binary = find(&output_dir, "svd2rust")?; - binary.ok_or_else(|| anyhow::anyhow!("no binary found")) + let binary = + find_executable(&output_dir, "svd2rust").with_context(|| "couldn't find svd2rust")?; + let binary = binary.ok_or_else(|| anyhow::anyhow!("no binary found"))?; + + #[cfg(unix)] + { + use std::os::unix::fs::PermissionsExt; + std::fs::set_permissions(&binary, std::fs::Permissions::from_mode(0o755))?; + } + + Ok(binary) } -pub fn get_pr_binary_artifact(pr: usize, output_dir: &Path) -> Result { - let output_dir = output_dir.join(format!("{pr}")); - let run_id = get_pr_run_id(pr)?; +pub fn get_pr_binary_artifact( + pr: usize, + sha: &str, + output_dir: &Path, +) -> Result { + let output_dir = output_dir.join(".binary").join(pr.to_string()).join(sha); + + if let Some(binary) = find_executable(&output_dir, "svd2rust").unwrap_or_default() { + return Ok(binary); + } + + let target = if cfg!(target_os = "linux") && cfg!(target_arch = "x86_64") { + "x86_64-unknown-linux-gnu" + } else if cfg!(target_os = "linux") && cfg!(target_arch = "aarch64") { + "aarch64-unknown-linux-gnu" + } else if cfg!(windows) { + "x86_64-pc-windows-msvc" + } else if cfg!(target_os = "macos") && cfg!(target_arch = "x86_64") { + "x86_64-apple-darwin" + } else if cfg!(target_os = "macos") && cfg!(target_arch = "aarch64") { + "aarch64-apple-darwin" + } else { + anyhow::bail!("regress with pr artifact doesn't support current platform"); + }; + + let run_id = get_sha_run_id(sha).context("when getting run id")?; run_gh([ "run", "download", &run_id.to_string(), "-n", - "artifact-svd2rust-x86_64-unknown-linux-gnu", + &format!("artifact-svd2rust-{}", target), "--dir", ]) .arg(&output_dir) - .output()?; - let mut read_dir = std::fs::read_dir(output_dir)?; - let binary = read_dir - .find_map(|entry| { - let find = |entry| -> Result, std::io::Error> { - let entry: std::fs::DirEntry = entry?; - let filename = entry.file_name(); - let filename = filename.to_string_lossy(); - if entry.metadata()?.is_file() && filename.starts_with("svd2rust-regress") { - Ok(Some(entry.path())) - } else { - Ok(None) - } - }; - find(entry).transpose() - }) - .transpose()?; - binary.ok_or_else(|| anyhow::anyhow!("no binary found")) + .run(true)?; + + let binary = + find_executable(&output_dir, "svd2rust").with_context(|| "couldn't find svd2rust")?; + let binary = binary.ok_or_else(|| anyhow::anyhow!("no binary found"))?; + + #[cfg(unix)] + { + use std::os::unix::fs::PermissionsExt; + std::fs::set_permissions(&binary, std::fs::Permissions::from_mode(0o755))?; + } + + Ok(binary) } diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index b53718dc..0c820965 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -1,6 +1,14 @@ +pub mod ci; +pub mod command; +pub mod diff; +pub mod github; mod svd_test; mod tests; +use anyhow::Context; +use ci::Ci; +use diff::Diffing; + use clap::Parser; use rayon::prelude::*; use std::fs::File; @@ -9,14 +17,20 @@ use std::path::PathBuf; use std::process::{exit, Command}; use std::sync::atomic::{AtomicBool, Ordering}; use std::time::Instant; +use wildmatch::WildMatch; -/// Returns the cargo workspace for the manifest -pub fn get_cargo_workspace() -> &'static std::path::Path { - static WORKSPACE: std::sync::OnceLock = std::sync::OnceLock::new(); - #[derive(Debug, serde::Deserialize)] - pub struct CargoMetadata { - pub workspace_root: PathBuf, - } +#[derive(Debug, serde::Deserialize)] +pub struct CargoMetadata { + workspace_root: PathBuf, + target_directory: PathBuf, +} + +static RUSTFMT: std::sync::OnceLock = std::sync::OnceLock::new(); +static FORM: std::sync::OnceLock = std::sync::OnceLock::new(); + +/// Returns the cargo metadata +pub fn get_cargo_metadata() -> &'static CargoMetadata { + static WORKSPACE: std::sync::OnceLock = std::sync::OnceLock::new(); WORKSPACE.get_or_init(|| { std::process::Command::new("cargo") .args(["metadata", "--format-version", "1"]) @@ -26,22 +40,20 @@ pub fn get_cargo_workspace() -> &'static std::path::Path { .map_err(anyhow::Error::from) .and_then(|s: String| serde_json::from_str::(&s).map_err(Into::into)) .unwrap() - .workspace_root }) } +/// Returns the cargo workspace for the manifest +pub fn get_cargo_workspace() -> &'static std::path::Path { + &get_cargo_metadata().workspace_root +} + #[derive(clap::Parser, Debug)] -#[command(name = "svd2rust-regress")] -pub struct Tests { +pub struct TestOpts { /// Run a long test (it's very long) #[clap(short = 'l', long)] pub long_test: bool, - // TODO: Consider using the same strategy cargo uses for passing args to rustc via `--` - /// Run svd2rust with `--atomics` - #[clap(long)] - pub atomics: bool, - /// Filter by chip name, case sensitive, may be combined with other filters #[clap(short = 'c', long)] pub chip: Vec, @@ -50,16 +62,17 @@ pub struct Tests { #[clap( short = 'm', long = "manufacturer", - value_parser = validate_manufacturer, + ignore_case = true, + value_parser = manufacturers(), )] pub mfgr: Option, /// Filter by architecture, case sensitive, may be combined with other filters - /// Options are: "CortexM", "RiscV", "Msp430", "Mips" and "XtensaLX" #[clap( short = 'a', long = "architecture", - value_parser = validate_architecture, + ignore_case = true, + value_parser = architectures(), )] pub arch: Option, @@ -71,20 +84,27 @@ pub struct Tests { #[clap(short = 'f', long)] pub format: bool, + #[clap(long)] + /// Enable splitting `lib.rs` with `form` + pub form_lib: bool, + /// Print all available test using the specified filters #[clap(long)] pub list: bool, + + /// Path to an `svd2rust` binary, relative or absolute. + /// Defaults to `target/release/svd2rust[.exe]` of this repository + /// (which must be already built) + #[clap(short = 'p', long = "svd2rust-path", default_value = default_svd2rust())] + pub current_bin_path: PathBuf, + #[clap(last = true)] + pub command: Option, // TODO: Specify smaller subset of tests? Maybe with tags? // TODO: Compile svd2rust? } -impl Tests { - fn run( - &self, - opt: &Opts, - bin_path: &PathBuf, - rustfmt_bin_path: Option<&PathBuf>, - ) -> Result, anyhow::Error> { +impl TestOpts { + fn run(&self, opt: &Opts) -> Result<(), anyhow::Error> { let tests = tests::tests(None)? .iter() // Short test? @@ -92,7 +112,8 @@ impl Tests { // selected architecture? .filter(|t| { if let Some(ref arch) = self.arch { - arch == &format!("{:?}", t.arch) + arch.to_ascii_lowercase() + .eq_ignore_ascii_case(&t.arch.to_string()) } else { true } @@ -100,7 +121,8 @@ impl Tests { // selected manufacturer? .filter(|t| { if let Some(ref mfgr) = self.mfgr { - mfgr == &format!("{:?}", t.mfgr) + mfgr.to_ascii_lowercase() + .eq_ignore_ascii_case(&t.mfgr.to_string().to_ascii_lowercase()) } else { true } @@ -108,41 +130,42 @@ impl Tests { // Specify chip - note: may match multiple .filter(|t| { if !self.chip.is_empty() { - self.chip.iter().any(|c| c == &t.chip) + self.chip.iter().any(|c| WildMatch::new(c).matches(&t.chip)) } else { - true + // Don't run failable tests unless wanted + self.bad_tests || t.should_pass } }) - // Run failable tests? - .filter(|t| self.bad_tests || t.should_pass) .collect::>(); if self.list { // FIXME: Prettier output - eprintln!("{:?}", tests.iter().map(|t| t.name()).collect::>()); + println!("{:?}", tests.iter().map(|t| t.name()).collect::>()); exit(0); } if tests.is_empty() { - eprintln!("No tests run, you might want to use `--bad-tests` and/or `--long-test`"); + tracing::error!( + "No tests run, you might want to use `--bad-tests` and/or `--long-test`" + ); } let any_fails = AtomicBool::new(false); tests.par_iter().for_each(|t| { let start = Instant::now(); - match t.test(bin_path, rustfmt_bin_path, self.atomics, opt.verbose) { + match t.test(opt, self) { Ok(s) => { if let Some(stderrs) = s { let mut buf = String::new(); for stderr in stderrs { read_file(&stderr, &mut buf); } - eprintln!( + tracing::info!( "Passed: {} - {} seconds\n{}", t.name(), start.elapsed().as_secs(), buf ); } else { - eprintln!( + tracing::info!( "Passed: {} - {} seconds", t.name(), start.elapsed().as_secs() @@ -172,7 +195,7 @@ impl Tests { } else { "".into() }; - eprintln!( + tracing::error!( "Failed: {} - {} seconds. {:?}{}", t.name(), start.elapsed().as_secs(), @@ -192,7 +215,9 @@ impl Tests { #[derive(clap::Subcommand, Debug)] pub enum Subcommand { - Tests(Tests), + Diff(Diffing), + Tests(TestOpts), + Ci(Ci), } #[derive(Parser, Debug)] @@ -202,17 +227,16 @@ pub struct Opts { #[clap(global = true, long, short = 'v', action = clap::ArgAction::Count)] pub verbose: u8, - /// Path to an `svd2rust` binary, relative or absolute. - /// Defaults to `target/release/svd2rust[.exe]` of this repository - /// (which must be already built) - #[clap(global = true, short = 'p', long = "svd2rust-path", default_value = default_svd2rust())] - pub bin_path: PathBuf, - /// Path to an `rustfmt` binary, relative or absolute. /// Defaults to `$(rustup which rustfmt)` #[clap(global = true, long)] pub rustfmt_bin_path: Option, + /// Path to a `form` binary, relative or absolute. + /// Defaults to `form` + #[clap(global = true, long)] + pub form_bin_path: Option, + /// Specify what rustup toolchain to use when compiling chip(s) #[clap(global = true, long = "toolchain")] // , env = "RUSTUP_TOOLCHAIN" pub rustup_toolchain: Option, @@ -221,13 +245,30 @@ pub struct Opts { #[clap(global = true, long, default_value = default_test_cases())] pub test_cases: std::path::PathBuf, + #[clap(global = true, long, short, default_value = "output")] + pub output_dir: std::path::PathBuf, + #[clap(subcommand)] subcommand: Subcommand, } + impl Opts { fn use_rustfmt(&self) -> bool { match self.subcommand { - Subcommand::Tests(Tests { format, .. }) => format, + Subcommand::Tests(TestOpts { format, .. }) => format, + Subcommand::Diff(Diffing { format, .. }) => format, + Subcommand::Ci(Ci { format, .. }) => format, + } + } + + fn use_form(&self) -> bool { + match self.subcommand { + Subcommand::Tests(TestOpts { form_lib, .. }) => form_lib, + Subcommand::Diff(Diffing { + form_split: form_lib, + .. + }) => form_lib, + Subcommand::Ci(Ci { form_lib, .. }) => form_lib, } } } @@ -248,30 +289,25 @@ fn default_test_cases() -> std::ffi::OsString { fn default_svd2rust() -> std::ffi::OsString { get_cargo_workspace() - .join("target/release/svd2rust") + .join(format!( + "target/release/svd2rust{}", + std::env::consts::EXE_SUFFIX, + )) .into_os_string() } -fn validate_architecture(s: &str) -> Result<(), anyhow::Error> { - if tests::tests(None)? +fn architectures() -> Vec { + svd2rust::Target::all() .iter() - .any(|t| format!("{:?}", t.arch) == s) - { - Ok(()) - } else { - anyhow::bail!("Architecture `{s}` is not a valid value") - } + .map(|arch| clap::builder::PossibleValue::new(arch.to_string())) + .collect() } -fn validate_manufacturer(s: &str) -> Result<(), anyhow::Error> { - if tests::tests(None)? +fn manufacturers() -> Vec { + tests::Manufacturer::all() .iter() - .any(|t| format!("{:?}", t.mfgr) == s) - { - Ok(()) - } else { - anyhow::bail!("Manufacturer `{s}` is not a valid value") - } + .map(|mfgr| clap::builder::PossibleValue::new(mfgr.to_string())) + .collect() } /// Validate any assumptions made by this program @@ -286,7 +322,7 @@ fn validate_tests(tests: &[tests::TestCase]) { let name = t.name(); if !uniq.insert(name.clone()) { fail = true; - eprintln!("{} is not unique!", name); + tracing::info!("{} is not unique!", name); } } @@ -309,12 +345,18 @@ fn read_file(path: &PathBuf, buf: &mut String) { fn main() -> Result<(), anyhow::Error> { let opt = Opts::parse(); + tracing_subscriber::fmt() + .pretty() + .with_target(false) + .with_env_filter( + tracing_subscriber::EnvFilter::builder() + .with_default_directive(tracing::level_filters::LevelFilter::INFO.into()) + .from_env_lossy(), + ) + .init(); // Validate all test pre-conditions - validate_tests(tests::tests(Some(&opt))?); - - let bin_path = &opt.bin_path; - anyhow::ensure!(bin_path.exists(), "svd2rust binary does not exist"); + validate_tests(tests::tests(Some(&opt.test_cases))?); let default_rustfmt: Option = if let Some((v, true)) = Command::new("rustup") .args(["which", "rustfmt"]) @@ -327,17 +369,32 @@ fn main() -> Result<(), anyhow::Error> { None }; - let rustfmt_bin_path = match (&opt.rustfmt_bin_path, opt.use_rustfmt()) { - (_, false) => None, - (Some(path), true) => Some(path), + match (&opt.rustfmt_bin_path, opt.use_rustfmt()) { + (_, false) => {} + (Some(path), true) => { + RUSTFMT.get_or_init(|| path.clone()); + } (&None, true) => { // FIXME: Use Option::filter instead when stable, rust-lang/rust#45860 if !default_rustfmt.iter().any(|p| p.is_file()) { panic!("No rustfmt found"); } - default_rustfmt.as_ref() + if let Some(default_rustfmt) = default_rustfmt { + RUSTFMT.get_or_init(|| default_rustfmt); + } } }; + match (&opt.form_bin_path, opt.use_form()) { + (_, false) => {} + (Some(path), true) => { + FORM.get_or_init(|| path.clone()); + } + (&None, true) => { + if let Ok(form) = which::which("form") { + FORM.get_or_init(|| form); + } + } + } // Set RUSTUP_TOOLCHAIN if needed if let Some(toolchain) = &opt.rustup_toolchain { @@ -345,6 +402,52 @@ fn main() -> Result<(), anyhow::Error> { } match &opt.subcommand { - Subcommand::Tests(tests_opts) => tests_opts.run(&opt, bin_path, rustfmt_bin_path)?, + Subcommand::Tests(test_opts) => { + anyhow::ensure!( + test_opts.current_bin_path.exists(), + "svd2rust binary does not exist" + ); + + test_opts.run(&opt).with_context(|| "failed to run tests") + } + Subcommand::Diff(diff) => diff.run(&opt).with_context(|| "failed to run diff"), + Subcommand::Ci(ci) => ci.run(&opt).with_context(|| "failed to run ci"), } } + +macro_rules! gha_output { + ($fmt:literal$(, $args:expr)* $(,)?) => { + #[cfg(not(test))] + println!($fmt $(, $args)*); + #[cfg(test)] + eprintln!($fmt $(,$args)*); + }; +} + +pub fn gha_print(content: &str) { + gha_output!("{}", content); +} + +pub fn gha_error(content: &str) { + gha_output!("::error {}", content); +} + +#[track_caller] +pub fn gha_output(tag: &str, content: &str) -> anyhow::Result<()> { + if content.contains('\n') { + // https://github.com/actions/toolkit/issues/403 + anyhow::bail!("output `{tag}` contains newlines, consider serializing with json and deserializing in gha with fromJSON()"); + } + write_to_gha_env_file("GITHUB_OUTPUT", &format!("{tag}={content}"))?; + Ok(()) +} + +// https://docs.github.com/en/actions/using-workflows/workflow-commands-for-github-actions#environment-files +pub fn write_to_gha_env_file(env_name: &str, contents: &str) -> anyhow::Result<()> { + use std::io::Write; + let path = std::env::var(env_name)?; + let path = std::path::Path::new(&path); + let mut file = std::fs::OpenOptions::new().append(true).open(path)?; + writeln!(file, "{}", contents)?; + Ok(()) +} diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index ea7c6b57..1f5d2916 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -1,7 +1,7 @@ use anyhow::{Context, Result}; -use svd2rust::Target; +use svd2rust::{util::ToSanitizedCase, Target}; -use crate::tests::TestCase; +use crate::{command::CommandExt, tests::TestCase, Opts, TestOpts}; use std::io::prelude::*; use std::path::PathBuf; use std::process::{Command, Output}; @@ -22,10 +22,6 @@ const PROFILE_ALL: &[&str] = &["[profile.dev]", "incremental = false"]; const FEATURES_ALL: &[&str] = &["[features]"]; const FEATURES_XTENSALX: &[&str] = &["default = [\"xtensa-lx/esp32\", \"xtensa-lx-rt/esp32\"]"]; -fn path_helper(input: &[&str]) -> PathBuf { - input.iter().collect() -} - fn path_helper_base(base: &Path, input: &[&str]) -> PathBuf { input .iter() @@ -34,7 +30,11 @@ fn path_helper_base(base: &Path, input: &[&str]) -> PathBuf { /// Create and write to file fn file_helper(payload: &str, path: &Path) -> Result<()> { - let mut f = File::create(path).with_context(|| format!("Failed to create {path:?}"))?; + let mut f = OpenOptions::new() + .create(true) + .append(true) + .open(path) + .with_context(|| format!("Failed to create {path:?}"))?; f.write_all(payload.as_bytes()) .with_context(|| format!("Failed to write to {path:?}"))?; @@ -53,7 +53,7 @@ pub struct ProcessFailed { #[derive(Debug, thiserror::Error)] pub enum TestError { - #[error(transparent)] + #[error("test case failed")] Process(#[from] ProcessFailed), #[error("Failed to run test")] Other(#[from] anyhow::Error), @@ -110,15 +110,17 @@ impl CommandHelper for Output { } impl TestCase { + #[tracing::instrument(skip(self, opts, test_opts), fields(name = %self.name()))] pub fn test( &self, - bin_path: &PathBuf, - rustfmt_bin_path: Option<&PathBuf>, - atomics: bool, - verbosity: u8, + opts: &Opts, + test_opts: &TestOpts, ) -> Result>, TestError> { - let (chip_dir, mut process_stderr_paths) = - self.setup_case(atomics, bin_path, rustfmt_bin_path)?; + let (chip_dir, mut process_stderr_paths) = self.setup_case( + &opts.output_dir, + &test_opts.current_bin_path, + test_opts.command.as_deref(), + )?; // Run `cargo check`, capturing stderr to a log file let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); let output = Command::new("cargo") @@ -134,24 +136,28 @@ impl TestCase { &process_stderr_paths, )?; process_stderr_paths.push(cargo_check_err_file); - Ok(if verbosity > 1 { + Ok(if opts.verbose > 1 { Some(process_stderr_paths) } else { None }) } + #[tracing::instrument(skip(self, output_dir, command), fields(name = %self.name(), chip_dir = tracing::field::Empty))] + pub fn setup_case( &self, - atomics: bool, - bin_path: &PathBuf, - rustfmt_bin_path: Option<&PathBuf>, + output_dir: &Path, + svd2rust_bin_path: &Path, + command: Option<&str>, ) -> Result<(PathBuf, Vec), TestError> { let user = match std::env::var("USER") { Ok(val) => val, Err(_) => "rusttester".into(), }; - let chip_dir = path_helper(&["output", &self.name()]); + let chip_dir = output_dir.join(self.name().to_sanitized_snake_case().as_ref()); + tracing::span::Span::current() + .record("chip_dir", tracing::field::display(chip_dir.display())); if let Err(err) = fs::remove_dir_all(&chip_dir) { match err.kind() { std::io::ErrorKind::NotFound => (), @@ -159,11 +165,16 @@ impl TestCase { } } let mut process_stderr_paths: Vec = vec![]; + tracing::info!( + "Initializing cargo package for `{}` in {}", + self.name(), + chip_dir.display() + ); Command::new("cargo") .env("USER", user) .arg("init") .arg("--name") - .arg(&self.name()) + .arg(self.name().to_sanitized_snake_case().as_ref()) .arg("--vcs") .arg("none") .arg(&chip_dir) @@ -186,7 +197,7 @@ impl TestCase { Target::XtensaLX => CRATES_XTENSALX.iter(), Target::None => unreachable!(), }) - .chain(if atomics { + .chain(if command.unwrap_or_default().contains("--atomics") { CRATES_ATOMICS.iter() } else { [].iter() @@ -200,6 +211,8 @@ impl TestCase { for c in crates { writeln!(file, "{}", c).with_context(|| "Failed to append to file!")?; } + tracing::info!("Downloading SVD"); + // FIXME: Avoid downloading multiple times, especially if we're using the diff command let svd = reqwest::blocking::get(self.svd_url()) .with_context(|| "Failed to get svd URL")? .text() @@ -208,6 +221,7 @@ impl TestCase { let svd_file = path_helper_base(&chip_dir, &[&chip_svd]); file_helper(&svd, &svd_file)?; let lib_rs_file = path_helper_base(&chip_dir, &["src", "lib.rs"]); + let src_dir = path_helper_base(&chip_dir, &["src"]); let svd2rust_err_file = path_helper_base(&chip_dir, &["svd2rust.err.log"]); let target = match self.arch { Target::CortexM => "cortex-m", @@ -217,16 +231,16 @@ impl TestCase { Target::XtensaLX => "xtensa-lx", Target::None => unreachable!(), }; - let mut svd2rust_bin = Command::new(bin_path); - if atomics { - svd2rust_bin.arg("--atomics"); + tracing::info!("Running svd2rust"); + let mut svd2rust_bin = Command::new(svd2rust_bin_path); + if let Some(command) = command { + svd2rust_bin.arg(command); } let output = svd2rust_bin .args(["-i", &chip_svd]) .args(["--target", target]) .current_dir(&chip_dir) - .output() - .with_context(|| "failed to execute process")?; + .get_output()?; output.capture_outputs( true, "svd2rust", @@ -258,22 +272,78 @@ impl TestCase { .write(prettyplease::unparse(&file).as_bytes()) .with_context(|| format!("couldn't write {}", lib_rs_file.display()))?; let rustfmt_err_file = path_helper_base(&chip_dir, &["rustfmt.err.log"]); - if let Some(rustfmt_bin_path) = rustfmt_bin_path { - // Run `cargo fmt`, capturing stderr to a log file + let form_err_file = path_helper_base(&chip_dir, &["form.err.log"]); + if let Some(form_bin_path) = crate::FORM.get() { + tracing::info!("Running form"); - let output = Command::new(rustfmt_bin_path) - .arg(lib_rs_file) + // move the lib.rs file to src, then split with form. + let new_lib_rs_file = path_helper_base(&chip_dir, &["lib.rs"]); + std::fs::rename(lib_rs_file, &new_lib_rs_file) + .with_context(|| "While moving lib.rs file")?; + let output = Command::new(form_bin_path) + .arg("--input") + .arg(&new_lib_rs_file) + .arg("--outdir") + .arg(&src_dir) .output() - .with_context(|| "failed to format")?; + .with_context(|| "failed to form")?; output.capture_outputs( - false, - "rustfmt", + true, + "form", None, - Some(&rustfmt_err_file), + Some(&form_err_file), &process_stderr_paths, )?; + std::fs::remove_file(&new_lib_rs_file) + .with_context(|| "While removing lib.rs file after form")?; + } + if let Some(rustfmt_bin_path) = crate::RUSTFMT.get() { + tracing::info!("Running rustfmt"); + // Run `rusfmt`, capturing stderr to a log file + + // find all .rs files in src_dir and it's subdirectories + let mut src_files = vec![]; + visit_dirs(&src_dir, &mut |e: &fs::DirEntry| { + if e.path().extension().unwrap_or_default() == "rs" { + src_files.push(e.path()); + } + }) + .context("couldn't visit")?; + src_files.sort(); + + for entry in src_files { + let output = Command::new(rustfmt_bin_path) + .arg(entry) + .args(["--edition", "2021"]) + .output() + .with_context(|| "failed to format")?; + output.capture_outputs( + false, + "rustfmt", + None, + Some(&rustfmt_err_file), + &process_stderr_paths, + )?; + } + process_stderr_paths.push(rustfmt_err_file); } + tracing::info!("Done processing"); Ok((chip_dir, process_stderr_paths)) } } + +fn visit_dirs(dir: &Path, cb: &mut dyn FnMut(&fs::DirEntry)) -> std::io::Result<()> { + if dir.is_dir() { + for entry in fs::read_dir(dir)? { + let entry = entry?; + let path = entry.path(); + if path.is_dir() { + visit_dirs(&path, cb)?; + } else { + cb(&entry); + } + } + } + Ok(()) +} diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index ac86f737..3e3d348e 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -1,10 +1,12 @@ use self::RunWhen::*; use anyhow::Context; -pub use svd2rust::util::Target; -use svd2rust::util::ToSanitizedCase; +use serde::Serialize as _; +pub use svd2rust::Target; #[allow(clippy::upper_case_acronyms)] -#[derive(Debug, serde::Serialize, serde::Deserialize)] +#[derive( + Debug, serde::Serialize, serde::Deserialize, PartialOrd, Ord, PartialEq, Eq, Clone, Copy, +)] pub enum Manufacturer { Atmel, Freescale, @@ -23,6 +25,35 @@ pub enum Manufacturer { Espressif, } +impl Manufacturer { + pub const fn all() -> &'static [Self] { + use self::Manufacturer::*; + &[ + Atmel, + Freescale, + Fujitsu, + Holtek, + Microchip, + Nordic, + Nuvoton, + NXP, + SiliconLabs, + Spansion, + STMicro, + Toshiba, + SiFive, + TexasInstruments, + Espressif, + ] + } +} + +impl std::fmt::Display for Manufacturer { + fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { + self.serialize(f) + } +} + #[derive(Debug, serde::Serialize, serde::Deserialize)] pub enum RunWhen { Always, @@ -63,24 +94,20 @@ impl TestCase { pub fn name(&self) -> String { format!("{:?}-{}", self.mfgr, self.chip.replace('.', "_")) - .to_sanitized_snake_case() - .into() } } -pub fn tests(opts: Option<&crate::Opts>) -> Result<&'static [TestCase], anyhow::Error> { +pub fn tests(test_cases: Option<&std::path::Path>) -> Result<&'static [TestCase], anyhow::Error> { pub static TESTS: std::sync::OnceLock> = std::sync::OnceLock::new(); if let Some(cases) = TESTS.get() { Ok(cases) } else { - let path = opts - .map(|o| o.test_cases.clone()) - .ok_or_else(|| anyhow::format_err!("no test cases specified"))?; + let path = test_cases.ok_or_else(|| anyhow::format_err!("no test cases specified"))?; let cases: Vec = serde_json::from_reader( std::fs::OpenOptions::new() .read(true) - .open(&path) + .open(path) .with_context(|| format!("couldn't open file {}", path.display()))?, )?; Ok(TESTS.get_or_init(|| cases)) diff --git a/src/config.rs b/src/config.rs index c80dc561..02771e87 100644 --- a/src/config.rs +++ b/src/config.rs @@ -32,7 +32,7 @@ pub struct Config { #[allow(clippy::upper_case_acronyms)] #[allow(non_camel_case_types)] -#[cfg_attr(feature = "serde", derive(serde::Deserialize))] +#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))] #[derive(Clone, Copy, PartialEq, Eq, Debug, Default)] pub enum Target { #[cfg_attr(feature = "serde", serde(rename = "cortex-m"))] @@ -50,6 +50,19 @@ pub enum Target { None, } +impl std::fmt::Display for Target { + fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { + match self { + Target::CortexM => f.write_str("cortex-m"), + Target::Msp430 => f.write_str("msp430"), + Target::RISCV => f.write_str("riscv"), + Target::XtensaLX => f.write_str("xtensa-lx"), + Target::Mips => f.write_str("mips"), + Target::None => f.write_str("none"), + } + } +} + impl Target { pub fn parse(s: &str) -> Result { Ok(match s { @@ -62,6 +75,11 @@ impl Target { _ => bail!("unknown target {}", s), }) } + + pub const fn all() -> &'static [Target] { + use self::Target::*; + &[CortexM, Msp430, RISCV, XtensaLX, Mips] + } } #[cfg_attr( From 9584b229b8d100de1cd1e6b028fc546962ed9e9b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Mon, 4 Dec 2023 10:35:50 +0100 Subject: [PATCH 04/14] make tests file yaml --- Cargo.lock | 1 + ci/svd2rust-regress/Cargo.toml | 3 +- ci/svd2rust-regress/src/main.rs | 8 +- ci/svd2rust-regress/src/tests.rs | 23 +- ci/svd2rust-regress/tests.json | 4098 ------------------------------ ci/svd2rust-regress/tests.yml | 3072 ++++++++++++++++++++++ 6 files changed, 3096 insertions(+), 4109 deletions(-) delete mode 100644 ci/svd2rust-regress/tests.json create mode 100644 ci/svd2rust-regress/tests.yml diff --git a/Cargo.lock b/Cargo.lock index 74b0237e..d9d01134 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1267,6 +1267,7 @@ dependencies = [ "reqwest", "serde", "serde_json", + "serde_yaml", "svd2rust", "syn 2.0.39", "thiserror", diff --git a/ci/svd2rust-regress/Cargo.toml b/ci/svd2rust-regress/Cargo.toml index 7f7ea214..10709734 100644 --- a/ci/svd2rust-regress/Cargo.toml +++ b/ci/svd2rust-regress/Cargo.toml @@ -7,12 +7,13 @@ authors = ["James Munns ", "The svd2rust developers"] [dependencies] clap = { version = "4.1", features = ["color", "derive", "string", "env"] } svd2rust = { path = "../../" } -reqwest = { version = "0.11", features= ["blocking"] } +reqwest = { version = "0.11", features = ["blocking"] } rayon = "1.4" anyhow = "1" thiserror = "1" serde = "1" serde_json = "1" +serde_yaml = "0.9" prettyplease = "0.2" syn = "2" wildmatch = "2.1.1" diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index 0c820965..1dde0230 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -241,7 +241,7 @@ pub struct Opts { #[clap(global = true, long = "toolchain")] // , env = "RUSTUP_TOOLCHAIN" pub rustup_toolchain: Option, - /// Test cases to run, defaults to `tests.json` + /// Test cases to run #[clap(global = true, long, default_value = default_test_cases())] pub test_cases: std::path::PathBuf, @@ -273,18 +273,18 @@ impl Opts { } } -/// Hack to use ci/tests.json as default value when running as `cargo run` +/// Hack to use ci/tests.yml as default value when running as `cargo run` fn default_test_cases() -> std::ffi::OsString { std::env::var_os("CARGO_MANIFEST_DIR") .map(|mut e| { - e.extend([std::ffi::OsStr::new("/tests.json")]); + e.extend([std::ffi::OsStr::new("/tests.yml")]); std::path::PathBuf::from(e) .strip_prefix(std::env::current_dir().unwrap()) .unwrap() .to_owned() .into_os_string() }) - .unwrap_or_else(|| std::ffi::OsString::from("tests.json".to_owned())) + .unwrap_or_else(|| std::ffi::OsString::from("tests.yml".to_owned())) } fn default_svd2rust() -> std::ffi::OsString { diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index 3e3d348e..412c95a4 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -104,12 +104,23 @@ pub fn tests(test_cases: Option<&std::path::Path>) -> Result<&'static [TestCase] Ok(cases) } else { let path = test_cases.ok_or_else(|| anyhow::format_err!("no test cases specified"))?; - let cases: Vec = serde_json::from_reader( - std::fs::OpenOptions::new() - .read(true) - .open(path) - .with_context(|| format!("couldn't open file {}", path.display()))?, - )?; + let cases: Vec = if path.extension() != Some(std::ffi::OsStr::new("yml")) { + serde_json::from_reader( + std::fs::OpenOptions::new() + .read(true) + .open(path) + .with_context(|| format!("couldn't open file {}", path.display()))?, + )? + } else if path.extension() != Some(std::ffi::OsStr::new("json")) { + serde_yaml::from_reader( + std::fs::OpenOptions::new() + .read(true) + .open(path) + .with_context(|| format!("couldn't open file {}", path.display()))?, + )? + } else { + anyhow::bail!("unknown file extension for {}", path.display()); + }; Ok(TESTS.get_or_init(|| cases)) } } diff --git a/ci/svd2rust-regress/tests.json b/ci/svd2rust-regress/tests.json deleted file mode 100644 index 6a968e25..00000000 --- a/ci/svd2rust-regress/tests.json +++ /dev/null @@ -1,4098 +0,0 @@ -[ - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9CN11", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9CN12", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9G10", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9G15", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9G20", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9G25", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9G35", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9M10", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9M11", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9N12", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9X25", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9X35", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3A4C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3A8C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N00A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N00B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N0A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N0B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N0C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N1A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N1B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N1C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N2A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N2B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N2C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N4A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N4B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N4C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3S1A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3S1B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3S1C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3S2A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3S2B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3S2C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3S4A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3S4B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3S4C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3S8B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3S8C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3SD8B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3SD8C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3U1C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3U1E", - "svd_url": null, - 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"run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F105xx", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F107xx", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F20x", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F21x", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F301", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F302", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F303", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F3x4", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F373", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F401", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F405", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F407", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F410", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F411", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F412", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F413", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F427", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F429", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F446", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F469", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F7x", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F7x2", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F7x3", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F7x5", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F7x6", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F7x7", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32F7x9", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32G07x", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32G431xx", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32G441xx", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32G471xx", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32G474xx", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32G483xx", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32G484xx", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32L100", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32L15xC", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32L15xxE", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32L15xxxA", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32L1xx", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32L4x6", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32W108", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32L051x", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32L052x", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32L053x", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32L062x", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "STMicro", - "chip": "STM32L063x", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Toshiba", - "chip": "M365", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Toshiba", - "chip": "M367", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Toshiba", - "chip": "M368", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Toshiba", - "chip": "M369", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Toshiba", - "chip": "M36B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Toshiba", - "chip": "M061", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "riscv", - "mfgr": "SiFive", - "chip": "E310x", - "svd_url": "https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd", - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "msp430", - "mfgr": "TexasInstruments", - "chip": "msp430g2553", - "svd_url": "https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "msp430", - "mfgr": "TexasInstruments", - "chip": "msp430fr2355", - "svd_url": "https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "xtensa-lx", - "mfgr": "Espressif", - "chip": "esp32", - "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "xtensa-lx", - "mfgr": "Espressif", - "chip": "esp32s2", - "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "xtensa-lx", - "mfgr": "Espressif", - "chip": "esp32s3", - "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "riscv", - "mfgr": "Espressif", - "chip": "esp32c3", - "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "mips", - "mfgr": "Microchip", - "chip": "pic32mx170f256b", - "svd_url": "https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "mips", - "mfgr": "Microchip", - "chip": "pic32mx270f256b", - "svd_url": "https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched", - "should_pass": true, - "run_when": "Always" - } -] \ No newline at end of file diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml new file mode 100644 index 00000000..f53ceeb6 --- /dev/null +++ b/ci/svd2rust-regress/tests.yml @@ -0,0 +1,3072 @@ +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9CN11 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9CN12 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G10 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G15 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G20 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G25 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G35 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9M10 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9M11 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9N12 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9X25 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9X35 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3A4C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3A8C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N00A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N00B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N0A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N0B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N0C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N1A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N1B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N1C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N2A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N2B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N2C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N4A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N4B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N4C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S1A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S1B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S1C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S2A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S2B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S2C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S4A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S4B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S4C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S8B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S8C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3SD8B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3SD8C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U1C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U1E + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U2C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U2E + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U4C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U4E + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3X4C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3X4E + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3X8C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3X8E + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4S16B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4S16C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4S8B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4S8C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4SD32B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4SD32C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMA5D31 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMA5D33 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMA5D34 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMA5D35 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21E15A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21E16A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21E17A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21E18A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21G16A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21G17A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21G18A + svd_url: https://raw.githubusercontent.com/wez/atsamd21-rs/master/svd/ATSAMD21G18A.svd + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21J16A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21J17A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21J18A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21E16A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21E17A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21E18A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21G16A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21G17A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21G18A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MKV56F20 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MKV56F22 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MKV56F24 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MKV58F20 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MKV58F22 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MKV58F24 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MK61F15 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MK61F15WS + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MK70F12 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MK70F15 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MK70F15WS + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MK02F12810 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK10D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK10D5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK10D7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK10DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK10F12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK11D5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK11D5WS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK11DA5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK12D5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK20D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK20D5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK20D7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK20DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK20F12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK21D5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK21D5WS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK21DA5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK21F12 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK21FA12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK22D5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK22F12 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK22F12810 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK22F25612 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK22F51212 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK22FA12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK24F12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK24F25612 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK26F18 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK30D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK30D7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK30DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK40D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK40D7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK40DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK50D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK50D7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK50DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK51D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK51D7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK51DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK52D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK52DZ10 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK53D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK53DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK60D10 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK60DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK60F15 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK63F12 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK64F12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK65F18 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK66F18 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK80F25615 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK81F25615 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK82F25615 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKE14F16 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE14Z7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE15Z7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKE16F16 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE18F16 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL28T7_CORE0 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL28T7_CORE1 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL28Z7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL81Z7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL82Z7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKS22F12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV10Z1287 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKV10Z7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV11Z7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV30F12810 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKV31F12810 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV31F25612 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV31F51212 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKV40F15 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV42F16 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV43F15 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKV44F15 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV44F16 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV45F15 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKV46F15 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV46F16 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKW20Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKW21D5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKW21Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKW22D5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKW24D5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKW30Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKW31Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKW40Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKW41Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE02Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKE04Z1284 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE04Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE06Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKE14D7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE15D7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL02Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL03Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL04Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL05Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL13Z644 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL14Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL15Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL16Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL17Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL17Z644 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL24Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL25Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL26Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL27Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL27Z644 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL33Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL33Z644 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL34Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL36Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL43Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL46Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKM14ZA5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKM33ZA5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKM34Z7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKM34ZA5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKW01Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: SKEAZ1284 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: SKEAZN642 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: SKEAZN84 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF10xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF10xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF11xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF11xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF11xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF11xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF12xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF12xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF13xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF13xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF13xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF13xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF14xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF14xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF14xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF15xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF15xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF15xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF1AxL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF1AxM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF1AxN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF31xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF31xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF31xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF31xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF34xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF34xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF34xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF42xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF42xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA3xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA3xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA3xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA4xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA4xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA4xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFAAxL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFAAxM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFAAxN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFB4xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFB4xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFB4xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B160L + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B160R + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B360L + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B360R + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B460L + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B460R + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B560L + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B560R + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF10xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF10xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF11xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF11xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF11xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF11xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xJ + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF21xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF21xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF30xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF30xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF31xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF31xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF31xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF31xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF40xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF40xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF41xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF41xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF41xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF41xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF42xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF42xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF50xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF50xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF51xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF51xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF51xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF51xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF61xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF61xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BFD1xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BFD1xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: S6E1A1 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: S6E2CC + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Holtek + chip: ht32f125x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Holtek + chip: ht32f175x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Holtek + chip: ht32f275x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Nordic + chip: nrf51 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Nordic + chip: nrf52 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Nuvoton + chip: M051_Series + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Nuvoton + chip: NUC100_Series + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11Exx_v5 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11Uxx_v7 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11xx_v6a + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11xx_v6 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC13Uxx_v1 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC15xx_v0.7 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC800_v0.3 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11E6x_v0.8 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC176x5x_v0.2 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11Cxx_v9 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC178x_7x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC178x_7x_v0.8 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC408x_7x_v0.7 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11Axxv0.6 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11D14_svd_v4 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC13xx_svd_v1 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC18xx_svd_v18 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC43xx_43Sxx + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC1102_4_v4 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC5410x_v0.4 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: MK22F25612 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: NXP + chip: MK22F51212 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: NXP + chip: MKW41Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3C1x4_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3C1x6_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3C1x7_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x4_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x6_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x7_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3U1x4_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3U1x6_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3U1x7_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x8_SVD + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Spansion + chip: MB9AF12xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF12xL + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF42xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF42xL + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xJ + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF16xx + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF36xx + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF42xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF42xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF46xx + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF56xx + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF10xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF10xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF11xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF11xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF11xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF11xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF13xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF13xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF13xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF13xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF14xL + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF14xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF14xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF15xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF15xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF15xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF31xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF31xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF31xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF31xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF34xL + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF34xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF34xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA3xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA3xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA3xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA4xL + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA4xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA4xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AFB4xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AFB4xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AFB4xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF10xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF10xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF11xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF11xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF11xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF11xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF21xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF21xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF30xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF30xR + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF31xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF31xR + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF31xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF31xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xL + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF40xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF40xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF41xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF41xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF41xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF41xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF50xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF50xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF51xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF51xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF51xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF51xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF61xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF61xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BFD1xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BFD1xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: STMicro + chip: STM32F030 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F031x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F042x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F072x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F091x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F0xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F100xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F101xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F102xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F103xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F105xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F107xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F20x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F21x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F301 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F302 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F303 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F3x4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F373 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F401 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F405 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F407 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F410 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F411 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F412 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F413 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F427 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F429 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F446 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F469 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x2 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x3 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x6 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x9 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32G07x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: STMicro + chip: STM32G431xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32G441xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32G471xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32G474xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32G483xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32G484xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L100 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L15xC + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L15xxE + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L15xxxA + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L1xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L4x6 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32W108 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L051x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: STMicro + chip: STM32L052x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: STMicro + chip: STM32L053x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: STMicro + chip: STM32L062x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: STMicro + chip: STM32L063x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Toshiba + chip: M365 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Toshiba + chip: M367 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Toshiba + chip: M368 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Toshiba + chip: M369 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Toshiba + chip: M36B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Toshiba + chip: M061 + svd_url: + should_pass: true + run_when: Always +- arch: riscv + mfgr: SiFive + chip: E310x + svd_url: https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd + should_pass: false + run_when: Never +- arch: msp430 + mfgr: TexasInstruments + chip: msp430g2553 + svd_url: https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd + should_pass: true + run_when: Always +- arch: msp430 + mfgr: TexasInstruments + chip: msp430fr2355 + svd_url: https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd + should_pass: true + run_when: Always +- arch: xtensa-lx + mfgr: Espressif + chip: esp32 + svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd + should_pass: true + run_when: Always +- arch: xtensa-lx + mfgr: Espressif + chip: esp32s2 + svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd + should_pass: true + run_when: Always +- arch: xtensa-lx + mfgr: Espressif + chip: esp32s3 + svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd + should_pass: true + run_when: Always +- arch: riscv + mfgr: Espressif + chip: esp32c3 + svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd + should_pass: true + run_when: Always +- arch: mips + mfgr: Microchip + chip: pic32mx170f256b + svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched + should_pass: true + run_when: Always +- arch: mips + mfgr: Microchip + chip: pic32mx270f256b + svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched + should_pass: true + run_when: Always From 301eef10c74bf9f6f97f8038e67c544eb26d0fee Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 5 Dec 2023 00:10:05 +0300 Subject: [PATCH 05/14] cleanup --- Cargo.toml | 2 +- ci/svd2rust-regress/src/diff.rs | 19 +- ci/svd2rust-regress/src/svd_test.rs | 7 +- ci/svd2rust-regress/src/tests.rs | 2 + ci/svd2rust-regress/tests.yml | 1526 +++++++++------------------ src/config.rs | 16 +- 6 files changed, 536 insertions(+), 1036 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index de83adaf..507c8000 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -73,4 +73,4 @@ features = ["full","extra-traits"] [workspace] members = ["ci/svd2rust-regress"] default-members = ["."] -exclude = ["output"] \ No newline at end of file +exclude = ["output"] diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index 0a79f1a5..f4c2337a 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -158,16 +158,15 @@ impl Diffing { .collect::>(); if tests.len() != 1 { let error = anyhow::anyhow!("diff requires exactly one test case"); - if tests.is_empty() { - return Err(error.context("matched no tests")); - } else if tests.len() > 10 { - return Err(error.context(format!("matched multiple ({}) tests", tests.len()))); - } - return Err(error.context(format!( - "matched multiple ({}) tests\n{:?}", - tests.len(), - tests.iter().map(|t| t.name()).collect::>() - ))); + let len = tests.len(); + return Err(match len { + 0 => error.context("matched no tests"), + 10.. => error.context(format!("matched multiple ({len}) tests")), + _ => error.context(format!( + "matched multiple ({len}) tests\n{:?}", + tests.iter().map(|t| t.name()).collect::>() + )), + }); } let baseline = tests[0] diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 1f5d2916..5be44920 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -245,9 +245,10 @@ impl TestCase { true, "svd2rust", Some(&lib_rs_file).filter(|_| { - (self.arch != Target::CortexM) - && (self.arch != Target::Msp430) - && (self.arch != Target::XtensaLX) + !matches!( + self.arch, + Target::CortexM | Target::Msp430 | Target::XtensaLX + ) }), Some(&svd2rust_err_file), &[], diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index 412c95a4..fedd28fd 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -55,6 +55,7 @@ impl std::fmt::Display for Manufacturer { } #[derive(Debug, serde::Serialize, serde::Deserialize)] +#[serde(rename_all = "kebab-case")] pub enum RunWhen { Always, NotShort, @@ -68,6 +69,7 @@ pub struct TestCase { pub arch: Target, pub mfgr: Manufacturer, pub chip: String, + #[serde(default, skip_serializing_if = "Option::is_none")] svd_url: Option, pub should_pass: bool, run_when: RunWhen, diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index f53ceeb6..05afd680 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -1,3072 +1,2570 @@ - arch: cortex-m mfgr: Atmel chip: AT91SAM9CN11 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9CN12 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9G10 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9G15 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9G20 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9G25 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9G35 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9M10 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9M11 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9N12 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9X25 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9X35 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3A4C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3A8C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N00A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N00B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N0A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N0B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N0C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N1A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N1B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N1C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N2A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N2B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N2C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N4A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N4B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N4C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S1A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S1B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S1C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S2A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S2B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S2C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S4A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S4B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S4C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S8B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S8C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3SD8B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3SD8C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3U1C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3U1E - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3U2C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3U2E - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3U4C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3U4E - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3X4C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3X4E - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3X8C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3X8E - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM4S16B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM4S16C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM4S8B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM4S8C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM4SD32B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM4SD32C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMA5D31 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMA5D33 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMA5D34 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMA5D35 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21E15A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21E16A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21E17A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21E18A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21G16A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21G17A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21G18A svd_url: https://raw.githubusercontent.com/wez/atsamd21-rs/master/svd/ATSAMD21G18A.svd should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Atmel chip: ATSAMD21J16A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21J17A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21J18A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMR21E16A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMR21E17A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMR21E18A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMR21G16A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMR21G17A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMR21G18A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MKV56F20 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MKV56F22 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MKV56F24 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MKV58F20 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MKV58F22 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MKV58F24 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MK61F15 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MK61F15WS - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MK70F12 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MK70F15 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MK70F15WS - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MK02F12810 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK10D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK10D5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK10D7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK10DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK10F12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK11D5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK11D5WS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK11DA5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK12D5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK20D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK20D5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK20D7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK20DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK20F12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK21D5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK21D5WS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK21DA5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK21F12 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK21FA12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK22D5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK22F12 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK22F12810 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK22F25612 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK22F51212 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK22FA12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK24F12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK24F25612 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK26F18 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK30D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK30D7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK30DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK40D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK40D7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK40DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK50D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK50D7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK50DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK51D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK51D7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK51DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK52D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK52DZ10 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK53D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK53DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK60D10 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK60DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK60F15 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK63F12 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK64F12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK65F18 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK66F18 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK80F25615 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK81F25615 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK82F25615 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKE14F16 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE14Z7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE15Z7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKE16F16 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE18F16 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL28T7_CORE0 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL28T7_CORE1 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL28Z7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL81Z7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL82Z7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKS22F12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV10Z1287 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKV10Z7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV11Z7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV30F12810 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKV31F12810 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV31F25612 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV31F51212 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKV40F15 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV42F16 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV43F15 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKV44F15 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV44F16 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV45F15 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKV46F15 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV46F16 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKW20Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKW21D5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKW21Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKW22D5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKW24D5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKW30Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKW31Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKW40Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKW41Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE02Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKE04Z1284 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE04Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE06Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKE14D7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE15D7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL02Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL03Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL04Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL05Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL13Z644 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL14Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL15Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL16Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL17Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL17Z644 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL24Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL25Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL26Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL27Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL27Z644 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL33Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL33Z644 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL34Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL36Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL43Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL46Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKM14ZA5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKM33ZA5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKM34Z7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKM34ZA5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKW01Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: SKEAZ1284 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: SKEAZN642 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: SKEAZN84 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Fujitsu chip: MB9AF10xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF10xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF12xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF12xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF14xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF14xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF14xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF15xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF15xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF15xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF1AxL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF1AxM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF1AxN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF34xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF34xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF34xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF42xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF42xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA3xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA3xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA3xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA4xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA4xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA4xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFAAxL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFAAxM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFAAxN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFB4xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFB4xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFB4xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B160L - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B160R - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B360L - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B360R - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B460L - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B460R - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B560L - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B560R - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF10xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF10xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xJ - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF21xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF21xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF30xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF30xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF40xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF40xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF42xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF42xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF50xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF50xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF61xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF61xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BFD1xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BFD1xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: S6E1A1 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: S6E2CC - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Holtek chip: ht32f125x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Holtek chip: ht32f175x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Holtek chip: ht32f275x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Nordic chip: nrf51 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Nordic chip: nrf52 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Nuvoton chip: M051_Series - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Nuvoton chip: NUC100_Series - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11Exx_v5 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11Uxx_v7 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11xx_v6a - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11xx_v6 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC13Uxx_v1 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC15xx_v0.7 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC800_v0.3 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11E6x_v0.8 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC176x5x_v0.2 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11Cxx_v9 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC178x_7x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC178x_7x_v0.8 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC408x_7x_v0.7 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11Axxv0.6 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11D14_svd_v4 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC13xx_svd_v1 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC18xx_svd_v18 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC43xx_43Sxx - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC1102_4_v4 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC5410x_v0.4 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: MK22F25612 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: NXP chip: MK22F51212 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: NXP chip: MKW41Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3C1x4_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3C1x6_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3C1x7_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3L1x4_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3L1x6_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3L1x7_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3U1x4_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3U1x6_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3U1x7_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3L1x8_SVD - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Spansion chip: MB9AF12xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF12xL - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF42xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF42xL - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF12xJ - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF12xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF12xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF16xx - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF32xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF32xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF36xx - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF42xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF42xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF46xx - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF52xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF52xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF56xx - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF10xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF10xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF11xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF11xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF11xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF11xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF13xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF13xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF13xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF13xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF14xL - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF14xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF14xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF15xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF15xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF15xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF31xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF31xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF31xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF31xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF34xL - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF34xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF34xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AFA3xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFA3xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AFA3xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFA4xL - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AFA4xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFA4xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AFB4xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFB4xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AFB4xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF10xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF10xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF11xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF11xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF11xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF11xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF12xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF12xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF12xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF21xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF21xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF30xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF30xR - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF31xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF31xR - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF31xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF31xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF32xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF32xL - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF32xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF40xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF40xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF41xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF41xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF41xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF41xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF50xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF50xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF51xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF51xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF51xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF51xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF52xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF52xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF52xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF61xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF61xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BFD1xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BFD1xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: STMicro chip: STM32F030 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F031x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F042x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F072x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F091x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F0xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F100xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F101xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F102xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F103xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F105xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F107xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F20x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F21x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F301 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F302 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F303 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F3x4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F373 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F401 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F405 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F407 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F410 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F411 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F412 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F413 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F427 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F429 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F446 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F469 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x2 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x3 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x6 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x9 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G07x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: STMicro chip: STM32G431xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G441xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G471xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G474xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G483xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G484xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L100 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L15xC - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L15xxE - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L15xxxA - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L1xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L4x6 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32W108 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L051x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: STMicro chip: STM32L052x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: STMicro chip: STM32L053x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: STMicro chip: STM32L062x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: STMicro chip: STM32L063x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Toshiba chip: M365 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Toshiba chip: M367 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Toshiba chip: M368 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Toshiba chip: M369 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Toshiba chip: M36B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Toshiba chip: M061 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: riscv mfgr: SiFive chip: E310x svd_url: https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd should_pass: false - run_when: Never + run_when: never - arch: msp430 mfgr: TexasInstruments chip: msp430g2553 svd_url: https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd should_pass: true - run_when: Always + run_when: always - arch: msp430 mfgr: TexasInstruments chip: msp430fr2355 svd_url: https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd should_pass: true - run_when: Always + run_when: always - arch: xtensa-lx mfgr: Espressif chip: esp32 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd should_pass: true - run_when: Always + run_when: always - arch: xtensa-lx mfgr: Espressif chip: esp32s2 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd should_pass: true - run_when: Always + run_when: always - arch: xtensa-lx mfgr: Espressif chip: esp32s3 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd should_pass: true - run_when: Always + run_when: always - arch: riscv mfgr: Espressif chip: esp32c3 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd should_pass: true - run_when: Always + run_when: always - arch: mips mfgr: Microchip chip: pic32mx170f256b svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched should_pass: true - run_when: Always + run_when: always - arch: mips mfgr: Microchip chip: pic32mx270f256b svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched should_pass: true - run_when: Always + run_when: always diff --git a/src/config.rs b/src/config.rs index 02771e87..7656bf43 100644 --- a/src/config.rs +++ b/src/config.rs @@ -52,14 +52,14 @@ pub enum Target { impl std::fmt::Display for Target { fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { - match self { - Target::CortexM => f.write_str("cortex-m"), - Target::Msp430 => f.write_str("msp430"), - Target::RISCV => f.write_str("riscv"), - Target::XtensaLX => f.write_str("xtensa-lx"), - Target::Mips => f.write_str("mips"), - Target::None => f.write_str("none"), - } + f.write_str(match self { + Target::CortexM => "cortex-m", + Target::Msp430 => "msp430", + Target::RISCV => "riscv", + Target::XtensaLX => "xtensa-lx", + Target::Mips => "mips", + Target::None => "none", + }) } } From cb56476e0f3e53dc1452152aff13761b5d80339b Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 5 Dec 2023 09:19:26 +0300 Subject: [PATCH 06/14] check 404 --- ci/svd2rust-regress/src/svd_test.rs | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 5be44920..9b7f4d6f 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -1,4 +1,4 @@ -use anyhow::{Context, Result}; +use anyhow::{anyhow, Context, Result}; use svd2rust::{util::ToSanitizedCase, Target}; use crate::{command::CommandExt, tests::TestCase, Opts, TestOpts}; @@ -213,10 +213,14 @@ impl TestCase { } tracing::info!("Downloading SVD"); // FIXME: Avoid downloading multiple times, especially if we're using the diff command - let svd = reqwest::blocking::get(self.svd_url()) - .with_context(|| "Failed to get svd URL")? + let svd_url = &self.svd_url(); + let svd = reqwest::blocking::get(svd_url) + .with_context(|| format!("Failed to get svd URL: {svd_url}"))? .text() .with_context(|| "SVD is bad text")?; + if svd == "404: Not Found" { + return Err(anyhow!("Failed to get svd URL: {svd_url}. {svd}").into()); + } let chip_svd = format!("{}.svd", &self.chip); let svd_file = path_helper_base(&chip_dir, &[&chip_svd]); file_helper(&svd, &svd_file)?; From 4560744b3d2bae30bd4beaedf9eb2f0a6fd60ade Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 5 Dec 2023 09:31:32 +0300 Subject: [PATCH 07/14] posborn -> cmsis-svd-data --- ci/script.sh | 20 ++++++++++---------- ci/svd2rust-regress/src/tests.rs | 2 +- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/ci/script.sh b/ci/script.sh index afcaebf9..1e4ab69a 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -1,7 +1,7 @@ set -euxo pipefail test_svd() { - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/$VENDOR/${1}.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/$VENDOR/${1}.svd } test_patched_stm32() { @@ -510,15 +510,15 @@ main() { SiliconLabs) # #99 regression tests - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3C1x4.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3C1x6.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3C1x7.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3L1x4.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3L1x6.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3L1x7.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3U1x4.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3U1x6.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3U1x7.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3C1x4.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3C1x6.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3C1x7.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x4.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x6.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x7.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3U1x4.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3U1x6.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3U1x7.svd # FIXME(???) panicked at "c.text.clone()" # test_svd SIM3L1x8_SVD diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index fedd28fd..7f9e57ac 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -79,7 +79,7 @@ impl TestCase { pub fn svd_url(&self) -> String { match &self.svd_url { Some(u) => u.to_owned(), - None => format!("https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/{vendor:?}/{chip}.svd", + None => format!("https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/{vendor:?}/{chip}.svd", vendor = self.mfgr, chip = self.chip ) From a65d514745636c32d8cd44510373ff7ef3985ae5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Tue, 5 Dec 2023 12:37:00 +0100 Subject: [PATCH 08/14] small fixes --- ci/svd2rust-regress/src/diff.rs | 8 ++--- ci/svd2rust-regress/src/main.rs | 49 +++++++++++++++-------------- ci/svd2rust-regress/src/svd_test.rs | 8 ++--- ci/svd2rust-regress/src/tests.rs | 2 +- src/util.rs | 14 +++++---- 5 files changed, 42 insertions(+), 39 deletions(-) diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index f4c2337a..0d1aaf7a 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -146,13 +146,13 @@ impl Diffing { } }) .filter(|t| { - if !self.chip.is_empty() { + if self.chip.is_empty() { + false + } else { self.chip.iter().any(|c| { wildmatch::WildMatch::new(&c.to_ascii_lowercase()) .matches(&t.chip.to_ascii_lowercase()) }) - } else { - false } }) .collect::>(); @@ -206,7 +206,7 @@ impl Diffing { // FIXME: refactor this to be less ugly let [baseline_sc, current_sc] = self.get_source_and_command(); let baseline = match baseline_sc.and_then(|(source, _)| source) { - reference @ None | reference @ Some("" | "master") => { + reference @ (None | Some("" | "master")) => { github::get_release_binary_artifact(reference.unwrap_or("master"), &opts.output_dir) .with_context(|| "couldn't get svd2rust latest unreleased artifact")? } diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index 1dde0230..f9385630 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -44,6 +44,7 @@ pub fn get_cargo_metadata() -> &'static CargoMetadata { } /// Returns the cargo workspace for the manifest +#[must_use] pub fn get_cargo_workspace() -> &'static std::path::Path { &get_cargo_metadata().workspace_root } @@ -129,11 +130,11 @@ impl TestOpts { }) // Specify chip - note: may match multiple .filter(|t| { - if !self.chip.is_empty() { - self.chip.iter().any(|c| WildMatch::new(c).matches(&t.chip)) - } else { + if self.chip.is_empty() { // Don't run failable tests unless wanted self.bad_tests || t.should_pass + } else { + self.chip.iter().any(|c| WildMatch::new(c).matches(&t.chip)) } }) .collect::>(); @@ -190,10 +191,10 @@ impl TestOpts { read_file(stderr, &mut buf); buf } - _ => "".into(), + _ => String::new(), } } else { - "".into() + String::new() }; tracing::error!( "Failed: {} - {} seconds. {:?}{}", @@ -253,38 +254,39 @@ pub struct Opts { } impl Opts { - fn use_rustfmt(&self) -> bool { + const fn use_rustfmt(&self) -> bool { match self.subcommand { - Subcommand::Tests(TestOpts { format, .. }) => format, - Subcommand::Diff(Diffing { format, .. }) => format, - Subcommand::Ci(Ci { format, .. }) => format, + Subcommand::Tests(TestOpts { format, .. }) + | Subcommand::Diff(Diffing { format, .. }) + | Subcommand::Ci(Ci { format, .. }) => format, } } - fn use_form(&self) -> bool { + const fn use_form(&self) -> bool { match self.subcommand { - Subcommand::Tests(TestOpts { form_lib, .. }) => form_lib, - Subcommand::Diff(Diffing { + Subcommand::Tests(TestOpts { form_lib, .. }) + | Subcommand::Diff(Diffing { form_split: form_lib, .. - }) => form_lib, - Subcommand::Ci(Ci { form_lib, .. }) => form_lib, + }) + | Subcommand::Ci(Ci { form_lib, .. }) => form_lib, } } } /// Hack to use ci/tests.yml as default value when running as `cargo run` fn default_test_cases() -> std::ffi::OsString { - std::env::var_os("CARGO_MANIFEST_DIR") - .map(|mut e| { + std::env::var_os("CARGO_MANIFEST_DIR").map_or_else( + || std::ffi::OsString::from("tests.yml".to_owned()), + |mut e| { e.extend([std::ffi::OsStr::new("/tests.yml")]); std::path::PathBuf::from(e) .strip_prefix(std::env::current_dir().unwrap()) .unwrap() .to_owned() .into_os_string() - }) - .unwrap_or_else(|| std::ffi::OsString::from("tests.yml".to_owned())) + }, + ) } fn default_svd2rust() -> std::ffi::OsString { @@ -326,9 +328,7 @@ fn validate_tests(tests: &[tests::TestCase]) { } } - if fail { - panic!("Tests failed validation"); - } + assert!(!fail, "Tests failed validation"); } fn read_file(path: &PathBuf, buf: &mut String) { @@ -376,9 +376,10 @@ fn main() -> Result<(), anyhow::Error> { } (&None, true) => { // FIXME: Use Option::filter instead when stable, rust-lang/rust#45860 - if !default_rustfmt.iter().any(|p| p.is_file()) { - panic!("No rustfmt found"); - } + assert!( + default_rustfmt.iter().any(|p| p.is_file()), + "No rustfmt found" + ); if let Some(default_rustfmt) = default_rustfmt { RUSTFMT.get_or_init(|| default_rustfmt); } diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 9b7f4d6f..8f149d60 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -216,11 +216,11 @@ impl TestCase { let svd_url = &self.svd_url(); let svd = reqwest::blocking::get(svd_url) .with_context(|| format!("Failed to get svd URL: {svd_url}"))? + .error_for_status() + .with_context(|| anyhow!("Response is not ok for svd url"))? .text() .with_context(|| "SVD is bad text")?; - if svd == "404: Not Found" { - return Err(anyhow!("Failed to get svd URL: {svd_url}. {svd}").into()); - } + let chip_svd = format!("{}.svd", &self.chip); let svd_file = path_helper_base(&chip_dir, &[&chip_svd]); file_helper(&svd, &svd_file)?; @@ -262,7 +262,7 @@ impl TestCase { Target::CortexM | Target::Mips | Target::Msp430 | Target::XtensaLX => { // TODO: Give error the path to stderr fs::rename(path_helper_base(&chip_dir, &["lib.rs"]), &lib_rs_file) - .with_context(|| "While moving lib.rs file")? + .with_context(|| "While moving lib.rs file")?; } _ => {} } diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index 7f9e57ac..c77e57c5 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -86,7 +86,7 @@ impl TestCase { } } - pub fn should_run(&self, short_test: bool) -> bool { + pub const fn should_run(&self, short_test: bool) -> bool { match (&self.run_when, short_test) { (&Always, _) => true, (&NotShort, true) => false, diff --git a/src/util.rs b/src/util.rs index 722a24cb..547d879a 100644 --- a/src/util.rs +++ b/src/util.rs @@ -144,7 +144,7 @@ pub fn respace(s: &str) -> String { pub fn escape_brackets(s: &str) -> String { s.split('[') - .fold("".to_string(), |acc, x| { + .fold(String::new(), |acc, x| { if acc.is_empty() { x.to_string() } else if acc.ends_with('\\') { @@ -154,7 +154,7 @@ pub fn escape_brackets(s: &str) -> String { } }) .split(']') - .fold("".to_string(), |acc, x| { + .fold(String::new(), |acc, x| { if acc.is_empty() { x.to_string() } else if acc.ends_with('\\') { @@ -445,11 +445,13 @@ pub fn peripheral_names(d: &Device) -> Vec { for p in &d.peripherals { match p { Peripheral::Single(info) => { - v.push(replace_suffix(&info.name.to_sanitized_snake_case(), "")) + v.push(replace_suffix(&info.name.to_sanitized_snake_case(), "")); + } + Peripheral::Array(info, dim) => { + v.extend( + svd_rs::array::names(info, dim).map(|n| n.to_sanitized_snake_case().into()), + ); } - Peripheral::Array(info, dim) => v.extend( - svd_rs::array::names(info, dim).map(|n| n.to_sanitized_snake_case().into()), - ), } } v.sort(); From 1a74d737585328e5c93c92c24221dbf9be7e9c08 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Tue, 5 Dec 2023 20:19:48 +0100 Subject: [PATCH 09/14] add more context to setup errors --- ci/svd2rust-regress/src/svd_test.rs | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 8f149d60..a2f649a4 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -116,11 +116,13 @@ impl TestCase { opts: &Opts, test_opts: &TestOpts, ) -> Result>, TestError> { - let (chip_dir, mut process_stderr_paths) = self.setup_case( - &opts.output_dir, - &test_opts.current_bin_path, - test_opts.command.as_deref(), - )?; + let (chip_dir, mut process_stderr_paths) = self + .setup_case( + &opts.output_dir, + &test_opts.current_bin_path, + test_opts.command.as_deref(), + ) + .with_context(|| anyhow!("when setting up case for {}", self.name()))?; // Run `cargo check`, capturing stderr to a log file let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); let output = Command::new("cargo") From f047661bddd63e199dd763f47d9b3a1b7f466608 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 6 Dec 2023 18:42:52 +0100 Subject: [PATCH 10/14] improve output --- .cargo/config.toml | 2 +- .github/workflows/diff.yml | 9 ++- ci/svd2rust-regress/src/command.rs | 25 +++--- ci/svd2rust-regress/src/diff.rs | 52 ++++++++---- ci/svd2rust-regress/src/github.rs | 2 +- ci/svd2rust-regress/src/main.rs | 1 + ci/svd2rust-regress/src/svd_test.rs | 118 ++++++++++++++++------------ ci/svd2rust-regress/tests.yml | 2 +- 8 files changed, 124 insertions(+), 87 deletions(-) diff --git a/.cargo/config.toml b/.cargo/config.toml index f897ca7b..43ca37f1 100644 --- a/.cargo/config.toml +++ b/.cargo/config.toml @@ -2,4 +2,4 @@ linker = "aarch64-linux-gnu-gcc" [alias] -regress = "run -p svd2rust-regress --" \ No newline at end of file +regress = "run -p svd2rust-regress --" diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index 50f8424f..a6d40960 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -18,6 +18,8 @@ jobs: - name: Cache uses: Swatinem/rust-cache@v2 + with: + shared-key: "diff" - run: cargo regress ci id: regress-ci @@ -41,13 +43,14 @@ jobs: - name: Cache uses: Swatinem/rust-cache@v2 with: - cache-on-failure: true + shared-key: "diff" - uses: taiki-e/install-action@v2 if: matrix.needs_semver_checks with: tool: cargo-semver-checks + # if a new line is added here, make sure to update the `summary` job to reference the new step index - uses: taiki-e/install-action@v2 with: tool: git-delta @@ -59,8 +62,8 @@ jobs: GIT_PAGER: delta --hunk-header-style omit summary: runs-on: ubuntu-latest - needs: [diff] - if: always() + needs: [diff, generate] + if: always() && needs.generate.outputs.diffs != '{}' && needs.generate.outputs.diffs != '[]' && needs.generate.outputs.diffs != '' steps: - uses: actions/checkout@v4 diff --git a/ci/svd2rust-regress/src/command.rs b/ci/svd2rust-regress/src/command.rs index 77291bd0..2c873bb8 100644 --- a/ci/svd2rust-regress/src/command.rs +++ b/ci/svd2rust-regress/src/command.rs @@ -7,7 +7,7 @@ pub trait CommandExt { fn run(&mut self, hide: bool) -> Result<(), anyhow::Error>; #[track_caller] - fn get_output(&mut self) -> Result; + fn get_output(&mut self, can_fail: bool) -> Result; #[track_caller] fn get_output_string(&mut self) -> Result; @@ -33,17 +33,11 @@ impl CommandExt for Command { } #[track_caller] - fn get_output(&mut self) -> Result { - let output = self.output().with_context(|| { - format!( - "command `{}{}` couldn't be run", - self.get_current_dir() - .map(|d| format!("{} ", d.display())) - .unwrap_or_default(), - self.display() - ) - })?; - if output.status.success() { + fn get_output(&mut self, can_fail: bool) -> Result { + let output = self + .output() + .with_context(|| format!("command `{}` couldn't be run", self.display()))?; + if output.status.success() || can_fail { Ok(output) } else { anyhow::bail!( @@ -57,12 +51,15 @@ impl CommandExt for Command { #[track_caller] fn get_output_string(&mut self) -> Result { - String::from_utf8(self.get_output()?.stdout).map_err(Into::into) + String::from_utf8(self.get_output(true)?.stdout).map_err(Into::into) } fn display(&self) -> String { format!( - "{} {}", + "{}{} {}", + self.get_current_dir() + .map(|d| format!("{} ", d.display())) + .unwrap_or_default(), self.get_program().to_string_lossy(), self.get_args() .map(|s| s.to_string_lossy()) diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index 0d1aaf7a..2bfb0d64 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -13,10 +13,10 @@ pub struct Diffing { /// Change the base version by starting with `@` followed by the source. /// /// supports `@pr` for current pr, `@master` for latest master build, or a version tag like `@v0.30.0` - #[clap(global = true, long, alias = "base")] + #[clap(global = true, long = "baseline", alias = "base")] pub baseline: Option, - #[clap(global = true, long, alias = "head")] + #[clap(global = true, long = "current", alias = "head")] pub current: Option, /// Enable formatting with `rustfmt` @@ -72,6 +72,17 @@ pub struct Diffing { pub enum DiffingMode { Semver, Diff, + Pr, +} + +impl DiffingMode { + /// Returns `true` if the diffing mode is [`Pr`]. + /// + /// [`Pr`]: DiffingMode::Pr + #[must_use] + pub fn is_pr(&self) -> bool { + matches!(self, Self::Pr) + } } type Source<'s> = Option<&'s str>; @@ -83,7 +94,7 @@ impl Diffing { .make_case(opts) .with_context(|| "couldn't setup test case")?; match self.sub.unwrap_or(DiffingMode::Diff) { - DiffingMode::Diff => { + DiffingMode::Diff | DiffingMode::Pr => { let mut command; if let Some(pager) = &self.pager { if self.use_pager_directly { @@ -156,27 +167,34 @@ impl Diffing { } }) .collect::>(); - if tests.len() != 1 { - let error = anyhow::anyhow!("diff requires exactly one test case"); - let len = tests.len(); - return Err(match len { - 0 => error.context("matched no tests"), - 10.. => error.context(format!("matched multiple ({len}) tests")), - _ => error.context(format!( - "matched multiple ({len}) tests\n{:?}", - tests.iter().map(|t| t.name()).collect::>() - )), - }); - } + let test = match (tests.len(), self.sub) { + (1, _) => tests[0], + (1.., Some(DiffingMode::Pr)) => tests + .iter() + .find(|t| t.chip == "STM32F401") + .unwrap_or(&tests[0]), + _ => { + let error = anyhow::anyhow!("diff requires exactly one test case"); + let len = tests.len(); + return Err(match len { + 0 => error.context("matched no tests"), + 10.. => error.context(format!("matched multiple ({len}) tests")), + _ => error.context(format!( + "matched multiple ({len}) tests\n{:?}", + tests.iter().map(|t| t.name()).collect::>() + )), + }); + } + }; - let baseline = tests[0] + let baseline = test .setup_case( &opts.output_dir.join("baseline"), &baseline_bin, baseline_cmd, ) .with_context(|| "couldn't create head")?; - let current = tests[0] + let current = test .setup_case(&opts.output_dir.join("current"), ¤t_bin, current_cmd) .with_context(|| "couldn't create base")?; diff --git a/ci/svd2rust-regress/src/github.rs b/ci/svd2rust-regress/src/github.rs index 996d6e87..1a5b0ecb 100644 --- a/ci/svd2rust-regress/src/github.rs +++ b/ci/svd2rust-regress/src/github.rs @@ -148,7 +148,7 @@ pub fn get_release_binary_artifact( Command::new("gzip") .arg("-d") .arg(output_dir.join(artifact)) - .get_output()?; + .get_output(false)?; } } _ => { diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index f9385630..a4bec671 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -348,6 +348,7 @@ fn main() -> Result<(), anyhow::Error> { tracing_subscriber::fmt() .pretty() .with_target(false) + .with_writer(std::io::stderr) .with_env_filter( tracing_subscriber::EnvFilter::builder() .with_default_directive(tracing::level_filters::LevelFilter::INFO.into()) diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index a2f649a4..fc87778e 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -6,6 +6,7 @@ use std::io::prelude::*; use std::path::PathBuf; use std::process::{Command, Output}; use std::{ + fmt::Write as _, fs::{self, File, OpenOptions}, path::Path, }; @@ -67,7 +68,7 @@ impl std::fmt::Debug for ProcessFailed { trait CommandHelper { fn capture_outputs( - &self, + &mut self, cant_fail: bool, name: &str, stdout: Option<&PathBuf>, @@ -76,26 +77,48 @@ trait CommandHelper { ) -> Result<(), TestError>; } -impl CommandHelper for Output { +impl CommandHelper for Command { + #[tracing::instrument(skip_all, fields(stdout = tracing::field::Empty, stderr = tracing::field::Empty))] fn capture_outputs( - &self, + &mut self, cant_fail: bool, name: &str, stdout: Option<&PathBuf>, stderr: Option<&PathBuf>, previous_processes_stderr: &[PathBuf], ) -> Result<(), TestError> { + let output = self.get_output(true)?; + let out_payload = String::from_utf8_lossy(&output.stdout); if let Some(out) = stdout { - let out_payload = String::from_utf8_lossy(&self.stdout); file_helper(&out_payload, out)?; }; + let err_payload = String::from_utf8_lossy(&output.stderr); if let Some(err) = stderr { - let err_payload = String::from_utf8_lossy(&self.stderr); file_helper(&err_payload, err)?; }; - - if cant_fail && !self.status.success() { + if cant_fail && !output.status.success() { + let span = tracing::Span::current(); + let mut message = format!("Process failed: {}", self.display()); + if !out_payload.trim().is_empty() { + span.record( + "stdout", + tracing::field::display( + stdout.map(|p| p.display().to_string()).unwrap_or_default(), + ), + ); + write!(message, "\nstdout: \n{}", out_payload).unwrap(); + } + if !err_payload.trim().is_empty() { + span.record( + "stderr", + tracing::field::display( + stderr.map(|p| p.display().to_string()).unwrap_or_default(), + ), + ); + write!(message, "\nstderr: \n{}", err_payload).unwrap(); + } + tracing::error!(message=%message); return Err(ProcessFailed { command: name.into(), stdout: stdout.cloned(), @@ -125,18 +148,17 @@ impl TestCase { .with_context(|| anyhow!("when setting up case for {}", self.name()))?; // Run `cargo check`, capturing stderr to a log file let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); - let output = Command::new("cargo") + Command::new("cargo") .arg("check") .current_dir(&chip_dir) - .output() + .capture_outputs( + true, + "cargo check", + None, + Some(&cargo_check_err_file), + &process_stderr_paths, + ) .with_context(|| "failed to check")?; - output.capture_outputs( - true, - "cargo check", - None, - Some(&cargo_check_err_file), - &process_stderr_paths, - )?; process_stderr_paths.push(cargo_check_err_file); Ok(if opts.verbose > 1 { Some(process_stderr_paths) @@ -180,9 +202,8 @@ impl TestCase { .arg("--vcs") .arg("none") .arg(&chip_dir) - .output() - .with_context(|| "Failed to cargo init")? - .capture_outputs(true, "cargo init", None, None, &[])?; + .capture_outputs(true, "cargo init", None, None, &[]) + .with_context(|| "Failed to cargo init")?; let svd_toml = path_helper_base(&chip_dir, &["Cargo.toml"]); let mut file = OpenOptions::new() .write(true) @@ -242,23 +263,22 @@ impl TestCase { if let Some(command) = command { svd2rust_bin.arg(command); } - let output = svd2rust_bin + svd2rust_bin .args(["-i", &chip_svd]) .args(["--target", target]) .current_dir(&chip_dir) - .get_output()?; - output.capture_outputs( - true, - "svd2rust", - Some(&lib_rs_file).filter(|_| { - !matches!( - self.arch, - Target::CortexM | Target::Msp430 | Target::XtensaLX - ) - }), - Some(&svd2rust_err_file), - &[], - )?; + .capture_outputs( + true, + "svd2rust", + Some(&lib_rs_file).filter(|_| { + !matches!( + self.arch, + Target::CortexM | Target::Msp430 | Target::XtensaLX + ) + }), + Some(&svd2rust_err_file), + &[], + )?; process_stderr_paths.push(svd2rust_err_file); match self.arch { Target::CortexM | Target::Mips | Target::Msp430 | Target::XtensaLX => { @@ -287,20 +307,19 @@ impl TestCase { let new_lib_rs_file = path_helper_base(&chip_dir, &["lib.rs"]); std::fs::rename(lib_rs_file, &new_lib_rs_file) .with_context(|| "While moving lib.rs file")?; - let output = Command::new(form_bin_path) + Command::new(form_bin_path) .arg("--input") .arg(&new_lib_rs_file) .arg("--outdir") .arg(&src_dir) - .output() + .capture_outputs( + true, + "form", + None, + Some(&form_err_file), + &process_stderr_paths, + ) .with_context(|| "failed to form")?; - output.capture_outputs( - true, - "form", - None, - Some(&form_err_file), - &process_stderr_paths, - )?; std::fs::remove_file(&new_lib_rs_file) .with_context(|| "While removing lib.rs file after form")?; } @@ -322,15 +341,14 @@ impl TestCase { let output = Command::new(rustfmt_bin_path) .arg(entry) .args(["--edition", "2021"]) - .output() + .capture_outputs( + false, + "rustfmt", + None, + Some(&rustfmt_err_file), + &process_stderr_paths, + ) .with_context(|| "failed to format")?; - output.capture_outputs( - false, - "rustfmt", - None, - Some(&rustfmt_err_file), - &process_stderr_paths, - )?; } process_stderr_paths.push(rustfmt_err_file); diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index 05afd680..1d6c0000 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -10,7 +10,7 @@ run_when: never - arch: cortex-m mfgr: Atmel - chip: AT91SAM9G10 + chip: AT91SAM9G09 should_pass: false run_when: never - arch: cortex-m From b366167d359a36b4a66f66f83465cb05c99e179b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 6 Dec 2023 18:48:59 +0100 Subject: [PATCH 11/14] bump lockfile --- Cargo.lock | 74 +++++++++++++++++++++++++++--------------------------- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index d9d01134..b88d138c 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -48,30 +48,30 @@ checksum = "7079075b41f533b8c61d2a4d073c4676e1f8b249ff94a393b0595db304e0dd87" [[package]] name = "anstyle-parse" -version = "0.2.2" +version = "0.2.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "317b9a89c1868f5ea6ff1d9539a69f45dffc21ce321ac1fd1160dfa48c8e2140" +checksum = "c75ac65da39e5fe5ab759307499ddad880d724eed2f6ce5b5e8a26f4f387928c" dependencies = [ "utf8parse", ] [[package]] name = "anstyle-query" -version = "1.0.0" +version = "1.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5ca11d4be1bab0c8bc8734a9aa7bf4ee8316d462a08c6ac5052f888fef5b494b" +checksum = "a3a318f1f38d2418400f8209655bfd825785afd25aa30bb7ba6cc792e4596748" dependencies = [ - "windows-sys 0.48.0", + "windows-sys 0.52.0", ] [[package]] name = "anstyle-wincon" -version = "3.0.1" +version = "3.0.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f0699d10d2f4d628a98ee7b57b289abbc98ff3bad977cb3152709d4bf2330628" +checksum = "1cd54b81ec8d6180e24654d0b371ad22fc3dd083b6ff8ba325b72e00c87660a7" dependencies = [ "anstyle", - "windows-sys 0.48.0", + "windows-sys 0.52.0", ] [[package]] @@ -171,9 +171,9 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" [[package]] name = "clap" -version = "4.4.10" +version = "4.4.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "41fffed7514f420abec6d183b1d3acfd9099c79c3a10a06ade4f8203f1411272" +checksum = "bfaff671f6b22ca62406885ece523383b9b64022e341e53e009a62ebc47a45f2" dependencies = [ "clap_builder", "clap_derive", @@ -181,9 +181,9 @@ dependencies = [ [[package]] name = "clap_builder" -version = "4.4.9" +version = "4.4.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "63361bae7eef3771745f02d8d892bec2fee5f6e34af316ba556e7f97a7069ff1" +checksum = "a216b506622bb1d316cd51328dce24e07bdff4a6128a47c7e7fad11878d5adbb" dependencies = [ "anstream", "anstyle", @@ -223,9 +223,9 @@ checksum = "f7144d30dcf0fafbce74250a3963025d8d52177934239851c917d29f1df280c2" [[package]] name = "core-foundation" -version = "0.9.3" +version = "0.9.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "194a7a9e6de53fa55116934067c844d9d749312f75c6f6d0980e8c252f8c2146" +checksum = "91e195e091a93c46f7102ec7818a2aa394e1e1771c3ab4825963fa03e45afb8f" dependencies = [ "core-foundation-sys", "libc", @@ -233,9 +233,9 @@ dependencies = [ [[package]] name = "core-foundation-sys" -version = "0.8.4" +version = "0.8.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e496a50fda8aacccc86d7529e2c1e0892dbd0f898a6b5645b5561b89c3210efa" +checksum = "06ea2b9bc92be3c2baa9334a323ebca2d6f074ff852cd1d7b11064035cd3868f" [[package]] name = "crossbeam-deque" @@ -513,7 +513,7 @@ version = "0.5.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "5444c27eef6923071f7ebcc33e3444508466a76f7a2b93da00ed6e19f30c1ddb" dependencies = [ - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -696,9 +696,9 @@ checksum = "89d92a4743f9a61002fae18374ed11e7973f530cb3a3255fb354818118b2203c" [[package]] name = "linux-raw-sys" -version = "0.4.11" +version = "0.4.12" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "969488b55f8ac402214f3f5fd243ebb7206cf82de60d3172994707a4bcc2b829" +checksum = "c4cd1a83af159aa67994778be9070f0ae1bd732942279cabb14f86f986a21456" [[package]] name = "log" @@ -747,13 +747,13 @@ dependencies = [ [[package]] name = "mio" -version = "0.8.9" +version = "0.8.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3dce281c5e46beae905d4de1870d8b1509a9142b62eedf18b443b011ca8343d0" +checksum = "8f3d0b296e374a4e6f3c7b0a1f5a51d748a0d34c85e7dc48fc3fa9a87657fe09" dependencies = [ "libc", "wasi", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -811,9 +811,9 @@ checksum = "dd8b5dd2ae5ed71462c540258bedcb51965123ad7e7ccf4b9a8cafaa4a63576d" [[package]] name = "openssl" -version = "0.10.60" +version = "0.10.61" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "79a4c6c3a2b158f7f8f2a2fc5a969fa3a068df6fc9dbb4a43845436e3af7c800" +checksum = "6b8419dc8cc6d866deb801274bba2e6f8f6108c1bb7fcc10ee5ab864931dbb45" dependencies = [ "bitflags 2.4.1", "cfg-if", @@ -843,9 +843,9 @@ checksum = "ff011a302c396a5197692431fc1948019154afc178baf7d8e37367442a4601cf" [[package]] name = "openssl-sys" -version = "0.9.96" +version = "0.9.97" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3812c071ba60da8b5677cc12bcb1d42989a65553772897a7e0355545a819838f" +checksum = "c3eaad34cdd97d81de97964fc7f29e2d104f483840d906ef56daa1912338460b" dependencies = [ "cc", "libc", @@ -1039,15 +1039,15 @@ checksum = "d626bb9dae77e28219937af045c257c28bfd3f69333c512553507f5f9798cb76" [[package]] name = "rustix" -version = "0.38.25" +version = "0.38.26" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dc99bc2d4f1fed22595588a013687477aedf3cdcfb26558c559edb67b4d9b22e" +checksum = "9470c4bf8246c8daf25f9598dca807fb6510347b1e1cfa55749113850c79d88a" dependencies = [ "bitflags 2.4.1", "errno", "libc", "linux-raw-sys", - "windows-sys 0.48.0", + "windows-sys 0.52.0", ] [[package]] @@ -1062,7 +1062,7 @@ version = "0.1.22" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0c3733bf4cf7ea0880754e19cb5a462007c4a8c1914bff372ccc95b464f1df88" dependencies = [ - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -1200,7 +1200,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "7b5fac59a5cb5dd637972e5fca70daf0523c9067fcdc4842f053dae04a18f8e9" dependencies = [ "libc", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -1330,7 +1330,7 @@ dependencies = [ "fastrand", "redox_syscall", "rustix", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -1400,7 +1400,7 @@ dependencies = [ "num_cpus", "pin-project-lite", "socket2 0.5.5", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -1697,7 +1697,7 @@ dependencies = [ "home", "once_cell", "rustix", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -1871,9 +1871,9 @@ checksum = "dff9641d1cd4be8d1a070daf9e3773c5f67e78b4d9d42263020c057706765c04" [[package]] name = "winnow" -version = "0.5.19" +version = "0.5.25" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "829846f3e3db426d4cee4510841b71a8e58aa2a76b1132579487ae430ccd9c7b" +checksum = "b7e87b8dfbe3baffbe687eef2e164e32286eff31a5ee16463ce03d991643ec94" dependencies = [ "memchr", ] @@ -1885,7 +1885,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "524e57b2c537c0f9b1e69f1965311ec12182b4122e45035b1508cd24d2adadb1" dependencies = [ "cfg-if", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] From f041e58abecd66c7b02d9174ec57fc7151ddc03d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 6 Dec 2023 19:40:36 +0100 Subject: [PATCH 12/14] add (some) patched stm32 svds and switch default to STM32F103 --- ci/svd2rust-regress/src/diff.rs | 2 +- ci/svd2rust-regress/tests.yml | 121 +++++++++++++++++++++++++------- 2 files changed, 97 insertions(+), 26 deletions(-) diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index 2bfb0d64..7873d5c9 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -171,7 +171,7 @@ impl Diffing { (1, _) => tests[0], (1.., Some(DiffingMode::Pr)) => tests .iter() - .find(|t| t.chip == "STM32F401") + .find(|t| t.chip == "STM32F103") .unwrap_or(&tests[0]), _ => { let error = anyhow::anyhow!("diff requires exactly one test case"); diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index 1d6c0000..d1d68d4e 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -2209,6 +2209,102 @@ chip: STM32F030 should_pass: true run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32F0x2 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f0x2.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32F103 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f103.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32F411 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f411.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32F469 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f469.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x3 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f7x3.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32G070 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32g070.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32G473 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32g473.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32H753 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32h753.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32L0x3 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l0x3.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32L162 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l162.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32L4x6 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l4x6.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32L562 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l562.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32MP157 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32mp157.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32WB55 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32wb55.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32WLE5 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32wle5.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32C011 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32c011.svd.patched + should_pass: true + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F031x @@ -2249,11 +2345,6 @@ chip: STM32F102xx should_pass: true run_when: always -- arch: cortex-m - mfgr: STMicro - chip: STM32F103xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F105xx @@ -2319,11 +2410,6 @@ chip: STM32F410 should_pass: true run_when: always -- arch: cortex-m - mfgr: STMicro - chip: STM32F411 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F412 @@ -2349,11 +2435,6 @@ chip: STM32F446 should_pass: true run_when: always -- arch: cortex-m - mfgr: STMicro - chip: STM32F469 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x @@ -2364,11 +2445,6 @@ chip: STM32F7x2 should_pass: true run_when: always -- arch: cortex-m - mfgr: STMicro - chip: STM32F7x3 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x5 @@ -2449,11 +2525,6 @@ chip: STM32L1xx should_pass: true run_when: always -- arch: cortex-m - mfgr: STMicro - chip: STM32L4x6 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32W108 From 848ca10cb38ea3c12c4a34fa8e042343975843fe Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 6 Dec 2023 19:53:36 +0100 Subject: [PATCH 13/14] minimize tests.yml --- ci/svd2rust-regress/src/main.rs | 2 +- ci/svd2rust-regress/src/tests.rs | 9 +- ci/svd2rust-regress/tests.yml | 502 ------------------------------- 3 files changed, 9 insertions(+), 504 deletions(-) diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index a4bec671..a8c1d246 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -106,7 +106,7 @@ pub struct TestOpts { impl TestOpts { fn run(&self, opt: &Opts) -> Result<(), anyhow::Error> { - let tests = tests::tests(None)? + let tests = tests::tests(Some(&opt.test_cases))? .iter() // Short test? .filter(|t| t.should_run(!self.long_test)) diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index c77e57c5..7cd31024 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -54,9 +54,10 @@ impl std::fmt::Display for Manufacturer { } } -#[derive(Debug, serde::Serialize, serde::Deserialize)] +#[derive(Debug, serde::Serialize, serde::Deserialize, Default)] #[serde(rename_all = "kebab-case")] pub enum RunWhen { + #[default] Always, NotShort, @@ -71,10 +72,16 @@ pub struct TestCase { pub chip: String, #[serde(default, skip_serializing_if = "Option::is_none")] svd_url: Option, + #[serde(default = "true_")] pub should_pass: bool, + #[serde(default)] run_when: RunWhen, } +fn true_() -> bool { + true +} + impl TestCase { pub fn svd_url(&self) -> String { match &self.svd_url { diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index d1d68d4e..a1dadb4a 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -442,8 +442,6 @@ - arch: cortex-m mfgr: Freescale chip: MK02F12810 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK10D10 @@ -457,8 +455,6 @@ - arch: cortex-m mfgr: Freescale chip: MK10D7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK10DZ10 @@ -472,8 +468,6 @@ - arch: cortex-m mfgr: Freescale chip: MK11D5 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK11D5WS @@ -487,8 +481,6 @@ - arch: cortex-m mfgr: Freescale chip: MK12D5 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK20D10 @@ -502,8 +494,6 @@ - arch: cortex-m mfgr: Freescale chip: MK20D7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK20DZ10 @@ -517,8 +507,6 @@ - arch: cortex-m mfgr: Freescale chip: MK21D5 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK21D5WS @@ -532,8 +520,6 @@ - arch: cortex-m mfgr: Freescale chip: MK21F12 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK21FA12 @@ -547,8 +533,6 @@ - arch: cortex-m mfgr: Freescale chip: MK22F12 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK22F12810 @@ -562,8 +546,6 @@ - arch: cortex-m mfgr: Freescale chip: MK22F51212 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK22FA12 @@ -577,8 +559,6 @@ - arch: cortex-m mfgr: Freescale chip: MK24F25612 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK26F18 @@ -592,8 +572,6 @@ - arch: cortex-m mfgr: Freescale chip: MK30D7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK30DZ10 @@ -607,8 +585,6 @@ - arch: cortex-m mfgr: Freescale chip: MK40D7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK40DZ10 @@ -622,8 +598,6 @@ - arch: cortex-m mfgr: Freescale chip: MK50D7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK50DZ10 @@ -637,8 +611,6 @@ - arch: cortex-m mfgr: Freescale chip: MK51D7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK51DZ10 @@ -652,8 +624,6 @@ - arch: cortex-m mfgr: Freescale chip: MK52DZ10 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK53D10 @@ -667,8 +637,6 @@ - arch: cortex-m mfgr: Freescale chip: MK60D10 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK60DZ10 @@ -682,8 +650,6 @@ - arch: cortex-m mfgr: Freescale chip: MK63F12 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK64F12 @@ -697,8 +663,6 @@ - arch: cortex-m mfgr: Freescale chip: MK66F18 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK80F25615 @@ -712,8 +676,6 @@ - arch: cortex-m mfgr: Freescale chip: MK82F25615 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKE14F16 @@ -727,8 +689,6 @@ - arch: cortex-m mfgr: Freescale chip: MKE15Z7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKE16F16 @@ -742,8 +702,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL28T7_CORE0 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL28T7_CORE1 @@ -757,8 +715,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL81Z7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL82Z7 @@ -772,8 +728,6 @@ - arch: cortex-m mfgr: Freescale chip: MKV10Z1287 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKV10Z7 @@ -787,8 +741,6 @@ - arch: cortex-m mfgr: Freescale chip: MKV30F12810 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKV31F12810 @@ -802,8 +754,6 @@ - arch: cortex-m mfgr: Freescale chip: MKV31F51212 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKV40F15 @@ -817,8 +767,6 @@ - arch: cortex-m mfgr: Freescale chip: MKV43F15 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKV44F15 @@ -832,8 +780,6 @@ - arch: cortex-m mfgr: Freescale chip: MKV45F15 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKV46F15 @@ -847,8 +793,6 @@ - arch: cortex-m mfgr: Freescale chip: MKW20Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKW21D5 @@ -862,8 +806,6 @@ - arch: cortex-m mfgr: Freescale chip: MKW22D5 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKW24D5 @@ -877,8 +819,6 @@ - arch: cortex-m mfgr: Freescale chip: MKW31Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKW40Z4 @@ -892,8 +832,6 @@ - arch: cortex-m mfgr: Freescale chip: MKE02Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKE04Z1284 @@ -907,8 +845,6 @@ - arch: cortex-m mfgr: Freescale chip: MKE06Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKE14D7 @@ -922,8 +858,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL02Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL03Z4 @@ -937,8 +871,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL05Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL13Z644 @@ -952,8 +884,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL15Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL16Z4 @@ -967,8 +897,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL17Z644 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL24Z4 @@ -982,8 +910,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL26Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL27Z4 @@ -997,8 +923,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL33Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL33Z644 @@ -1012,8 +936,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL36Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL43Z4 @@ -1027,8 +949,6 @@ - arch: cortex-m mfgr: Freescale chip: MKM14ZA5 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKM33ZA5 @@ -1042,8 +962,6 @@ - arch: cortex-m mfgr: Freescale chip: MKM34ZA5 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKW01Z4 @@ -1057,8 +975,6 @@ - arch: cortex-m mfgr: Freescale chip: SKEAZN642 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: SKEAZN84 @@ -1067,523 +983,315 @@ - arch: cortex-m mfgr: Fujitsu chip: MB9AF10xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF10xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF12xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF12xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF14xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF14xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF14xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF15xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF15xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF15xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF1AxL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF1AxM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF1AxN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF34xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF34xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF34xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF42xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF42xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA3xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA3xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA3xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA4xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA4xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA4xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFAAxL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFAAxM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFAAxN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFB4xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFB4xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFB4xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B160L - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B160R - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B360L - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B360R - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B460L - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B460R - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B560L - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B560R - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF10xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF10xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xJ - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF21xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF21xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF30xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF30xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF40xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF40xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF42xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF42xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF50xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF50xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF61xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF61xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BFD1xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BFD1xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: S6E1A1 - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: S6E2CC - should_pass: true - run_when: always - arch: cortex-m mfgr: Holtek chip: ht32f125x - should_pass: true - run_when: always - arch: cortex-m mfgr: Holtek chip: ht32f175x - should_pass: true - run_when: always - arch: cortex-m mfgr: Holtek chip: ht32f275x - should_pass: true - run_when: always - arch: cortex-m mfgr: Nordic chip: nrf51 - should_pass: true - run_when: always - arch: cortex-m mfgr: Nordic chip: nrf52 @@ -1857,8 +1565,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF10xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF11xK @@ -1867,8 +1573,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF11xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF11xM @@ -1877,8 +1581,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF11xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF13xK @@ -1887,8 +1589,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF13xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF13xM @@ -1897,8 +1597,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF13xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF14xL @@ -1907,8 +1605,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF14xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF14xN @@ -1917,8 +1613,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF15xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF15xN @@ -1927,8 +1621,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF15xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF31xK @@ -1937,8 +1629,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF31xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF31xM @@ -1947,8 +1637,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF31xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF34xL @@ -1957,8 +1645,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF34xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF34xN @@ -1967,8 +1653,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AFA3xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFA3xM @@ -1977,8 +1661,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AFA3xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFA4xL @@ -1987,8 +1669,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AFA4xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFA4xN @@ -1997,8 +1677,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AFB4xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFB4xM @@ -2007,8 +1685,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AFB4xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF10xN @@ -2017,8 +1693,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF10xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF11xN @@ -2027,8 +1701,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF11xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF11xS @@ -2037,8 +1709,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF11xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF12xK @@ -2047,8 +1717,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF12xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF12xM @@ -2057,8 +1725,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF21xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF21xT @@ -2067,8 +1733,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF30xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF30xR @@ -2077,8 +1741,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF31xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF31xR @@ -2087,8 +1749,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF31xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF31xT @@ -2097,8 +1757,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF32xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF32xL @@ -2107,8 +1765,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF32xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF40xN @@ -2117,8 +1773,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF40xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF41xN @@ -2127,8 +1781,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF41xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF41xS @@ -2137,8 +1789,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF41xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF50xN @@ -2147,8 +1797,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF50xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF51xN @@ -2157,8 +1805,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF51xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF51xS @@ -2167,8 +1813,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF51xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF52xK @@ -2177,8 +1821,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF52xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF52xM @@ -2187,8 +1829,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF61xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF61xT @@ -2197,8 +1837,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BFD1xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BFD1xT @@ -2207,264 +1845,166 @@ - arch: cortex-m mfgr: STMicro chip: STM32F030 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F0x2 svd_url: https://stm32-rs.github.io/stm32-rs/stm32f0x2.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F103 svd_url: https://stm32-rs.github.io/stm32-rs/stm32f103.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F411 svd_url: https://stm32-rs.github.io/stm32-rs/stm32f411.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F469 svd_url: https://stm32-rs.github.io/stm32-rs/stm32f469.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x3 svd_url: https://stm32-rs.github.io/stm32-rs/stm32f7x3.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G070 svd_url: https://stm32-rs.github.io/stm32-rs/stm32g070.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G473 svd_url: https://stm32-rs.github.io/stm32-rs/stm32g473.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32H753 svd_url: https://stm32-rs.github.io/stm32-rs/stm32h753.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L0x3 svd_url: https://stm32-rs.github.io/stm32-rs/stm32l0x3.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L162 svd_url: https://stm32-rs.github.io/stm32-rs/stm32l162.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L4x6 svd_url: https://stm32-rs.github.io/stm32-rs/stm32l4x6.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L562 svd_url: https://stm32-rs.github.io/stm32-rs/stm32l562.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32MP157 svd_url: https://stm32-rs.github.io/stm32-rs/stm32mp157.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32WB55 svd_url: https://stm32-rs.github.io/stm32-rs/stm32wb55.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32WLE5 svd_url: https://stm32-rs.github.io/stm32-rs/stm32wle5.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32C011 svd_url: https://stm32-rs.github.io/stm32-rs/stm32c011.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F031x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F042x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F072x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F091x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F0xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F100xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F101xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F102xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F105xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F107xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F20x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F21x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F301 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F302 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F303 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F3x4 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F373 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F401 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F405 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F407 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F410 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F412 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F413 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F427 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F429 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F446 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x2 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x5 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x6 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x7 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x9 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G07x @@ -2473,63 +2013,39 @@ - arch: cortex-m mfgr: STMicro chip: STM32G431xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G441xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G471xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G474xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G483xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G484xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L100 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L15xC - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L15xxE - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L15xxxA - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L1xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32W108 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L051x @@ -2583,8 +2099,6 @@ - arch: cortex-m mfgr: Toshiba chip: M061 - should_pass: true - run_when: always - arch: riscv mfgr: SiFive chip: E310x @@ -2595,47 +2109,31 @@ mfgr: TexasInstruments chip: msp430g2553 svd_url: https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd - should_pass: true - run_when: always - arch: msp430 mfgr: TexasInstruments chip: msp430fr2355 svd_url: https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd - should_pass: true - run_when: always - arch: xtensa-lx mfgr: Espressif chip: esp32 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd - should_pass: true - run_when: always - arch: xtensa-lx mfgr: Espressif chip: esp32s2 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd - should_pass: true - run_when: always - arch: xtensa-lx mfgr: Espressif chip: esp32s3 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd - should_pass: true - run_when: always - arch: riscv mfgr: Espressif chip: esp32c3 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd - should_pass: true - run_when: always - arch: mips mfgr: Microchip chip: pic32mx170f256b svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched - should_pass: true - run_when: always - arch: mips mfgr: Microchip chip: pic32mx270f256b svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched - should_pass: true - run_when: always From eb0c405c648c628a32d0edda5bfbc9efeee84cf0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 6 Dec 2023 20:24:53 +0100 Subject: [PATCH 14/14] fix last arg parsing and wrong lookup for chips --- ci/svd2rust-regress/src/diff.rs | 58 +++++++++++++++++++++-------- ci/svd2rust-regress/src/svd_test.rs | 4 +- 2 files changed, 46 insertions(+), 16 deletions(-) diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index 7873d5c9..dd4623f6 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -30,7 +30,7 @@ pub struct Diffing { #[clap(subcommand)] pub sub: Option, - #[clap(long, short = 'c')] + #[clap(global = true, long, short = 'c')] pub chip: Vec, /// Filter by manufacturer, case sensitive, may be combined with other filters @@ -65,14 +65,23 @@ pub struct Diffing { pub use_pager_directly: bool, #[clap(last = true)] - pub args: Option, + pub last_args: Option, } -#[derive(clap::Parser, Debug, Clone, Copy)] +#[derive(clap::Parser, Debug, Clone)] pub enum DiffingMode { - Semver, - Diff, - Pr, + Semver { + #[clap(last = true)] + last_args: Option, + }, + Diff { + #[clap(last = true)] + last_args: Option, + }, + Pr { + #[clap(last = true)] + last_args: Option, + }, } impl DiffingMode { @@ -81,7 +90,7 @@ impl DiffingMode { /// [`Pr`]: DiffingMode::Pr #[must_use] pub fn is_pr(&self) -> bool { - matches!(self, Self::Pr) + matches!(self, Self::Pr { .. }) } } @@ -93,8 +102,8 @@ impl Diffing { let [baseline, current] = self .make_case(opts) .with_context(|| "couldn't setup test case")?; - match self.sub.unwrap_or(DiffingMode::Diff) { - DiffingMode::Diff | DiffingMode::Pr => { + match self.sub.as_ref() { + None | Some(DiffingMode::Diff { .. } | DiffingMode::Pr { .. }) => { let mut command; if let Some(pager) = &self.pager { if self.use_pager_directly { @@ -118,7 +127,7 @@ impl Diffing { .with_context(|| "couldn't run diff") .map(|_| ()) } - DiffingMode::Semver => std::process::Command::new("cargo") + Some(DiffingMode::Semver { .. }) => std::process::Command::new("cargo") .args(["semver-checks", "check-release"]) .arg("--baseline-root") .arg(baseline.0) @@ -158,7 +167,7 @@ impl Diffing { }) .filter(|t| { if self.chip.is_empty() { - false + true } else { self.chip.iter().any(|c| { wildmatch::WildMatch::new(&c.to_ascii_lowercase()) @@ -167,9 +176,9 @@ impl Diffing { } }) .collect::>(); - let test = match (tests.len(), self.sub) { + let test = match (tests.len(), self.sub.as_ref()) { (1, _) => tests[0], - (1.., Some(DiffingMode::Pr)) => tests + (_, Some(DiffingMode::Pr { .. })) => tests .iter() .find(|t| t.chip == "STM32F103") .unwrap_or(&tests[0]), @@ -187,15 +196,34 @@ impl Diffing { } }; + let last_args = self.last_args.as_deref().or(match &self.sub { + Some( + DiffingMode::Diff { last_args } + | DiffingMode::Pr { last_args } + | DiffingMode::Semver { last_args }, + ) => last_args.as_deref(), + None => None, + }); + let join = |opt1: Option<&str>, opt2: Option<&str>| -> Option { + match (opt1, opt2) { + (Some(str1), Some(str2)) => Some(format!("{} {}", str1, str2)), + (Some(str), None) | (None, Some(str)) => Some(str.to_owned()), + (None, None) => None, + } + }; let baseline = test .setup_case( &opts.output_dir.join("baseline"), &baseline_bin, - baseline_cmd, + join(baseline_cmd, last_args).as_deref(), ) .with_context(|| "couldn't create head")?; let current = test - .setup_case(&opts.output_dir.join("current"), ¤t_bin, current_cmd) + .setup_case( + &opts.output_dir.join("current"), + ¤t_bin, + join(current_cmd, last_args).as_deref(), + ) .with_context(|| "couldn't create base")?; Ok([baseline, current]) diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index fc87778e..bdb595c6 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -261,7 +261,9 @@ impl TestCase { tracing::info!("Running svd2rust"); let mut svd2rust_bin = Command::new(svd2rust_bin_path); if let Some(command) = command { - svd2rust_bin.arg(command); + if !command.is_empty() { + svd2rust_bin.arg(command); + } } svd2rust_bin .args(["-i", &chip_svd])