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194 Open 154 Closed
194 Open 154 Closed
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Issues list

Run nv_small ON FPGA ZCU102.Test = Run NN/NN_L0_1_small_fbuf But Dead here, can't keep running.
#266 opened Feb 25, 2019 by ghost
2
Can nvdla_small spec be modified with secondary SRAMIF and batch mode for NN_L0_1_small_fbuf?
#265 opened Feb 9, 2019 by nookfoo
5
about nvdla small interrupt configuration
#264 opened Jan 31, 2019 by akioolin
1
test failure in nv_small_256_full
#263 opened Jan 23, 2019 by LYB2012
More RTL Testbenches Possible?
#262 opened Jan 15, 2019 by silvaurus
Question on RTL test bench googlenet_conv2_3x3_int16
#259 opened Jan 4, 2019 by silvaurus
1
Regarding detaching of rams
#255 opened Dec 20, 2018 by gk5559
nvdla_small running on FPGA, wrong inference compared to golden results
#254 opened Dec 19, 2018 by nookfoo
8
googlenet_conv2_3x3_int16/input.txn testcase load mem address is not aligned with 512bits?
#253 opened Dec 5, 2018 by zhajio1988
Question: The purpose of D_RELEASE register
#250 opened Nov 22, 2018 by anakin1028
Redundancy in int_sum_block
#248 opened Nov 4, 2018 by redpanda3
How to use vp to extract feature map and weight?
#247 opened Oct 28, 2018 by wxbbuaa2011
How to combine FPGA and nvdla_SW
#246 opened Oct 28, 2018 by xiaoguoer
6
do you have test case for more than one pipeline ?
#245 opened Oct 26, 2018 by zhouweiscut
ITOP definition
#243 opened Oct 23, 2018 by redpanda3
Question for PDP Max Pooling
#242 opened Oct 23, 2018 by anakin1028
1
testcase for compressed weight？
#241 opened Oct 23, 2018 by kouzhentao
Verilator Sanity0 test waiting on reg_read.
#240 opened Oct 20, 2018 by shashank-natesh
pipe_p3
#239 opened Oct 20, 2018 by redpanda3
bug: NV_NVDLA_CDMA_wt.wt_wr_dmatx_cnt, clock is gated when decrease
#235 opened Oct 17, 2018 by kouzhentao
1
Reg_le in SDP_CORE_Y_Iut
#234 opened Oct 16, 2018 by redpanda3
Naming Issue in reg2dp
#233 opened Oct 16, 2018 by redpanda3
Use VP print the register instruction to make the input.txn
#232 opened Oct 16, 2018 by wxbbuaa2011
2
About the Scalability parameters and ConfigROM
#230 opened Oct 11, 2018 by shgangchen
7
How the input.txn file is generated？
#226 opened Oct 7, 2018 by wxbbuaa2011
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