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Run nv_small ON FPGA ZCU102.Test = Run NN/NN_L0_1_small_fbuf But Dead here, can't keep running.
#266
opened Feb 25, 2019 by
ghost
Can nvdla_small spec be modified with secondary SRAMIF and batch mode for NN_L0_1_small_fbuf?
#265
opened Feb 9, 2019 by
nookfoo
nvdla_small running on FPGA, wrong inference compared to golden results
#254
opened Dec 19, 2018 by
nookfoo
googlenet_conv2_3x3_int16/input.txn testcase load mem address is not aligned with 512bits?
#253
opened Dec 5, 2018 by
zhajio1988
bug: NV_NVDLA_CDMA_wt.wt_wr_dmatx_cnt, clock is gated when decrease
#235
opened Oct 17, 2018 by
kouzhentao
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