From 905132b36620893baca1c66edfaf2d06be0cede5 Mon Sep 17 00:00:00 2001 From: Peter Li Date: Thu, 17 May 2018 19:53:06 -0700 Subject: [PATCH 01/28] Setup dedicated testplan for regression resource analysis --- verif/regression/testplans/nv_small_plrc.py | 8 ++ .../testplans/nv_small_test_list_plrc.py | 123 ++++++++++++++++++ 2 files changed, 131 insertions(+) create mode 100644 verif/regression/testplans/nv_small_plrc.py create mode 100644 verif/regression/testplans/nv_small_test_list_plrc.py diff --git a/verif/regression/testplans/nv_small_plrc.py b/verif/regression/testplans/nv_small_plrc.py new file mode 100644 index 00000000..011e1322 --- /dev/null +++ b/verif/regression/testplans/nv_small_plrc.py @@ -0,0 +1,8 @@ +test_plan.load_test_list(os.path.join(test_plan_dir,'nvdla_test_list_common.py')) +test_plan.load_test_list(os.path.join(test_plan_dir,'nv_small_test_list_plrc.py')) +#print "nvdla_unit::load following tests" +#test_plan.print_full_test_list() +test_plan.set_test_bench_filter(['nvdla_utb']) +test_plan.update_test_list_by_test_bench() +#print "nvdla_unit::filter tests by test bench" +#test_plan.print_full_test_list() diff --git a/verif/regression/testplans/nv_small_test_list_plrc.py b/verif/regression/testplans/nv_small_test_list_plrc.py new file mode 100644 index 00000000..80cd2be6 --- /dev/null +++ b/verif/regression/testplans/nv_small_test_list_plrc.py @@ -0,0 +1,123 @@ +for i in range(plan_arguments['RUN_NUM']): + ############################################# CC ############################################# + add_test(name='cc_feature_rtest', + tags=['cc'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' None reuse CC random case, input data format is fixed as feature ''') + + add_test(name='cc_pitch_rtest', + tags=['cc'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' None reuse CC random case, input data format is fixed as image ''') + + add_test(name='cc_rtest', + tags=['cc'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' None reuse CC random case ''') + + add_test(name='cc_sdprdma_sdp_rtest', + tags=['cc','sdp','sdprdma'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' random case: CC+SDP+SDPRDMA ''') + + add_test(name='cc_sdprdma_sdp_pdp_rtest', + tags=['cc','sdp','sdprdma','pdp'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' random case: CC+SDP+SDPRDMA+PDP ''') + + + add_test(name='cc_sdp_pdp_rtest', + tags=['cc','sdp','pdp'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' random case: CC+SDP+PDP ''') + + add_test(name='sdprdma_sdp_pdp_rtest', + tags=['sdp','sdprdma','pdp'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' random case: SDPRDMA+SDP+PDP ''') + + + ############################################## PDP ############################################# + + add_test(name='pdp_split_rtest', + tags=['pdp'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' PDP random case, fixed to split mode ''') + + add_test(name='pdp_non_split_rtest', + tags=['pdp'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' PDP random case, fixed to non-split mode ''') + + add_test(name='pdp_rtest', + tags=['pdp'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' PDP random case ''') + + + ############################################# SDP ############################################# + + add_test(name='sdp_bs_rtest', + tags=['sdp'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' SDP offline random case, with BS enabled and not bypassed ''') + + add_test(name='sdp_bn_rtest', + tags=['sdp'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' SDP offline random case, with BN enabled and not bypassed ''') + + add_test(name='sdp_rtest', + tags=['sdp'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' SDP offline random case ''') + + ############################################# CDP ############################################# + + add_test(name='cdp_exp_rtest', + tags=['cdp'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' CDP random case, fixed to EXPONENT mode of LE LUT ''') + + add_test(name='cdp_lin_rtest', + tags=['cdp'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' CDP random case, fixed to LINEAR mode of LE LUT ''') + + add_test(name='cdp_rtest', + tags=['cdp'], + args=[' -rtlarg +uvm_set_config_int=uvm_test_top,layers,%d ' % plan_arguments['LAYER_NUM'], get_seed_args(), DISABLE_COMPARE_ALL_UNITS_SB_ARG], + module='nvdla_uvm_test', + config=['nvdla_utb'], + desc=''' CDP random case ''') + From 46726e69ddc6c2811acf9ee51ecc2c57dd9e3238 Mon Sep 17 00:00:00 2001 From: Yilin Zhang Date: Thu, 17 May 2018 20:25:52 -0700 Subject: [PATCH 02/28] bugfix: fixed a potnetial bug in sdp which might leads to memory corruption --- cmod/sdp/NV_NVDLA_sdp.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/cmod/sdp/NV_NVDLA_sdp.cpp b/cmod/sdp/NV_NVDLA_sdp.cpp index 7eda6d05..126b5980 100644 --- a/cmod/sdp/NV_NVDLA_sdp.cpp +++ b/cmod/sdp/NV_NVDLA_sdp.cpp @@ -1026,7 +1026,7 @@ void NV_NVDLA_sdp::SdpDataOperationDC() { if (NVDLA_SDP_D_FEATURE_MODE_CFG_0_OUTPUT_DST_MEM == sdp_output_dst_) { int16_t *temp_ptr = new int16_t[SDP_PARALLEL_PROC_NUM]; cslAssert((temp_ptr != NULL)); - memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, ATOM_CUBE_SIZE); + memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, SDP_PARALLEL_PROC_NUM*sizeof(int16_t)); // Output destination is memory cslDebug((70, "NV_NVDLA_sdp::%s, DP->WDMA\n", __FUNCTION__)); for(int i=0;iwrite(temp_ptr); //8B cslDebug((50, "after write wdma_fifo_\n")); @@ -1303,7 +1303,7 @@ void NV_NVDLA_sdp::SdpDataOperationWG() { } else { int16_t *temp_ptr = new int16_t[SDP_PARALLEL_PROC_NUM]; cslAssert((temp_ptr != NULL)); - memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, ATOM_CUBE_SIZE); + memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, SDP_PARALLEL_PROC_NUM*sizeof(int16_t)); wdma_fifo_->write(temp_ptr); //8B cslDebug((50, " write wdma_fifo_\n")); } From d055a5dae4beb9c02515901e9c93520150439508 Mon Sep 17 00:00:00 2001 From: Peter Li Date: Fri, 18 May 2018 08:23:51 -0700 Subject: [PATCH 03/28] Remove duplicated analysis port --- verif/vip/dbb_agent/dbb_monitor.sv | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/verif/vip/dbb_agent/dbb_monitor.sv b/verif/vip/dbb_agent/dbb_monitor.sv index a0326964..232bf7dd 100644 --- a/verif/vip/dbb_agent/dbb_monitor.sv +++ b/verif/vip/dbb_agent/dbb_monitor.sv @@ -159,8 +159,6 @@ class dbb_monitor#(int MEM_DATA_WIDTH=512) extends uvm_monitor; uvm_tlm_time tlm_time; - uvm_analysis_port#(uvm_tlm_gp) analysis_port; - /// Track how many txns are in flight at once. int outstanding_txns; @@ -422,12 +420,11 @@ function dbb_monitor::new(string name = "dbb_monitor", super.new(name, parent); tID = get_type_name().toupper(); - analysis_port = new("analysis_port", this); cycle_count = 0; total_txns = 0; - mon_analysis_port = new ("mon_analysis_port", this); + mon_analysis_port = new ("mon_analysis_port", this); mon_analysis_port_request = new ("mon_analysis_port_request", this); // Create event objects @@ -1252,7 +1249,6 @@ function void dbb_monitor::transaction_finished(uvm_tlm_gp tr); `uvm_info("NVDLA/DBB/MON/TR_FINISH", $psprintf("Starting pre_send_checks for above tr.", tr_helper.print(tr)),UVM_FULL) tr_helper.pre_send_checks(tr); // Always write to analysis port - analysis_port.write(tr); mon_analysis_port.write(tr); `uvm_info("NVDLA/DBB/MON/TXN_TRACE", From f8ddebaeaf28446e3b72b10fd95cbcbebc793623 Mon Sep 17 00:00:00 2001 From: Peter Li Date: Fri, 18 May 2018 08:30:53 -0700 Subject: [PATCH 04/28] Add missing SDP DMA scoreboard compare mode control variables --- .../testplans/nvdla_test_list_common.py | 26 ++++++++++++++----- 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/verif/regression/testplans/nvdla_test_list_common.py b/verif/regression/testplans/nvdla_test_list_common.py index 07b4ec95..7250204b 100644 --- a/verif/regression/testplans/nvdla_test_list_common.py +++ b/verif/regression/testplans/nvdla_test_list_common.py @@ -65,18 +65,32 @@ def get_seed_args(min=1,max=100000): # ============================================================================= DISABLE_COMPARE_SDP2PDP_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_compare_mode,COMPARE_MODE_DISABLE'" -DISABLE_COMPARE_SDP_PRI_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_pri_mem_response_compare_mode,COMPARE_MODE_DISABLE'" -DISABLE_COMPARE_SDP_SEC_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_sec_mem_response_compare_mode,COMPARE_MODE_DISABLE'" -DISABLE_COMPARE_SDP_N_PRI_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_n_pri_mem_response_compare_mode,COMPARE_MODE_DISABLE'" -DISABLE_COMPARE_SDP_E_PRI_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_e_pri_mem_response_compare_mode,COMPARE_MODE_DISABLE'" -DISABLE_COMPARE_SDP_B_PRI_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_b_pri_mem_response_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_PRI_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_pri_mem_request_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_N_PRI_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_n_pri_mem_request_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_E_PRI_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_e_pri_mem_request_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_B_PRI_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_b_pri_mem_request_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_PRI_MEM_SB_ARG += " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_pri_mem_response_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_N_PRI_MEM_SB_ARG += " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_n_pri_mem_response_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_E_PRI_MEM_SB_ARG += " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_e_pri_mem_response_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_B_PRI_MEM_SB_ARG += " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_b_pri_mem_response_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_SEC_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_sec_mem_request_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_N_SEC_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_n_sec_mem_request_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_E_SEC_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_e_sec_mem_request_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_B_SEC_MEM_SB_ARG = " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_b_sec_mem_request_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_SEC_MEM_SB_ARG += " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_sec_mem_response_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_N_SEC_MEM_SB_ARG += " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_n_sec_mem_response_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_E_SEC_MEM_SB_ARG += " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_e_sec_mem_response_compare_mode,COMPARE_MODE_DISABLE'" +DISABLE_COMPARE_SDP_B_SEC_MEM_SB_ARG += " -rtlarg '+uvm_set_config_string=uvm_test_top,sdp_b_sec_mem_response_compare_mode,COMPARE_MODE_DISABLE'" DISABLE_COMPARE_SDP_SB_ARG = ( DISABLE_COMPARE_SDP2PDP_SB_ARG + DISABLE_COMPARE_SDP_PRI_MEM_SB_ARG - + DISABLE_COMPARE_SDP_SEC_MEM_SB_ARG + DISABLE_COMPARE_SDP_N_PRI_MEM_SB_ARG + DISABLE_COMPARE_SDP_E_PRI_MEM_SB_ARG + DISABLE_COMPARE_SDP_B_PRI_MEM_SB_ARG + + DISABLE_COMPARE_SDP_SEC_MEM_SB_ARG + + DISABLE_COMPARE_SDP_N_SEC_MEM_SB_ARG + + DISABLE_COMPARE_SDP_E_SEC_MEM_SB_ARG + + DISABLE_COMPARE_SDP_B_SEC_MEM_SB_ARG ) # ============================================================================= From 45a83c522f5cf406fa3b7d7efeec7f10f22ad88c Mon Sep 17 00:00:00 2001 From: Peter Li Date: Fri, 18 May 2018 09:42:10 -0700 Subject: [PATCH 05/28] Use uvm config field to control connection between RTL monitor and scoreboard --- .../trace_player/nvdla_tb_base_test.sv | 1364 ++++++++++++++++- verif/testbench/trace_player/nvdla_tb_env.sv | 808 +++++++++- 2 files changed, 2130 insertions(+), 42 deletions(-) diff --git a/verif/testbench/trace_player/nvdla_tb_base_test.sv b/verif/testbench/trace_player/nvdla_tb_base_test.sv index ef3060db..a61b4268 100644 --- a/verif/testbench/trace_player/nvdla_tb_base_test.sv +++ b/verif/testbench/trace_player/nvdla_tb_base_test.sv @@ -8,6 +8,23 @@ // @description //------------------------------------------------------------------------------------- +//:| global project +//:| import project +//:| global dma_list +//:| dma_list = ["cdma_wt", "cdma_dat", "sdp"] +//:| if "NVDLA_SDP_BS_ENABLE" in project.PROJVAR: dma_list.append("sdp_b") +//:| if "NVDLA_SDP_BN_ENABLE" in project.PROJVAR: dma_list.append("sdp_n") +//:| if "NVDLA_SDP_EW_ENABLE" in project.PROJVAR: dma_list.append("sdp_e") +//:| if "NVDLA_PDP_ENABLE" in project.PROJVAR: dma_list.append("pdp") +//:| if "NVDLA_CDP_ENABLE" in project.PROJVAR: dma_list.append("cdp") +//:| if "NVDLA_BDMA_ENABLE" in project.PROJVAR: dma_list.append("bdma") +//:| if "NVDLA_RUBIK_ENABLE" in project.PROJVAR: dma_list.append("rbk") +//:| global mem_intf_list +//:| mem_intf_list = ["pri_mem"] +//:| if "NVDLA_SECONDARY_MEMIF_ENABLE" in project.PROJVAR: +//:| mem_intf_list.append("sec_mem") +//:) epython: generated_beg (DO NOT EDIT BELOW) +//:) epython: generated_end (DO NOT EDIT ABOVE) class nvdla_tb_base_test extends uvm_test; string tID; @@ -23,6 +40,10 @@ class nvdla_tb_base_test extends uvm_test; string sec_memif_random_enable = "DISABLE"; string work_mode = "CROSS_CHECK"; + //:| memory_interface_list = mem_intf_list + //:| for inst in memory_interface_list: + //:| print(' string %s_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE";' % inst) + //:| print(' string %s_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE";' % inst) //:| internal_instance_list = [ //:| 'csc_dat_a' , //:| 'csc_dat_b' , @@ -35,14 +56,41 @@ class nvdla_tb_base_test extends uvm_test; //:| ] //:| for inst in internal_instance_list: //:| print(' string %s_compare_mode = "COMPARE_MODE_LOOSE_COMPARE";' % inst) + //:) epython: generated_beg (DO NOT EDIT BELOW) + string pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string csc_dat_a_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string csc_dat_b_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string csc_wt_a_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string csc_wt_b_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cmac_a_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cmac_b_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cacc_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + //:) epython: generated_end (DO NOT EDIT ABOVE) //:| - //:| dma_list = ['bdma', 'sdp', 'pdp', 'cdp', 'rbk', 'sdp_b', 'sdp_n', 'sdp_e', 'cdma_dat', 'cdma_wt'] - //:| mem_if_list = ['pri_mem', 'sec_mem'] + //:| mem_if_list = mem_intf_list //:| kind_list = ['request', 'response'] //:| for dma in dma_list: //:| for mem_if in mem_if_list: //:| for kind in kind_list: //:| print(' string %(dma)s_%(mem_if)s_%(kind)s_compare_mode = "COMPARE_MODE_LOOSE_COMPARE";' % {'dma':dma, 'mem_if':mem_if, 'kind':kind}) + //:) epython: generated_beg (DO NOT EDIT BELOW) + string cdma_wt_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cdma_wt_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cdma_dat_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cdma_dat_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_b_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_b_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_n_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_n_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string pdp_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string pdp_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cdp_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cdp_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + //:) epython: generated_end (DO NOT EDIT ABOVE) //----------------------------------------------------------CONFIGURATION PARAMETERS // NVDLA_TB_BASE_TEST Configuration Parameters. These parameters can be controlled @@ -53,6 +101,10 @@ class nvdla_tb_base_test extends uvm_test; `uvm_component_utils_begin(nvdla_tb_base_test) `uvm_field_string(work_mode, UVM_ALL_ON) + //:| memory_interface_list = mem_intf_list + //:| for inst in memory_interface_list: + //:| print(" `uvm_field_string(%s_request_compare_mode, UVM_ALL_ON)" % inst) + //:| print(" `uvm_field_string(%s_response_compare_mode, UVM_ALL_ON)" % inst) //:| internal_instance_list = [ //:| 'csc_dat_a' , //:| 'csc_dat_b' , @@ -65,14 +117,41 @@ class nvdla_tb_base_test extends uvm_test; //:| ] //:| for inst in internal_instance_list: //:| print(" `uvm_field_string(%s_compare_mode, UVM_ALL_ON)" % inst) + //:) epython: generated_beg (DO NOT EDIT BELOW) + `uvm_field_string(pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(csc_dat_a_compare_mode, UVM_ALL_ON) + `uvm_field_string(csc_dat_b_compare_mode, UVM_ALL_ON) + `uvm_field_string(csc_wt_a_compare_mode, UVM_ALL_ON) + `uvm_field_string(csc_wt_b_compare_mode, UVM_ALL_ON) + `uvm_field_string(cmac_a_compare_mode, UVM_ALL_ON) + `uvm_field_string(cmac_b_compare_mode, UVM_ALL_ON) + `uvm_field_string(cacc_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_compare_mode, UVM_ALL_ON) + //:) epython: generated_end (DO NOT EDIT ABOVE) //:| - //:| dma_list = ['bdma', 'sdp', 'pdp', 'cdp', 'rbk', 'sdp_b', 'sdp_n', 'sdp_e', 'cdma_dat', 'cdma_wt'] - //:| mem_if_list = ['pri_mem', 'sec_mem'] + //:| mem_if_list = mem_intf_list //:| kind_list = ['request', 'response'] //:| for dma in dma_list: //:| for mem_if in mem_if_list: //:| for kind in kind_list: //:| print(" `uvm_field_string(%(dma)s_%(mem_if)s_%(kind)s_compare_mode, UVM_ALL_ON)" % {'dma':dma, 'mem_if':mem_if, 'kind':kind}) + //:) epython: generated_beg (DO NOT EDIT BELOW) + `uvm_field_string(cdma_wt_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(cdma_wt_pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(cdma_dat_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(cdma_dat_pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_b_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_b_pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_n_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_n_pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(pdp_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(pdp_pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(cdp_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(cdp_pri_mem_response_compare_mode, UVM_ALL_ON) + //:) epython: generated_end (DO NOT EDIT ABOVE) `uvm_component_utils_end extern function new(string name = "nvdla_tb_base_test", uvm_component parent = null); @@ -139,6 +218,56 @@ function void nvdla_tb_base_test::build_phase(uvm_phase phase); `uvm_info(tID, $sformatf("Setting WORK_MODE:%0s", work_mode), UVM_MEDIUM) end + // Setup tb_env + //:| memory_interface_list = mem_intf_list + //:| for inst in memory_interface_list: + //:| print(' uvm_config_db#(string)::set(this, "*", "%(inst)s_request_compare_mode", %(inst)s_request_compare_mode);' % {'inst':inst}) + //:| print(' uvm_config_db#(string)::set(this, "*", "%(inst)s_response_compare_mode", %(inst)s_response_compare_mode);' % {'inst':inst}) + //:| internal_instance_list = [ + //:| 'csc_dat_a' , + //:| 'csc_dat_b' , + //:| 'csc_wt_a' , + //:| 'csc_wt_b' , + //:| 'cmac_a' , + //:| 'cmac_b' , + //:| 'cacc' , + //:| 'sdp' , + //:| ] + //:| for inst in internal_instance_list: + //:| print(' uvm_config_db#(string)::set(this, "*", "%(inst)s_compare_mode", %(inst)s_compare_mode);' % {'inst':inst}) + //:| mem_if_list = mem_intf_list + //:| kind_list = ['request', 'response'] + //:| for dma in dma_list: + //:| for mem_if in mem_if_list: + //:| for kind in kind_list: + //:| print(' uvm_config_db#(string)::set(this, "*", "%(dma)s_%(mem_if)s_%(kind)s_compare_mode", %(dma)s_%(mem_if)s_%(kind)s_compare_mode);' % {'dma':dma, 'mem_if':mem_if, 'kind':kind}) + //:) epython: generated_beg (DO NOT EDIT BELOW) + uvm_config_db#(string)::set(this, "*", "pri_mem_request_compare_mode", pri_mem_request_compare_mode); + uvm_config_db#(string)::set(this, "*", "pri_mem_response_compare_mode", pri_mem_response_compare_mode); + uvm_config_db#(string)::set(this, "*", "csc_dat_a_compare_mode", csc_dat_a_compare_mode); + uvm_config_db#(string)::set(this, "*", "csc_dat_b_compare_mode", csc_dat_b_compare_mode); + uvm_config_db#(string)::set(this, "*", "csc_wt_a_compare_mode", csc_wt_a_compare_mode); + uvm_config_db#(string)::set(this, "*", "csc_wt_b_compare_mode", csc_wt_b_compare_mode); + uvm_config_db#(string)::set(this, "*", "cmac_a_compare_mode", cmac_a_compare_mode); + uvm_config_db#(string)::set(this, "*", "cmac_b_compare_mode", cmac_b_compare_mode); + uvm_config_db#(string)::set(this, "*", "cacc_compare_mode", cacc_compare_mode); + uvm_config_db#(string)::set(this, "*", "sdp_compare_mode", sdp_compare_mode); + uvm_config_db#(string)::set(this, "*", "cdma_wt_pri_mem_request_compare_mode", cdma_wt_pri_mem_request_compare_mode); + uvm_config_db#(string)::set(this, "*", "cdma_wt_pri_mem_response_compare_mode", cdma_wt_pri_mem_response_compare_mode); + uvm_config_db#(string)::set(this, "*", "cdma_dat_pri_mem_request_compare_mode", cdma_dat_pri_mem_request_compare_mode); + uvm_config_db#(string)::set(this, "*", "cdma_dat_pri_mem_response_compare_mode", cdma_dat_pri_mem_response_compare_mode); + uvm_config_db#(string)::set(this, "*", "sdp_pri_mem_request_compare_mode", sdp_pri_mem_request_compare_mode); + uvm_config_db#(string)::set(this, "*", "sdp_pri_mem_response_compare_mode", sdp_pri_mem_response_compare_mode); + uvm_config_db#(string)::set(this, "*", "sdp_b_pri_mem_request_compare_mode", sdp_b_pri_mem_request_compare_mode); + uvm_config_db#(string)::set(this, "*", "sdp_b_pri_mem_response_compare_mode", sdp_b_pri_mem_response_compare_mode); + uvm_config_db#(string)::set(this, "*", "sdp_n_pri_mem_request_compare_mode", sdp_n_pri_mem_request_compare_mode); + uvm_config_db#(string)::set(this, "*", "sdp_n_pri_mem_response_compare_mode", sdp_n_pri_mem_response_compare_mode); + uvm_config_db#(string)::set(this, "*", "pdp_pri_mem_request_compare_mode", pdp_pri_mem_request_compare_mode); + uvm_config_db#(string)::set(this, "*", "pdp_pri_mem_response_compare_mode", pdp_pri_mem_response_compare_mode); + uvm_config_db#(string)::set(this, "*", "cdp_pri_mem_request_compare_mode", cdp_pri_mem_request_compare_mode); + uvm_config_db#(string)::set(this, "*", "cdp_pri_mem_response_compare_mode", cdp_pri_mem_response_compare_mode); + //:) epython: generated_end (DO NOT EDIT ABOVE) + // map = scb_name:monitor_name // //:| scb_map = { @@ -173,6 +302,140 @@ function void nvdla_tb_base_test::build_phase(uvm_phase phase); //:| endcase //:| ''' % {'scb':k, 'monitor':v} //:| print(msg) + //:) epython: generated_beg (DO NOT EDIT BELOW) + + case(csc_dat_a_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_dat_a_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_dat_a_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_dat_a_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_dat_a_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_dat_a_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", csc_dat_a_compare_mode}) + end + endcase + + + case(csc_dat_b_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_dat_b_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_dat_b_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_dat_b_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_dat_b_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_dat_b_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", csc_dat_b_compare_mode}) + end + endcase + + + case(csc_wt_a_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_wt_a_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_wt_a_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_wt_a_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_wt_a_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_wt_a_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", csc_wt_a_compare_mode}) + end + endcase + + + case(csc_wt_b_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_wt_b_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_wt_b_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_wt_b_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_wt_b_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "sc2mac_wt_b_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", csc_wt_b_compare_mode}) + end + endcase + + + case(cmac_a_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "mac_a2accu_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "mac_a2accu_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "mac_a2accu_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "mac_a2accu_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "mac_a2accu_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cmac_a_compare_mode}) + end + endcase + + + case(cmac_b_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "mac_b2accu_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "mac_b2accu_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "mac_b2accu_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "mac_b2accu_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_conv_core_socket_convertor_inst", "mac_b2accu_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cmac_b_compare_mode}) + end + endcase + + //:) epython: generated_end (DO NOT EDIT ABOVE) // map = scb_name:monitor_name @@ -205,12 +468,69 @@ function void nvdla_tb_base_test::build_phase(uvm_phase phase); //:| endcase //:| ''' % {'scb':k, 'monitor':v} //:| print(msg) + //:) epython: generated_beg (DO NOT EDIT BELOW) + + case(cacc_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_post_processing_socket_convertor_inst", "cacc2sdp_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_post_processing_socket_convertor_inst", "cacc2sdp_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_post_processing_socket_convertor_inst", "cacc2sdp_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_post_processing_socket_convertor_inst", "cacc2sdp_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_post_processing_socket_convertor_inst", "cacc2sdp_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cacc_compare_mode}) + end + endcase + + + case(sdp_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_post_processing_socket_convertor_inst", "sdp2pdp_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_post_processing_socket_convertor_inst", "sdp2pdp_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_post_processing_socket_convertor_inst", "sdp2pdp_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_post_processing_socket_convertor_inst", "sdp2pdp_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_post_processing_socket_convertor_inst", "sdp2pdp_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_compare_mode}) + end + endcase + + //:) epython: generated_end (DO NOT EDIT ABOVE) // DMA convertor, general // - //:| read_dma_list = ['bdma', 'sdp', 'pdp', 'cdp', 'rbk', 'sdp_b', 'sdp_n', 'sdp_e', 'cdma_dat', 'cdma_wt'] - //:| write_dma_list = ['bdma', 'sdp', 'pdp', 'cdp', 'rbk'] - //:| mem_if_list = ['pri_mem', 'sec_mem'] + //:| read_dma_list = ['cdma_dat', 'cdma_wt', 'sdp'] + //:| write_dma_list = ['sdp'] + //:| if "NVDLA_SDP_BS_ENABLE" in project.PROJVAR: read_dma_list.append("sdp_b") + //:| if "NVDLA_SDP_BN_ENABLE" in project.PROJVAR: read_dma_list.append("sdp_n") + //:| if "NVDLA_SDP_EW_ENABLE" in project.PROJVAR: read_dma_list.append("sdp_e") + //:| if "NVDLA_PDP_ENABLE" in project.PROJVAR: read_dma_list.append("pdp") + //:| if "NVDLA_CDP_ENABLE" in project.PROJVAR: read_dma_list.append("cdp") + //:| if "NVDLA_BDMA_ENABLE" in project.PROJVAR: read_dma_list.append("bdma") + //:| if "NVDLA_RUBIK_ENABLE" in project.PROJVAR: write_dma_list.append("rbk") + //:| if "NVDLA_PDP_ENABLE" in project.PROJVAR: write_dma_list.append("pdp") + //:| if "NVDLA_CDP_ENABLE" in project.PROJVAR: write_dma_list.append("cdp") + //:| if "NVDLA_BDMA_ENABLE" in project.PROJVAR: write_dma_list.append("bdma") + //:| if "NVDLA_RUBIK_ENABLE" in project.PROJVAR: write_dma_list.append("rbk") + //:| mem_if_list = mem_intf_list //:| kind_list = ['request', 'response'] //:| for dma in read_dma_list: //:| for mem_if in mem_if_list: @@ -264,9 +584,544 @@ function void nvdla_tb_base_test::build_phase(uvm_phase phase); //:| endcase //:| ''' % {'monitor':dma, 'mem_if':mem_if, 'kind':kind} //:| print(msg) + //:) epython: generated_beg (DO NOT EDIT BELOW) + + case(cdma_dat_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_dat_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_dat_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_dat_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_dat_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_dat_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_dat_pri_mem_request_compare_mode}) + end + endcase + + + case(cdma_dat_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_dat_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_dat_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_dat_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_dat_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_dat_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_dat_pri_mem_response_compare_mode}) + end + endcase + + + case(cdma_wt_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_wt_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_wt_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_wt_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_wt_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_wt_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_wt_pri_mem_request_compare_mode}) + end + endcase + + + case(cdma_wt_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_wt_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_wt_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_wt_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_wt_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdma_wt_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_wt_pri_mem_response_compare_mode}) + end + endcase + + + case(sdp_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_pri_mem_request_compare_mode}) + end + endcase + + + case(sdp_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_pri_mem_response_compare_mode}) + end + endcase + + + case(sdp_b_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_b_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_b_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_b_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_b_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_b_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_b_pri_mem_request_compare_mode}) + end + endcase + + + case(sdp_b_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_b_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_b_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_b_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_b_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_b_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_b_pri_mem_response_compare_mode}) + end + endcase + + + case(sdp_n_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_n_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_n_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_n_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_n_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_n_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_n_pri_mem_request_compare_mode}) + end + endcase + + + case(sdp_n_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_n_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_n_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_n_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_n_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_n_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_n_pri_mem_response_compare_mode}) + end + endcase + + + case(pdp_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", pdp_pri_mem_request_compare_mode}) + end + endcase + + + case(pdp_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", pdp_pri_mem_response_compare_mode}) + end + endcase + + + case(cdp_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_read_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdp_pri_mem_request_compare_mode}) + end + endcase + + + case(cdp_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_read_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdp_pri_mem_response_compare_mode}) + end + endcase + + + case(sdp_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_pri_mem_request_compare_mode}) + end + endcase + + + case(sdp_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "sdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_pri_mem_response_compare_mode}) + end + endcase + + + case(pdp_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", pdp_pri_mem_request_compare_mode}) + end + endcase + + + case(pdp_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "pdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", pdp_pri_mem_response_compare_mode}) + end + endcase + + + case(cdp_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_write_request_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdp_pri_mem_request_compare_mode}) + end + endcase + + + case(cdp_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_NOT_SAMPLING); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.rm_nvdla_dma_convertor_pri_mem", "cdp_write_response_initial_credit", SCSV_CONVERTOR_INITIAL_CREDIT_WORKING_MODE_PASSTHROUGH); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdp_pri_mem_response_compare_mode}) + end + endcase + + //:) epython: generated_end (DO NOT EDIT ABOVE) // Parse compare mode, determine scoreboard compare mode - // #0, convolution core and sdp convertor + // #0, memory interface scoreboard + // + //:| memory_interface_instance_list = mem_intf_list + //:| for inst in memory_interface_instance_list: + //:| scb = inst + '_sb' + //:| msg = ''' + //:| case(%(inst)s_response_compare_mode) + //:| "COMPARE_MODE_DISABLE": begin + //:| uvm_config_int::set(this, "*.%(scb)s", "response_ck_enable", 0); + //:| end + //:| "COMPARE_MODE_RTL_AHEAD": begin + //:| uvm_config_int::set(this, "*.%(scb)s", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + //:| end + //:| "COMPARE_MODE_RTL_GATING_CMOD": begin + //:| uvm_config_int::set(this, "*.%(scb)s", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + //:| end + //:| "COMPARE_MODE_LOOSE_COMPARE": begin + //:| uvm_config_int::set(this, "*.%(scb)s", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + //:| end + //:| "COMPARE_MODE_COUNT_TXN_ONLY": begin + //:| uvm_config_int::set(this, "*.%(scb)s", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + //:| end + //:| default: begin + //:| `uvm_error(tID, {"Unsupported scoreboard working mode: ", %(inst)s_response_compare_mode}) + //:| end + //:| endcase + //:| case(%(inst)s_request_compare_mode) + //:| "COMPARE_MODE_DISABLE": begin + //:| uvm_config_int::set(this, "*.%(scb)s", "request_ck_enable", 0); + //:| end + //:| "COMPARE_MODE_RTL_AHEAD": begin + //:| uvm_config_int::set(this, "*.%(scb)s", "request_compare_mode", COMPARE_MODE_RTL_AHEAD); + //:| end + //:| "COMPARE_MODE_RTL_GATING_CMOD": begin + //:| uvm_config_int::set(this, "*.%(scb)s", "request_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + //:| end + //:| "COMPARE_MODE_LOOSE_COMPARE": begin + //:| uvm_config_int::set(this, "*.%(scb)s", "request_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + //:| end + //:| "COMPARE_MODE_COUNT_TXN_ONLY": begin + //:| uvm_config_int::set(this, "*.%(scb)s", "request_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + //:| end + //:| default: begin + //:| `uvm_error(tID, {"Unsupported scoreboard working mode: ", %(inst)s_request_compare_mode}) + //:| end + //:| endcase + //:| ''' % {'inst':inst, 'scb':scb} + //:| print(msg) + //:) epython: generated_beg (DO NOT EDIT BELOW) + + case(pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.pri_mem_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.pri_mem_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.pri_mem_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", pri_mem_response_compare_mode}) + end + endcase + case(pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.pri_mem_sb", "request_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.pri_mem_sb", "request_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.pri_mem_sb", "request_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", pri_mem_request_compare_mode}) + end + endcase + + //:) epython: generated_end (DO NOT EDIT ABOVE) + + // #1, convolution core and sdp convertor // //:| conv_and_sdp_internal_instance_list = [ //:| 'csc_dat_a' , @@ -303,11 +1158,188 @@ function void nvdla_tb_base_test::build_phase(uvm_phase phase); //:| endcase //:| ''' % {'inst':inst, 'scb':scb} //:| print(msg) + //:) epython: generated_beg (DO NOT EDIT BELOW) - // #1, DMA convertor + case(csc_dat_a_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.csc_dat_a_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.csc_dat_a_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.csc_dat_a_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.csc_dat_a_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.csc_dat_a_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", csc_dat_a_compare_mode}) + end + endcase + + + case(csc_dat_b_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.csc_dat_b_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.csc_dat_b_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.csc_dat_b_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.csc_dat_b_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.csc_dat_b_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", csc_dat_b_compare_mode}) + end + endcase + + + case(csc_wt_a_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.csc_wt_a_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.csc_wt_a_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.csc_wt_a_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.csc_wt_a_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.csc_wt_a_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", csc_wt_a_compare_mode}) + end + endcase + + + case(csc_wt_b_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.csc_wt_b_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.csc_wt_b_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.csc_wt_b_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.csc_wt_b_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.csc_wt_b_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", csc_wt_b_compare_mode}) + end + endcase + + + case(cmac_a_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.cmac_a_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.cmac_a_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.cmac_a_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.cmac_a_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.cmac_a_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cmac_a_compare_mode}) + end + endcase + + + case(cmac_b_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.cmac_b_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.cmac_b_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.cmac_b_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.cmac_b_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.cmac_b_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cmac_b_compare_mode}) + end + endcase + + + case(cacc_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.cacc_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.cacc_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.cacc_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.cacc_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.cacc_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cacc_compare_mode}) + end + endcase + + + case(sdp_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.sdp_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.sdp_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.sdp_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.sdp_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.sdp_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_compare_mode}) + end + endcase + + //:) epython: generated_end (DO NOT EDIT ABOVE) + + // #2, DMA convertor // - //:| dma_list = ['bdma', 'sdp', 'pdp', 'cdp', 'rbk', 'sdp_b', 'sdp_n', 'sdp_e', 'cdma_dat', 'cdma_wt'] - //:| mem_if_list = ['pri_mem', 'sec_mem'] + //:| mem_if_list = mem_intf_list //:| kind_list = ['request', 'response'] //:| for dma in dma_list: //:| for mem_if in mem_if_list: @@ -335,6 +1367,316 @@ function void nvdla_tb_base_test::build_phase(uvm_phase phase); //:| endcase //:| ''' % {'dma':dma, 'mem_if':mem_if, 'kind':kind} //:| print(msg) + //:) epython: generated_beg (DO NOT EDIT BELOW) + + case(cdma_wt_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.cdma_wt_pri_mem_sb", "request_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.cdma_wt_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.cdma_wt_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.cdma_wt_pri_mem_sb", "request_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.cdma_wt_pri_mem_sb", "request_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_wt_pri_mem_request_compare_mode}) + end + endcase + + + case(cdma_wt_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.cdma_wt_pri_mem_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.cdma_wt_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.cdma_wt_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.cdma_wt_pri_mem_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.cdma_wt_pri_mem_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_wt_pri_mem_response_compare_mode}) + end + endcase + + + case(cdma_dat_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.cdma_dat_pri_mem_sb", "request_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.cdma_dat_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.cdma_dat_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.cdma_dat_pri_mem_sb", "request_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.cdma_dat_pri_mem_sb", "request_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_dat_pri_mem_request_compare_mode}) + end + endcase + + + case(cdma_dat_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.cdma_dat_pri_mem_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.cdma_dat_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.cdma_dat_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.cdma_dat_pri_mem_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.cdma_dat_pri_mem_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_dat_pri_mem_response_compare_mode}) + end + endcase + + + case(sdp_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.sdp_pri_mem_sb", "request_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.sdp_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.sdp_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.sdp_pri_mem_sb", "request_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.sdp_pri_mem_sb", "request_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_pri_mem_request_compare_mode}) + end + endcase + + + case(sdp_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.sdp_pri_mem_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.sdp_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.sdp_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.sdp_pri_mem_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.sdp_pri_mem_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_pri_mem_response_compare_mode}) + end + endcase + + + case(sdp_b_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.sdp_b_pri_mem_sb", "request_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.sdp_b_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.sdp_b_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.sdp_b_pri_mem_sb", "request_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.sdp_b_pri_mem_sb", "request_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_b_pri_mem_request_compare_mode}) + end + endcase + + + case(sdp_b_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.sdp_b_pri_mem_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.sdp_b_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.sdp_b_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.sdp_b_pri_mem_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.sdp_b_pri_mem_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_b_pri_mem_response_compare_mode}) + end + endcase + + + case(sdp_n_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.sdp_n_pri_mem_sb", "request_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.sdp_n_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.sdp_n_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.sdp_n_pri_mem_sb", "request_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.sdp_n_pri_mem_sb", "request_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_n_pri_mem_request_compare_mode}) + end + endcase + + + case(sdp_n_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.sdp_n_pri_mem_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.sdp_n_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.sdp_n_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.sdp_n_pri_mem_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.sdp_n_pri_mem_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_n_pri_mem_response_compare_mode}) + end + endcase + + + case(pdp_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.pdp_pri_mem_sb", "request_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.pdp_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.pdp_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.pdp_pri_mem_sb", "request_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.pdp_pri_mem_sb", "request_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", pdp_pri_mem_request_compare_mode}) + end + endcase + + + case(pdp_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.pdp_pri_mem_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.pdp_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.pdp_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.pdp_pri_mem_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.pdp_pri_mem_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", pdp_pri_mem_response_compare_mode}) + end + endcase + + + case(cdp_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.cdp_pri_mem_sb", "request_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.cdp_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.cdp_pri_mem_sb", "request_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.cdp_pri_mem_sb", "request_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.cdp_pri_mem_sb", "request_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdp_pri_mem_request_compare_mode}) + end + endcase + + + case(cdp_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + uvm_config_int::set(this, "*.cdp_pri_mem_sb", "response_ck_enable", 0); + end + "COMPARE_MODE_RTL_AHEAD": begin + uvm_config_int::set(this, "*.cdp_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_AHEAD); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + uvm_config_int::set(this, "*.cdp_pri_mem_sb", "response_compare_mode", COMPARE_MODE_RTL_GATING_CMOD); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + uvm_config_int::set(this, "*.cdp_pri_mem_sb", "response_compare_mode", COMPARE_MODE_LOOSE_COMPARE); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + uvm_config_int::set(this, "*.cdp_pri_mem_sb", "response_compare_mode", COMPARE_MODE_COUNT_TXN_ONLY); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdp_pri_mem_response_compare_mode}) + end + endcase + + //:) epython: generated_end (DO NOT EDIT ABOVE) endfunction : build_phase // Function: connect_phase diff --git a/verif/testbench/trace_player/nvdla_tb_env.sv b/verif/testbench/trace_player/nvdla_tb_env.sv index 17bf7533..539d6641 100644 --- a/verif/testbench/trace_player/nvdla_tb_env.sv +++ b/verif/testbench/trace_player/nvdla_tb_env.sv @@ -14,7 +14,6 @@ class nvdla_tb_env extends uvm_env; string tID; - // internal passive agent //:| global project //:| import project //:| global dma_ports @@ -26,9 +25,75 @@ class nvdla_tb_env extends uvm_env; //:| if "NVDLA_CDP_ENABLE" in project.PROJVAR: dma_ports.append("cdp") //:| if "NVDLA_BDMA_ENABLE" in project.PROJVAR: dma_ports.append("bdma") //:| if "NVDLA_RUBIK_ENABLE" in project.PROJVAR: dma_ports.append("rbk") + //:| global mem_intf_list + //:| mem_intf_list = ["pri_mem"] + //:| if "NVDLA_SECONDARY_MEMIF_ENABLE" in project.PROJVAR: + //:| mem_intf_list.append("sec_mem") + //:) epython: generated_beg (DO NOT EDIT BELOW) + //:) epython: generated_end (DO NOT EDIT ABOVE) + + //:| memory_interface_list = mem_intf_list + //:| for inst in memory_interface_list: + //:| print(' string %s_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE";' % inst) + //:| print(' string %s_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE";' % inst) + //:| internal_instance_list = [ + //:| 'csc_dat_a' , + //:| 'csc_dat_b' , + //:| 'csc_wt_a' , + //:| 'csc_wt_b' , + //:| 'cmac_a' , + //:| 'cmac_b' , + //:| 'cacc' , + //:| 'sdp' , + //:| ] + //:| for inst in internal_instance_list: + //:| print(' string %s_compare_mode = "COMPARE_MODE_LOOSE_COMPARE";' % inst) + //:| dma_list = dma_ports + //:| mem_if_list = mem_intf_list + //:| kind_list = ['request', 'response'] + //:| for dma in dma_list: + //:| for mem_if in mem_if_list: + //:| for kind in kind_list: + //:| print(' string %(dma)s_%(mem_if)s_%(kind)s_compare_mode = "COMPARE_MODE_LOOSE_COMPARE";' % {'dma':dma, 'mem_if':mem_if, 'kind':kind}) + //:) epython: generated_beg (DO NOT EDIT BELOW) + string pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string csc_dat_a_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string csc_dat_b_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string csc_wt_a_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string csc_wt_b_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cmac_a_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cmac_b_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cacc_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cdma_wt_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cdma_wt_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cdma_dat_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cdma_dat_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_b_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_b_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_n_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string sdp_n_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string pdp_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string pdp_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cdp_pri_mem_request_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + string cdp_pri_mem_response_compare_mode = "COMPARE_MODE_LOOSE_COMPARE"; + //:) epython: generated_end (DO NOT EDIT ABOVE) + // internal passive agent //:| for dma in dma_ports: print(" dma_slave_agent %0s_pri_mem_agt;" % dma) //:| if "NVDLA_SECONDARY_MEMIF_ENABLE" in project.PROJVAR: //:| for dma in dma_ports: print(" dma_slave_agent %0s_sec_mem_agt;" % dma) + //:) epython: generated_beg (DO NOT EDIT BELOW) + dma_slave_agent cdma_wt_pri_mem_agt; + dma_slave_agent cdma_dat_pri_mem_agt; + dma_slave_agent sdp_pri_mem_agt; + dma_slave_agent sdp_b_pri_mem_agt; + dma_slave_agent sdp_n_pri_mem_agt; + dma_slave_agent pdp_pri_mem_agt; + dma_slave_agent cdp_pri_mem_agt; + //:) epython: generated_end (DO NOT EDIT ABOVE) // used for interfaces : SC=>MAC & MAC=>ACCU cc_slave_agent#(CSC_DT_DW, CSC_DT_DS) csc_dat_a_agt; @@ -86,6 +151,55 @@ class nvdla_tb_env extends uvm_env; `uvm_component_utils_begin(nvdla_tb_env) `uvm_field_int(is_rm_en, UVM_ALL_ON) + //:| memory_interface_list = mem_intf_list + //:| for inst in memory_interface_list: + //:| print(" `uvm_field_string(%s_request_compare_mode, UVM_ALL_ON)" % inst) + //:| print(" `uvm_field_string(%s_response_compare_mode, UVM_ALL_ON)" % inst) + //:| internal_instance_list = [ + //:| 'csc_dat_a' , + //:| 'csc_dat_b' , + //:| 'csc_wt_a' , + //:| 'csc_wt_b' , + //:| 'cmac_a' , + //:| 'cmac_b' , + //:| 'cacc' , + //:| 'sdp' , + //:| ] + //:| for inst in internal_instance_list: + //:| print(" `uvm_field_string(%s_compare_mode, UVM_ALL_ON)" % inst) + //:| dma_list = dma_ports + //:| mem_if_list = mem_intf_list + //:| kind_list = ['request', 'response'] + //:| for dma in dma_list: + //:| for mem_if in mem_if_list: + //:| for kind in kind_list: + //:| print(" `uvm_field_string(%(dma)s_%(mem_if)s_%(kind)s_compare_mode, UVM_ALL_ON)" % {'dma':dma, 'mem_if':mem_if, 'kind':kind}) + //:) epython: generated_beg (DO NOT EDIT BELOW) + `uvm_field_string(pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(csc_dat_a_compare_mode, UVM_ALL_ON) + `uvm_field_string(csc_dat_b_compare_mode, UVM_ALL_ON) + `uvm_field_string(csc_wt_a_compare_mode, UVM_ALL_ON) + `uvm_field_string(csc_wt_b_compare_mode, UVM_ALL_ON) + `uvm_field_string(cmac_a_compare_mode, UVM_ALL_ON) + `uvm_field_string(cmac_b_compare_mode, UVM_ALL_ON) + `uvm_field_string(cacc_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_compare_mode, UVM_ALL_ON) + `uvm_field_string(cdma_wt_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(cdma_wt_pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(cdma_dat_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(cdma_dat_pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_b_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_b_pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_n_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(sdp_n_pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(pdp_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(pdp_pri_mem_response_compare_mode, UVM_ALL_ON) + `uvm_field_string(cdp_pri_mem_request_compare_mode, UVM_ALL_ON) + `uvm_field_string(cdp_pri_mem_response_compare_mode, UVM_ALL_ON) + //:) epython: generated_end (DO NOT EDIT ABOVE) `uvm_component_utils_end extern function new(string name = "nvdla_tb_env", uvm_component parent = null); @@ -139,6 +253,15 @@ function void nvdla_tb_env::build_phase(uvm_phase phase); //:| for dma in dma_ports: //:| temp = dma + "_sec_mem_agt" //:| print(" %-20s = dma_slave_agent::type_id::create(\"%0s_sec_mem_agt\", this);" % (temp, dma)) + //:) epython: generated_beg (DO NOT EDIT BELOW) + cdma_wt_pri_mem_agt = dma_slave_agent::type_id::create("cdma_wt_pri_mem_agt", this); + cdma_dat_pri_mem_agt = dma_slave_agent::type_id::create("cdma_dat_pri_mem_agt", this); + sdp_pri_mem_agt = dma_slave_agent::type_id::create("sdp_pri_mem_agt", this); + sdp_b_pri_mem_agt = dma_slave_agent::type_id::create("sdp_b_pri_mem_agt", this); + sdp_n_pri_mem_agt = dma_slave_agent::type_id::create("sdp_n_pri_mem_agt", this); + pdp_pri_mem_agt = dma_slave_agent::type_id::create("pdp_pri_mem_agt", this); + cdp_pri_mem_agt = dma_slave_agent::type_id::create("cdp_pri_mem_agt", this); + //:) epython: generated_end (DO NOT EDIT ABOVE) csc_dat_a_agt = cc_slave_agent#(CSC_DT_DW, CSC_DT_DS)::type_id::create("csc_dat_a_agt", this); csc_wt_a_agt = cc_slave_agent#(CSC_WT_DW, CSC_WT_DS)::type_id::create("csc_wt_a_agt", this); @@ -177,36 +300,643 @@ function void nvdla_tb_env::connect_phase(uvm_phase phase); super.connect_phase(phase); `uvm_info(tID, $sformatf("connect_phase begin ..."), UVM_HIGH) - // connect dut and cmod dbb ports to scoreboard for checking - pri_mem_agt.slv_mon.mon_analysis_port_request.connect(sb.pri_mem_sb.dut_init_fifo.analysis_export); - pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.pri_mem_sb.dut_cmpl_fifo.analysis_export); - rm_pri_mem.req_ap.connect(sb.pri_mem_sb.rm_init_fifo.analysis_export); - rm_pri_mem.rsp_ap.connect(sb.pri_mem_sb.rm_cmpl_fifo.analysis_export); - - `ifdef NVDLA_SECONDARY_MEMIF_ENABLE - sec_mem_agt.slv_mon.mon_analysis_port_request.connect(sb.sec_mem_sb.dut_init_fifo.analysis_export); - sec_mem_agt.slv_mon.mon_analysis_port.connect(sb.sec_mem_sb.dut_cmpl_fifo.analysis_export); - rm_sec_mem.req_ap.connect(sb.sec_mem_sb.rm_init_fifo.analysis_export); - rm_sec_mem.rsp_ap.connect(sb.sec_mem_sb.rm_cmpl_fifo.analysis_export); - `endif - - // connect dut internal agent monitors to scoreboard - //:| for dma in dma_ports: - //:| print(" %0s_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.%0s_pri_mem_sb.dut_init_fifo.analysis_export);" % (dma, dma)) - //:| print(" %0s_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.%0s_pri_mem_sb.dut_cmpl_fifo.analysis_export);" % (dma, dma)) - //:| if "NVDLA_SECONDARY_MEMIF_ENABLE" in project.PROJVAR: - //:| for dma in dma_ports: - //:| print(" %0s_sec_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.%0s_sec_mem_sb.dut_init_fifo.analysis_export);" % (dma, dma)) - //:| print(" %0s_sec_mem_agt.slv_mon.mon_analysis_port.connect(sb.%0s_sec_mem_sb.dut_cmpl_fifo.analysis_export);" % (dma, dma)) - - csc_dat_a_agt.slv_mon.mon_analysis_port.connect(sb.csc_dat_a_sb.dut_cmpl_fifo.analysis_export); - csc_wt_a_agt.slv_mon.mon_analysis_port.connect(sb.csc_wt_a_sb.dut_cmpl_fifo.analysis_export); - csc_dat_b_agt.slv_mon.mon_analysis_port.connect(sb.csc_dat_b_sb.dut_cmpl_fifo.analysis_export); - csc_wt_b_agt.slv_mon.mon_analysis_port.connect(sb.csc_wt_b_sb.dut_cmpl_fifo.analysis_export); - cmac_a_agt.slv_mon.mon_analysis_port.connect(sb.cmac_a_sb.dut_cmpl_fifo.analysis_export); - cmac_b_agt.slv_mon.mon_analysis_port.connect(sb.cmac_b_sb.dut_cmpl_fifo.analysis_export); - cacc_agt.slv_mon.mon_analysis_port.connect(sb.cacc_sb.dut_cmpl_fifo.analysis_export); - sdp_agt.slv_mon.mon_analysis_port.connect(sb.sdp_sb.dut_cmpl_fifo.analysis_export); + // Parse compare mode, determine connection between scoreboard and other components + // #0, connect DBB agent/reference memory model to scoreboard + // + //:| memory_interface_instance_list = mem_intf_list + //:| for inst in memory_interface_instance_list: + //:| msg = ''' + //:| case(%(inst)s_response_compare_mode) + //:| "COMPARE_MODE_DISABLE": begin + //:| end + //:| "COMPARE_MODE_RTL_AHEAD": begin + //:| %(inst)s_agt.slv_mon.mon_analysis_port.connect(sb.%(inst)s_sb.dut_cmpl_fifo.analysis_export); + //:| rm_%(inst)s.rsp_ap.connect(sb.%(inst)s_sb.rm_cmpl_fifo.analysis_export); + //:| end + //:| "COMPARE_MODE_RTL_GATING_CMOD": begin + //:| %(inst)s_agt.slv_mon.mon_analysis_port.connect(sb.%(inst)s_sb.dut_cmpl_fifo.analysis_export); + //:| rm_%(inst)s.rsp_ap.connect(sb.%(inst)s_sb.rm_cmpl_fifo.analysis_export); + //:| end + //:| "COMPARE_MODE_LOOSE_COMPARE": begin + //:| %(inst)s_agt.slv_mon.mon_analysis_port.connect(sb.%(inst)s_sb.dut_cmpl_fifo.analysis_export); + //:| rm_%(inst)s.rsp_ap.connect(sb.%(inst)s_sb.rm_cmpl_fifo.analysis_export); + //:| end + //:| "COMPARE_MODE_COUNT_TXN_ONLY": begin + //:| %(inst)s_agt.slv_mon.mon_analysis_port.connect(sb.%(inst)s_sb.dut_cmpl_fifo.analysis_export); + //:| rm_%(inst)s.rsp_ap.connect(sb.%(inst)s_sb.rm_cmpl_fifo.analysis_export); + //:| end + //:| default: begin + //:| `uvm_error(tID, {"Unsupported scoreboard working mode: ", %(inst)s_response_compare_mode}) + //:| end + //:| endcase + //:| case(%(inst)s_request_compare_mode) + //:| "COMPARE_MODE_DISABLE": begin + //:| end + //:| "COMPARE_MODE_RTL_AHEAD": begin + //:| %(inst)s_agt.slv_mon.mon_analysis_port_request.connect(sb.%(inst)s_sb.dut_init_fifo.analysis_export); + //:| rm_%(inst)s.req_ap.connect(sb.%(inst)s_sb.rm_init_fifo.analysis_export); + //:| end + //:| "COMPARE_MODE_RTL_GATING_CMOD": begin + //:| %(inst)s_agt.slv_mon.mon_analysis_port_request.connect(sb.%(inst)s_sb.dut_init_fifo.analysis_export); + //:| rm_%(inst)s.req_ap.connect(sb.%(inst)s_sb.rm_init_fifo.analysis_export); + //:| end + //:| "COMPARE_MODE_LOOSE_COMPARE": begin + //:| %(inst)s_agt.slv_mon.mon_analysis_port_request.connect(sb.%(inst)s_sb.dut_init_fifo.analysis_export); + //:| rm_%(inst)s.req_ap.connect(sb.%(inst)s_sb.rm_init_fifo.analysis_export); + //:| end + //:| "COMPARE_MODE_COUNT_TXN_ONLY": begin + //:| %(inst)s_agt.slv_mon.mon_analysis_port_request.connect(sb.%(inst)s_sb.dut_init_fifo.analysis_export); + //:| rm_%(inst)s.req_ap.connect(sb.%(inst)s_sb.rm_init_fifo.analysis_export); + //:| end + //:| default: begin + //:| `uvm_error(tID, {"Unsupported scoreboard working mode: ", %(inst)s_request_compare_mode}) + //:| end + //:| endcase + //:| ''' % {'inst':inst} + //:| print(msg) + //:) epython: generated_beg (DO NOT EDIT BELOW) + + case(pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.pri_mem_sb.dut_cmpl_fifo.analysis_export); + rm_pri_mem.rsp_ap.connect(sb.pri_mem_sb.rm_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.pri_mem_sb.dut_cmpl_fifo.analysis_export); + rm_pri_mem.rsp_ap.connect(sb.pri_mem_sb.rm_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.pri_mem_sb.dut_cmpl_fifo.analysis_export); + rm_pri_mem.rsp_ap.connect(sb.pri_mem_sb.rm_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.pri_mem_sb.dut_cmpl_fifo.analysis_export); + rm_pri_mem.rsp_ap.connect(sb.pri_mem_sb.rm_cmpl_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", pri_mem_response_compare_mode}) + end + endcase + case(pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + pri_mem_agt.slv_mon.mon_analysis_port_request.connect(sb.pri_mem_sb.dut_init_fifo.analysis_export); + rm_pri_mem.req_ap.connect(sb.pri_mem_sb.rm_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + pri_mem_agt.slv_mon.mon_analysis_port_request.connect(sb.pri_mem_sb.dut_init_fifo.analysis_export); + rm_pri_mem.req_ap.connect(sb.pri_mem_sb.rm_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + pri_mem_agt.slv_mon.mon_analysis_port_request.connect(sb.pri_mem_sb.dut_init_fifo.analysis_export); + rm_pri_mem.req_ap.connect(sb.pri_mem_sb.rm_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + pri_mem_agt.slv_mon.mon_analysis_port_request.connect(sb.pri_mem_sb.dut_init_fifo.analysis_export); + rm_pri_mem.req_ap.connect(sb.pri_mem_sb.rm_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", pri_mem_request_compare_mode}) + end + endcase + + //:) epython: generated_end (DO NOT EDIT ABOVE) + + // #1, convolution core and sdp convertor + // + //:| conv_and_sdp_internal_instance_list = [ + //:| 'csc_dat_a' , + //:| 'csc_dat_b' , + //:| 'csc_wt_a' , + //:| 'csc_wt_b' , + //:| 'cmac_a' , + //:| 'cmac_b' , + //:| 'cacc' , + //:| 'sdp' , + //:| ] + //:| for inst in conv_and_sdp_internal_instance_list: + //:| msg = ''' + //:| case(%(inst)s_compare_mode) + //:| "COMPARE_MODE_DISABLE": begin + //:| end + //:| "COMPARE_MODE_RTL_AHEAD": begin + //:| %(inst)s_agt.slv_mon.mon_analysis_port.connect(sb.%(inst)s_sb.dut_cmpl_fifo.analysis_export); + //:| end + //:| "COMPARE_MODE_RTL_GATING_CMOD": begin + //:| %(inst)s_agt.slv_mon.mon_analysis_port.connect(sb.%(inst)s_sb.dut_cmpl_fifo.analysis_export); + //:| end + //:| "COMPARE_MODE_LOOSE_COMPARE": begin + //:| %(inst)s_agt.slv_mon.mon_analysis_port.connect(sb.%(inst)s_sb.dut_cmpl_fifo.analysis_export); + //:| end + //:| "COMPARE_MODE_COUNT_TXN_ONLY": begin + //:| %(inst)s_agt.slv_mon.mon_analysis_port.connect(sb.%(inst)s_sb.dut_cmpl_fifo.analysis_export); + //:| end + //:| default: begin + //:| `uvm_error(tID, {"Unsupported scoreboard working mode: ", %(inst)s_compare_mode}) + //:| end + //:| endcase + //:| ''' % {'inst':inst} + //:| print(msg) + //:) epython: generated_beg (DO NOT EDIT BELOW) + + case(csc_dat_a_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + csc_dat_a_agt.slv_mon.mon_analysis_port.connect(sb.csc_dat_a_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + csc_dat_a_agt.slv_mon.mon_analysis_port.connect(sb.csc_dat_a_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + csc_dat_a_agt.slv_mon.mon_analysis_port.connect(sb.csc_dat_a_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + csc_dat_a_agt.slv_mon.mon_analysis_port.connect(sb.csc_dat_a_sb.dut_cmpl_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", csc_dat_a_compare_mode}) + end + endcase + + + case(csc_dat_b_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + csc_dat_b_agt.slv_mon.mon_analysis_port.connect(sb.csc_dat_b_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + csc_dat_b_agt.slv_mon.mon_analysis_port.connect(sb.csc_dat_b_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + csc_dat_b_agt.slv_mon.mon_analysis_port.connect(sb.csc_dat_b_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + csc_dat_b_agt.slv_mon.mon_analysis_port.connect(sb.csc_dat_b_sb.dut_cmpl_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", csc_dat_b_compare_mode}) + end + endcase + + + case(csc_wt_a_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + csc_wt_a_agt.slv_mon.mon_analysis_port.connect(sb.csc_wt_a_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + csc_wt_a_agt.slv_mon.mon_analysis_port.connect(sb.csc_wt_a_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + csc_wt_a_agt.slv_mon.mon_analysis_port.connect(sb.csc_wt_a_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + csc_wt_a_agt.slv_mon.mon_analysis_port.connect(sb.csc_wt_a_sb.dut_cmpl_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", csc_wt_a_compare_mode}) + end + endcase + + + case(csc_wt_b_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + csc_wt_b_agt.slv_mon.mon_analysis_port.connect(sb.csc_wt_b_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + csc_wt_b_agt.slv_mon.mon_analysis_port.connect(sb.csc_wt_b_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + csc_wt_b_agt.slv_mon.mon_analysis_port.connect(sb.csc_wt_b_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + csc_wt_b_agt.slv_mon.mon_analysis_port.connect(sb.csc_wt_b_sb.dut_cmpl_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", csc_wt_b_compare_mode}) + end + endcase + + + case(cmac_a_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + cmac_a_agt.slv_mon.mon_analysis_port.connect(sb.cmac_a_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + cmac_a_agt.slv_mon.mon_analysis_port.connect(sb.cmac_a_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + cmac_a_agt.slv_mon.mon_analysis_port.connect(sb.cmac_a_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + cmac_a_agt.slv_mon.mon_analysis_port.connect(sb.cmac_a_sb.dut_cmpl_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cmac_a_compare_mode}) + end + endcase + + + case(cmac_b_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + cmac_b_agt.slv_mon.mon_analysis_port.connect(sb.cmac_b_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + cmac_b_agt.slv_mon.mon_analysis_port.connect(sb.cmac_b_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + cmac_b_agt.slv_mon.mon_analysis_port.connect(sb.cmac_b_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + cmac_b_agt.slv_mon.mon_analysis_port.connect(sb.cmac_b_sb.dut_cmpl_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cmac_b_compare_mode}) + end + endcase + + + case(cacc_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + cacc_agt.slv_mon.mon_analysis_port.connect(sb.cacc_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + cacc_agt.slv_mon.mon_analysis_port.connect(sb.cacc_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + cacc_agt.slv_mon.mon_analysis_port.connect(sb.cacc_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + cacc_agt.slv_mon.mon_analysis_port.connect(sb.cacc_sb.dut_cmpl_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cacc_compare_mode}) + end + endcase + + + case(sdp_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + sdp_agt.slv_mon.mon_analysis_port.connect(sb.sdp_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + sdp_agt.slv_mon.mon_analysis_port.connect(sb.sdp_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + sdp_agt.slv_mon.mon_analysis_port.connect(sb.sdp_sb.dut_cmpl_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + sdp_agt.slv_mon.mon_analysis_port.connect(sb.sdp_sb.dut_cmpl_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_compare_mode}) + end + endcase + + //:) epython: generated_end (DO NOT EDIT ABOVE) + + // #2, DMA convertor + // + //:| dma_list = dma_ports + //:| mem_if_list = mem_intf_list + //:| kind_list = ['request', 'response'] + //:| for dma in dma_list: + //:| for mem_if in mem_if_list: + //:| for kind in kind_list: + //:| msg = ''' + //:| case(%(dma)s_%(mem_if)s_%(kind)s_compare_mode) + //:| "COMPARE_MODE_DISABLE": begin + //:| end + //:| "COMPARE_MODE_RTL_AHEAD": begin + //:| %(dma)s_%(mem_if)s_agt.slv_mon.mon_analysis_port_req.connect(sb.%(dma)s_%(mem_if)s_sb.dut_init_fifo.analysis_export); + //:| end + //:| "COMPARE_MODE_RTL_GATING_CMOD": begin + //:| %(dma)s_%(mem_if)s_agt.slv_mon.mon_analysis_port_req.connect(sb.%(dma)s_%(mem_if)s_sb.dut_init_fifo.analysis_export); + //:| end + //:| "COMPARE_MODE_LOOSE_COMPARE": begin + //:| %(dma)s_%(mem_if)s_agt.slv_mon.mon_analysis_port_req.connect(sb.%(dma)s_%(mem_if)s_sb.dut_init_fifo.analysis_export); + //:| end + //:| "COMPARE_MODE_COUNT_TXN_ONLY": begin + //:| %(dma)s_%(mem_if)s_agt.slv_mon.mon_analysis_port_req.connect(sb.%(dma)s_%(mem_if)s_sb.dut_init_fifo.analysis_export); + //:| end + //:| default: begin + //:| `uvm_error(tID, {"Unsupported scoreboard working mode: ", %(dma)s_%(mem_if)s_%(kind)s_compare_mode}) + //:| end + //:| endcase + //:| ''' % {'dma':dma, 'mem_if':mem_if, 'kind':kind} + //:| print(msg) + //:) epython: generated_beg (DO NOT EDIT BELOW) + + case(cdma_wt_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_wt_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_wt_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_wt_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_wt_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_wt_pri_mem_request_compare_mode}) + end + endcase + + + case(cdma_wt_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_wt_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_wt_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_wt_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_wt_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_wt_pri_mem_response_compare_mode}) + end + endcase + + + case(cdma_dat_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_dat_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_dat_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_dat_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_dat_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_dat_pri_mem_request_compare_mode}) + end + endcase + + + case(cdma_dat_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_dat_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_dat_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_dat_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_dat_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_dat_pri_mem_response_compare_mode}) + end + endcase + + + case(sdp_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + sdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + sdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + sdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + sdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_pri_mem_request_compare_mode}) + end + endcase + + + case(sdp_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + sdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + sdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + sdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + sdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_pri_mem_response_compare_mode}) + end + endcase + + + case(sdp_b_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + sdp_b_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_b_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + sdp_b_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_b_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + sdp_b_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_b_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + sdp_b_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_b_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_b_pri_mem_request_compare_mode}) + end + endcase + + + case(sdp_b_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + sdp_b_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_b_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + sdp_b_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_b_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + sdp_b_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_b_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + sdp_b_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_b_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_b_pri_mem_response_compare_mode}) + end + endcase + + + case(sdp_n_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + sdp_n_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_n_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + sdp_n_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_n_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + sdp_n_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_n_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + sdp_n_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_n_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_n_pri_mem_request_compare_mode}) + end + endcase + + + case(sdp_n_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + sdp_n_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_n_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + sdp_n_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_n_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + sdp_n_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_n_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + sdp_n_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_n_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_n_pri_mem_response_compare_mode}) + end + endcase + + + case(pdp_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + pdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.pdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + pdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.pdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + pdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.pdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + pdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.pdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", pdp_pri_mem_request_compare_mode}) + end + endcase + + + case(pdp_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + pdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.pdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + pdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.pdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + pdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.pdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + pdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.pdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", pdp_pri_mem_response_compare_mode}) + end + endcase + + + case(cdp_pri_mem_request_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + cdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + cdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + cdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + cdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdp_pri_mem_request_compare_mode}) + end + endcase + + + case(cdp_pri_mem_response_compare_mode) + "COMPARE_MODE_DISABLE": begin + end + "COMPARE_MODE_RTL_AHEAD": begin + cdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_RTL_GATING_CMOD": begin + cdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_LOOSE_COMPARE": begin + cdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + "COMPARE_MODE_COUNT_TXN_ONLY": begin + cdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdp_pri_mem_sb.dut_init_fifo.analysis_export); + end + default: begin + `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdp_pri_mem_response_compare_mode}) + end + endcase + + //:) epython: generated_end (DO NOT EDIT ABOVE) // connect reference model internal agent monitors to scoreboard //:| for dma in dma_ports: @@ -216,6 +946,22 @@ function void nvdla_tb_env::connect_phase(uvm_phase phase); //:| for dma in dma_ports: //:| print(" rm_inst.rm_nvdla_dma_convertor_sec.request_%0s.connect(sb.%0s_sec_mem_sb.rm_init_fifo.analysis_export);" % (dma, dma)) //:| print(" rm_inst.rm_nvdla_dma_convertor_sec.response_%0s.connect(sb.%0s_sec_mem_sb.rm_cmpl_fifo.analysis_export);" % (dma, dma)) + //:) epython: generated_beg (DO NOT EDIT BELOW) + rm_inst.rm_nvdla_dma_convertor_pri.request_cdma_wt.connect(sb.cdma_wt_pri_mem_sb.rm_init_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.response_cdma_wt.connect(sb.cdma_wt_pri_mem_sb.rm_cmpl_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.request_cdma_dat.connect(sb.cdma_dat_pri_mem_sb.rm_init_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.response_cdma_dat.connect(sb.cdma_dat_pri_mem_sb.rm_cmpl_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.request_sdp.connect(sb.sdp_pri_mem_sb.rm_init_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.response_sdp.connect(sb.sdp_pri_mem_sb.rm_cmpl_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.request_sdp_b.connect(sb.sdp_b_pri_mem_sb.rm_init_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.response_sdp_b.connect(sb.sdp_b_pri_mem_sb.rm_cmpl_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.request_sdp_n.connect(sb.sdp_n_pri_mem_sb.rm_init_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.response_sdp_n.connect(sb.sdp_n_pri_mem_sb.rm_cmpl_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.request_pdp.connect(sb.pdp_pri_mem_sb.rm_init_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.response_pdp.connect(sb.pdp_pri_mem_sb.rm_cmpl_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.request_cdp.connect(sb.cdp_pri_mem_sb.rm_init_fifo.analysis_export); + rm_inst.rm_nvdla_dma_convertor_pri.response_cdp.connect(sb.cdp_pri_mem_sb.rm_cmpl_fifo.analysis_export); + //:) epython: generated_end (DO NOT EDIT ABOVE) rm_inst.rm_nvdla_conv_core_socket_convertor_inst.sc2mac_data_a_ana_port.connect(sb.csc_dat_a_sb.rm_cmpl_fifo.analysis_export); rm_inst.rm_nvdla_conv_core_socket_convertor_inst.sc2mac_weight_a_ana_port.connect(sb.csc_wt_a_sb.rm_cmpl_fifo.analysis_export); From cfe6c6789a34a9f1293547cf9c5cf6876cf1e67e Mon Sep 17 00:00:00 2001 From: Ellen Zhang Date: Mon, 21 May 2018 02:35:45 -0700 Subject: [PATCH 06/28] add nv_small mcif coverage elfile --- verif/coverage/elfiles/nv_small_mcif_code.el | 1604 ++++++++++++++++++ 1 file changed, 1604 insertions(+) create mode 100644 verif/coverage/elfiles/nv_small_mcif_code.el diff --git a/verif/coverage/elfiles/nv_small_mcif_code.el b/verif/coverage/elfiles/nv_small_mcif_code.el new file mode 100644 index 00000000..415649ac --- /dev/null +++ b/verif/coverage/elfiles/nv_small_mcif_code.el @@ -0,0 +1,1604 @@ +//================================================== +// This file contains the Excluded objects +// Generated By User: ellenz +// Format Version: 2 +// Date: Mon May 21 02:31:42 2018 +// ExclMode: default +//================================================== +CHECKSUM: "2930214673 2686788187" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_ig.u_arb.u_read_ig_arb +Block 31 "3097622418" "gnt_pre = 10'b0010000000;" +Block 33 "361113040" "gnt_pre = 10'b0100000000;" +Block 35 "1529271725" "gnt_pre = 10'b1000000000;" +Block 50 "130827880" "gnt_pre = 10'b0010000000;" +Block 52 "2913091628" "gnt_pre = 10'b0100000000;" +Block 54 "3489778593" "gnt_pre = 10'b1000000000;" +Block 69 "1337361886" "gnt_pre = 10'b0010000000;" +Block 71 "4152104433" "gnt_pre = 10'b0100000000;" +Block 73 "2584171278" "gnt_pre = 10'b1000000000;" +Block 88 "1858141049" "gnt_pre = 10'b0010000000;" +Block 90 "2523214410" "gnt_pre = 10'b0100000000;" +Block 92 "3295514787" "gnt_pre = 10'b1000000000;" +Block 107 "2302572133" "gnt_pre = 10'b0010000000;" +Block 109 "580418945" "gnt_pre = 10'b0100000000;" +Block 111 "1858212583" "gnt_pre = 10'b1000000000;" +Block 126 "156801301" "gnt_pre = 10'b0010000000;" +Block 128 "2750393160" "gnt_pre = 10'b0100000000;" +Block 130 "2224933883" "gnt_pre = 10'b1000000000;" +Block 145 "1720291572" "gnt_pre = 10'b0010000000;" +Block 147 "2205419261" "gnt_pre = 10'b0100000000;" +Block 149 "890523365" "gnt_pre = 10'b1000000000;" +Block 164 "1433940564" "gnt_pre = 10'b0010000000;" +Block 166 "2957984478" "gnt_pre = 10'b0100000000;" +Block 168 "3282016013" "gnt_pre = 10'b1000000000;" +Block 184 "3528733290" "if (req[8])" +Block 185 "3976402326" "gnt_pre = 10'b0100000000;" +Block 186 "610268916" "if (req[9])" +Block 187 "2346597286" "gnt_pre = 10'b1000000000;" +Block 188 "747021427" "if (req[0])" +Block 189 "1690233299" "gnt_pre = 10'b1;" +Block 190 "1606706974" "if (req[1])" +Block 191 "2347959258" "gnt_pre = 10'b0000000010;" +Block 192 "102797614" "if (req[2])" +Block 193 "788379014" "gnt_pre = 10'b0000000100;" +Block 194 "3249963526" "if (req[3])" +Block 195 "382810484" "gnt_pre = 10'b0000001000;" +Block 196 "271738362" "if (req[4])" +Block 197 "227919681" "gnt_pre = 10'b0000010000;" +Block 198 "3786322737" "if (req[5])" +Block 199 "1025406698" "gnt_pre = 10'b0000100000;" +Block 200 "2164188916" "if (req[6])" +Block 201 "1231277033" "gnt_pre = 10'b0001000000;" +Block 202 "1505214896" "if (req[7])" +Block 203 "1520961839" "gnt_pre = 10'b0010000000;" +Block 205 "1055643842" "if (req[9])" +Block 206 "2398618520" "gnt_pre = 10'b1000000000;" +Block 207 "18923348" "if (req[0])" +Block 208 "1320986730" "gnt_pre = 10'b1;" +Block 209 "501659403" "if (req[1])" +Block 210 "1737003565" "gnt_pre = 10'b0000000010;" +Block 211 "1882040225" "if (req[2])" +Block 212 "1745962593" "gnt_pre = 10'b0000000100;" +Block 213 "1717890289" "if (req[3])" +Block 214 "989871061" "gnt_pre = 10'b0000001000;" +Block 215 "975152805" "if (req[4])" +Block 216 "3596552244" "gnt_pre = 10'b0000010000;" +Block 217 "2011416120" "if (req[5])" +Block 218 "970304578" "gnt_pre = 10'b0000100000;" +Block 219 "1773378725" "if (req[6])" +Block 220 "1538974556" "gnt_pre = 10'b0001000000;" +Block 221 "4076044106" "if (req[7])" +Block 222 "1991240655" "gnt_pre = 10'b0010000000;" +Block 223 "1778384675" "if (req[8])" +Block 224 "2706223854" "gnt_pre = 10'b0100000000;" +Block 226 "181413555" "if (req[0])" +Block 227 "3782965589" "gnt_pre = 10'b1;" +Block 228 "2428281857" "if (req[1])" +Block 229 "2692193299" "gnt_pre = 10'b0000000010;" +Block 230 "1004613051" "if (req[2])" +Block 231 "3574059124" "gnt_pre = 10'b0000000100;" +Block 232 "166571193" "if (req[3])" +Block 233 "3084016524" "gnt_pre = 10'b0000001000;" +Block 234 "264203329" "if (req[4])" +Block 235 "3844745590" "gnt_pre = 10'b0000010000;" +Block 236 "3821617746" "if (req[5])" +Block 237 "204496379" "gnt_pre = 10'b0000100000;" +Block 238 "3987315959" "if (req[6])" +Block 239 "2866846401" "gnt_pre = 10'b0001000000;" +Block 240 "4250065574" "if (req[7])" +Block 241 "3985853219" "gnt_pre = 10'b0010000000;" +Block 242 "1112757981" "if (req[8])" +Block 243 "2376534082" "gnt_pre = 10'b0100000000;" +Block 244 "3125120076" "if (req[9])" +Block 245 "114785662" "gnt_pre = 10'b1000000000;" +CHECKSUM: "370953953 453107441" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_ig.u_spt +Block 17 "1127409225" "is_2nd_req <= 1'b0;" +Block 19 "708775480" "if (is_2nd_req)" +Block 20 "4112791173" "is_2nd_req <= 0;" +Block 21 "3265405217" "if (is_cross_256byte_boundary)" +Block 22 "1770961233" "is_2nd_req <= 1;" +CHECKSUM: "370953953 2589063133" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_ig.u_spt +Condition 11 "1926296112" "(spt_out_rdy & (((!is_cross_256byte_boundary)) || (is_cross_256byte_boundary & is_2nd_req))) 1 -1" +Condition 14 "2961107358" "(is_cross_256byte_boundary ? ((7 - spt_req_offset)) : (spt_req_size)) 1 -1" +Condition 15 "775735383" "(is_2nd_req ? second_req_addr : first_req_addr) 1 -1" +Condition 16 "1649395360" "(is_2nd_req ? second_req_size : first_req_size) 1 -1" +CHECKSUM: "243732792 3822138294" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg +Block 76 "3947073670" "if ((arb_first_beat && arb_cq_fdrop))" +Block 77 "385017729" "arb_wen = 2'b10;" +Block 78 "1732611842" "if ((arb_last_beat && arb_cq_ldrop))" +Block 79 "2322319477" "arb_wen = 2'b1;" +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro0_fifo0 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro0_fifo1 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro6_fifo1 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro6_fifo0 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro5_fifo1 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro5_fifo0 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro4_fifo1 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro4_fifo0 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro3_fifo1 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro3_fifo0 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro2_fifo1 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro2_fifo0 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro1_fifo1 +CHECKSUM: "2033390145" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.ro1_fifo0 +CHECKSUM: "1171017945" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram +CHECKSUM: "4190519411" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram +CHECKSUM: "4111138399" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq +CHECKSUM: "1557808896" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq +CHECKSUM: "3160633325 1427260080" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_ig.u_bpt0 +Block 29 "994898275" "beat_count <= (beat_count + 1);" +CHECKSUM: "3160633325 4129892756" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_ig.u_bpt0 +Branch 2 "429691490" "(!nvdla_core_rstn)" (2) "(!nvdla_core_rstn) 0,1,0" +CHECKSUM: "3160633325 1427260080" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_ig.u_bpt1 +Block 29 "994898275" "beat_count <= (beat_count + 1);" +CHECKSUM: "3160633325 1427260080" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_ig.u_bpt2 +Block 29 "994898275" "beat_count <= (beat_count + 1);" +CHECKSUM: "2430085739 338799534" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_ig.u_cvt +Block 31 "2421298561" "beat_count <= (beat_count - 1);" +CHECKSUM: "3535831677 2595908732" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_ig.u_arb +Block 37 "1139147626" "gnt_count <= (gnt_count + 1);" +Block 45 "1844185122" "sticky <= 1;" +Block 47 "3166436629" "sticky <= 0;" +CHECKSUM: "1727489489 3190243504" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_ig.u_arb.u_write_ig_arb +Block 17 "3781297318" "if (req[3])" +Block 18 "3414436933" "gnt_pre = 5'b01000;" +Block 19 "3627972792" "if (req[4])" +Block 20 "3076490388" "gnt_pre = 5'b10000;" +Block 26 "1537135661" "if (req[3])" +Block 27 "3585341526" "gnt_pre = 5'b01000;" +Block 28 "3113689802" "if (req[4])" +Block 29 "576149860" "gnt_pre = 5'b10000;" +Block 35 "817180289" "if (req[3])" +Block 36 "4056662982" "gnt_pre = 5'b01000;" +Block 37 "557630746" "if (req[4])" +Block 38 "2063324448" "gnt_pre = 5'b10000;" +Block 44 "3820972041" "if (req[3])" +Block 45 "1059073077" "gnt_pre = 5'b01000;" +Block 46 "2356764706" "if (req[4])" +Block 47 "2990818260" "gnt_pre = 5'b10000;" +Block 55 "3659207997" "if (req[4])" +Block 56 "1677180610" "gnt_pre = 5'b10000;" +Block 57 "2392669342" "if (req[0])" +Block 58 "1406547694" "gnt_pre = 5'b1;" +Block 59 "1621397984" "if (req[1])" +Block 60 "2029093493" "gnt_pre = 5'b00010;" +Block 61 "1935654332" "if (req[2])" +Block 62 "1513759625" "gnt_pre = 5'b00100;" +Block 63 "1550185348" "if (req[3])" +Block 64 "2873744555" "gnt_pre = 5'b01000;" +Block 66 "1100746030" "if (req[0])" +Block 67 "4233419615" "gnt_pre = 5'b1;" +Block 68 "4063468022" "if (req[1])" +Block 69 "3359502509" "gnt_pre = 5'b00010;" +Block 70 "3682583532" "if (req[2])" +Block 71 "3554415757" "gnt_pre = 5'b00100;" +Block 72 "1855177305" "if (req[3])" +Block 73 "872800795" "gnt_pre = 5'b01000;" +Block 74 "890413352" "if (req[4])" +Block 75 "844758008" "gnt_pre = 5'b10000;" +CHECKSUM: "4190519411" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram +CHECKSUM: "775941222" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8 +CHECKSUM: "3381894454" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.ram_Inst_256X8.ITOP +CHECKSUM: "4276501330" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.ram_Inst_256X8.ITOP.io +CHECKSUM: "3925454562" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram +CHECKSUM: "582438452" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3 +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.updateDR_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.debug_mode_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.updateDR_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.debug_mode_synchronizer +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.updateDR_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.debug_mode_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.updateDR_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.debug_mode_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2733340695" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_ram_access_lockup +CHECKSUM: "2733340695" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_ram_access_lockup +CHECKSUM: "2864954373" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.mbist_en_flop +CHECKSUM: "2864954373" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.mbist_en_flop +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.CLK_GATE_clk +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_la_bist_clkw0_gate +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_clk_jtag_Data_reg_r0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_clk_jtag_Wa_reg_w0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_clk_gate_core +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.CLK_GATE_clk +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_la_bist_clkw0_gate +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_clk_jtag_Data_reg_r0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_clk_jtag_Wa_reg_w0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_clk_gate_core +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_we_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_re_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_we_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_re_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Wa_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Data_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Ra_reg_r0 +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UI_enableDFTmode_async_ld_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_svop_1 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_svop_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UI_enableDFTmode_async_ld_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_svop_1 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_svop_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Wa_reg_w0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Ra_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "2053880406" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.ram_Inst_256X4.ITOP +CHECKSUM: "92266362" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.ram_Inst_256X4.ITOP.io +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_SO +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Do_r0_7 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Do_r0_6 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Do_r0_5 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Do_r0_4 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Do_r0_3 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Do_r0_2 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Do_r0_1 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Do_r0_0 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_SO +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.r_nv_ram_rws_256x3.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Do_r0_3 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Do_r0_2 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Do_r0_1 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Do_r0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_we_w0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_scan_ramtms +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_debug_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_iddq_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_scan_en +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_ce_r0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_SI +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_write_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_shiftDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_ary_read_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_jtag_readonly_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_updateDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_en_sync +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_ary_atpg_ctl +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_we_w0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_scan_ramtms +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_debug_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_iddq_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_scan_en +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_ce_r0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_SI +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_write_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_shiftDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_ary_read_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_jtag_readonly_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_updateDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_mbist_en_sync +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.UJ_DFTQUALIFIER_ary_atpg_ctl +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_SI +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_ce_r0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_ramaccess_rst_ +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Wa_w0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Wa_w0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Wa_w0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Wa_w0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Wa_w0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Wa_w0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Wa_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Wa_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_shiftDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_jtag_readonly_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Ra_r0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Ra_r0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Ra_r0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Ra_r0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Ra_r0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Ra_r0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Ra_r0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Ra_r0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Di_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_Di_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_updateDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_ary_read_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_iddq_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_we_w0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_debug_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_mbist_en_sync +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_scan_ramtms +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_write_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_ary_atpg_ctl +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_scan_en +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.adr_ram.testInst_SI +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_ce_r0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_ramaccess_rst_ +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Wa_w0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Wa_w0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Wa_w0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Wa_w0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Wa_w0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Wa_w0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Wa_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Wa_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_shiftDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_jtag_readonly_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Ra_r0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Ra_r0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Ra_r0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Ra_r0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Ra_r0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Ra_r0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Ra_r0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Ra_r0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Di_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_Di_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_updateDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_ary_read_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_iddq_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_we_w0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_debug_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_mbist_en_sync +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_scan_ramtms +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_write_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_ary_atpg_ctl +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.ram.testInst_scan_en +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.nvdla_core_clk_mgate +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.nvdla_core_clk_rd_mgate_skid +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.nvdla_core_clk_mgate.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_write.u_cq.nvdla_core_clk_rd_mgate_skid.p_clkgate +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UI_enableDFTmode_async_ld_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_svop_1 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_svop_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UI_enableDFTmode_async_ld_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_svop_1 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_svop_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "169557468" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7 +CHECKSUM: "3575809513" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.ram_Inst_256X7.ITOP +CHECKSUM: "999925360" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.ram_Inst_256X7.ITOP.io +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.nvdla_core_clk_mgate +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.nvdla_core_clk_rd_mgate_skid +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.nvdla_core_clk_mgate.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.nvdla_core_clk_rd_mgate_skid.p_clkgate +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_SI +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_write_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_updateDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_shiftDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_scan_ramtms +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_scan_en +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_we_w0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_ramaccess_rst_ +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_en_sync +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_ce_r0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Wa_w0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Wa_w0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Wa_w0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Wa_w0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Wa_w0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Wa_w0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Wa_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Wa_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Ra_r0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Ra_r0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Ra_r0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Ra_r0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Ra_r0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Ra_r0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Ra_r0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Ra_r0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Di_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Di_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_jtag_readonly_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_iddq_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_debug_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_ary_read_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_ary_atpg_ctl +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_SI +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_write_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_updateDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_shiftDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_scan_ramtms +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_scan_en +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_we_w0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_ramaccess_rst_ +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_en_sync +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_ce_r0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Wa_w0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Wa_w0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Wa_w0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Wa_w0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Wa_w0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Wa_w0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Wa_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Wa_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Ra_r0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Ra_r0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Ra_r0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Ra_r0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Ra_r0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Ra_r0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Ra_r0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Ra_r0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Di_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Di_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_jtag_readonly_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_iddq_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_debug_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_ary_read_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_ary_atpg_ctl +CHECKSUM: "775941222" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8 +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.updateDR_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.debug_mode_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.updateDR_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.debug_mode_synchronizer +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.updateDR_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.debug_mode_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.updateDR_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.debug_mode_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2733340695" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_ram_access_lockup +CHECKSUM: "2733340695" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_ram_access_lockup +CHECKSUM: "2864954373" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.mbist_en_flop +CHECKSUM: "2864954373" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.mbist_en_flop +CHECKSUM: "3381894454" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.ram_Inst_256X8.ITOP +CHECKSUM: "4276501330" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.ram_Inst_256X8.ITOP.io +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.CLK_GATE_clk +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_la_bist_clkw0_gate +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_clk_jtag_Data_reg_r0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_clk_jtag_Wa_reg_w0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_clk_gate_core +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.CLK_GATE_clk +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_la_bist_clkw0_gate +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_clk_jtag_Data_reg_r0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_clk_jtag_Wa_reg_w0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_clk_gate_core +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Do_r0_6 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Do_r0_5 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Do_r0_4 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Do_r0_3 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Do_r0_2 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Do_r0_1 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_mbist_Do_r0_0 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.testInst_SO +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Do_r0_7 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Do_r0_6 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Do_r0_5 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Do_r0_4 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Do_r0_3 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Do_r0_2 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Do_r0_1 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_mbist_Do_r0_0 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.testInst_SO +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_we_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_re_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Wa_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Data_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Ra_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_we_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_re_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0 +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Wa_reg_w0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Ra_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.r_nv_ram_rws_256x7.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.r_nv_ram_rwst_256x8.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_SI +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_write_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_updateDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_shiftDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_scan_ramtms +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_scan_en +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_we_w0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_en_sync +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_ce_r0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_jtag_readonly_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_iddq_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_debug_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_ary_read_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_ary_atpg_ctl +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.ram.UJ_DFTQUALIFIER_SI +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_write_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_updateDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_shiftDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_scan_ramtms +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_scan_en +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_we_w0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_en_sync +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_ce_r0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_jtag_readonly_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_iddq_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_debug_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_ary_read_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_cq.adr_ram.UJ_DFTQUALIFIER_ary_atpg_ctl +CHECKSUM: "414308160 2686788187" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_o.u_NV_NVDLA_mcif.u_read.u_eg.u_read_eg_arb +Block 30 "1375883788" "if (req[7])" +Block 31 "3097622418" "gnt_pre = 10'b0010000000;" +Block 32 "3849852681" "if (req[8])" +Block 33 "361113040" "gnt_pre = 10'b0100000000;" +Block 34 "329263042" "if (req[9])" +Block 35 "1529271725" "gnt_pre = 10'b1000000000;" +Block 49 "1120964115" "if (req[7])" +Block 50 "130827880" "gnt_pre = 10'b0010000000;" +Block 51 "3323142088" "if (req[8])" +Block 52 "2913091628" "gnt_pre = 10'b0100000000;" +Block 53 "3310211329" "if (req[9])" +Block 54 "3489778593" "gnt_pre = 10'b1000000000;" +Block 68 "2368944153" "if (req[7])" +Block 69 "1337361886" "gnt_pre = 10'b0010000000;" +Block 70 "26606567" "if (req[8])" +Block 71 "4152104433" "gnt_pre = 10'b0100000000;" +Block 72 "3324514528" "if (req[9])" +Block 73 "2584171278" "gnt_pre = 10'b1000000000;" +Block 87 "1885786627" "if (req[7])" +Block 88 "1858141049" "gnt_pre = 10'b0010000000;" +Block 89 "2008702024" "if (req[8])" +Block 90 "2523214410" "gnt_pre = 10'b0100000000;" +Block 91 "1018667049" "if (req[9])" +Block 92 "3295514787" "gnt_pre = 10'b1000000000;" +Block 106 "2352266867" "if (req[7])" +Block 107 "2302572133" "gnt_pre = 10'b0010000000;" +Block 108 "2604072387" "if (req[8])" +Block 109 "580418945" "gnt_pre = 10'b0100000000;" +Block 110 "1012109303" "if (req[9])" +Block 111 "1858212583" "gnt_pre = 10'b1000000000;" +Block 125 "3693663639" "if (req[7])" +Block 126 "156801301" "gnt_pre = 10'b0010000000;" +Block 127 "1089056382" "if (req[8])" +Block 128 "2750393160" "gnt_pre = 10'b0100000000;" +Block 129 "1157421905" "if (req[9])" +Block 130 "2224933883" "gnt_pre = 10'b1000000000;" +Block 144 "3196072027" "if (req[7])" +Block 145 "1720291572" "gnt_pre = 10'b0010000000;" +Block 146 "2150670178" "if (req[8])" +Block 147 "2205419261" "gnt_pre = 10'b0100000000;" +Block 148 "3350994312" "if (req[9])" +Block 149 "890523365" "gnt_pre = 10'b1000000000;" +Block 163 "1946055370" "if (req[7])" +Block 164 "1433940564" "gnt_pre = 10'b0010000000;" +Block 165 "3991964986" "if (req[8])" +Block 166 "2957984478" "gnt_pre = 10'b0100000000;" +Block 167 "1056917919" "if (req[9])" +Block 168 "3282016013" "gnt_pre = 10'b1000000000;" +Block 184 "3528733290" "if (req[8])" +Block 185 "3976402326" "gnt_pre = 10'b0100000000;" +Block 186 "610268916" "if (req[9])" +Block 187 "2346597286" "gnt_pre = 10'b1000000000;" +Block 188 "747021427" "if (req[0])" +Block 189 "1690233299" "gnt_pre = 10'b1;" +Block 190 "1606706974" "if (req[1])" +Block 191 "2347959258" "gnt_pre = 10'b0000000010;" +Block 192 "102797614" "if (req[2])" +Block 193 "788379014" "gnt_pre = 10'b0000000100;" +Block 194 "3249963526" "if (req[3])" +Block 195 "382810484" "gnt_pre = 10'b0000001000;" +Block 196 "271738362" "if (req[4])" +Block 197 "227919681" "gnt_pre = 10'b0000010000;" +Block 198 "3786322737" "if (req[5])" +Block 199 "1025406698" "gnt_pre = 10'b0000100000;" +Block 200 "2164188916" "if (req[6])" +Block 201 "1231277033" "gnt_pre = 10'b0001000000;" +Block 202 "1505214896" "if (req[7])" +Block 203 "1520961839" "gnt_pre = 10'b0010000000;" +Block 205 "1055643842" "if (req[9])" +Block 206 "2398618520" "gnt_pre = 10'b1000000000;" +Block 207 "18923348" "if (req[0])" +Block 208 "1320986730" "gnt_pre = 10'b1;" +Block 209 "501659403" "if (req[1])" +Block 210 "1737003565" "gnt_pre = 10'b0000000010;" +Block 211 "1882040225" "if (req[2])" +Block 212 "1745962593" "gnt_pre = 10'b0000000100;" +Block 213 "1717890289" "if (req[3])" +Block 214 "989871061" "gnt_pre = 10'b0000001000;" +Block 215 "975152805" "if (req[4])" +Block 216 "3596552244" "gnt_pre = 10'b0000010000;" +Block 217 "2011416120" "if (req[5])" +Block 218 "970304578" "gnt_pre = 10'b0000100000;" +Block 219 "1773378725" "if (req[6])" +Block 220 "1538974556" "gnt_pre = 10'b0001000000;" +Block 221 "4076044106" "if (req[7])" +Block 222 "1991240655" "gnt_pre = 10'b0010000000;" +Block 223 "1778384675" "if (req[8])" +Block 224 "2706223854" "gnt_pre = 10'b0100000000;" +Block 226 "181413555" "if (req[0])" +Block 227 "3782965589" "gnt_pre = 10'b1;" +Block 228 "2428281857" "if (req[1])" +Block 229 "2692193299" "gnt_pre = 10'b0000000010;" +Block 230 "1004613051" "if (req[2])" +Block 231 "3574059124" "gnt_pre = 10'b0000000100;" +Block 232 "166571193" "if (req[3])" +Block 233 "3084016524" "gnt_pre = 10'b0000001000;" +Block 234 "264203329" "if (req[4])" +Block 235 "3844745590" "gnt_pre = 10'b0000010000;" +Block 236 "3821617746" "if (req[5])" +Block 237 "204496379" "gnt_pre = 10'b0000100000;" +Block 238 "3987315959" "if (req[6])" +Block 239 "2866846401" "gnt_pre = 10'b0001000000;" +Block 240 "4250065574" "if (req[7])" +Block 241 "3985853219" "gnt_pre = 10'b0010000000;" +Block 242 "1112757981" "if (req[8])" +Block 243 "2376534082" "gnt_pre = 10'b0100000000;" +Block 244 "3125120076" "if (req[9])" +Block 245 "114785662" "gnt_pre = 10'b1000000000;" From 2dbd024ee189f5cad77f9ca0687ca2a6e3175139 Mon Sep 17 00:00:00 2001 From: Ellen Zhang Date: Mon, 21 May 2018 02:52:31 -0700 Subject: [PATCH 07/28] update cmac and cacc elfile --- verif/coverage/elfiles/nv_small_cacc_code.el | 1846 +++++++++--------- verif/coverage/elfiles/nv_small_cmac_code.el | 98 +- 2 files changed, 1005 insertions(+), 939 deletions(-) diff --git a/verif/coverage/elfiles/nv_small_cacc_code.el b/verif/coverage/elfiles/nv_small_cacc_code.el index dce49cf3..4262ef41 100644 --- a/verif/coverage/elfiles/nv_small_cacc_code.el +++ b/verif/coverage/elfiles/nv_small_cacc_code.el @@ -2,1366 +2,1390 @@ // This file contains the Excluded objects // Generated By User: ellenz // Format Version: 2 -// Date: Tue Apr 10 20:06:43 2018 +// Date: Mon May 21 02:50:54 2018 // ExclMode: default //================================================== -CHECKSUM: "2268941950" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256 -CHECKSUM: "1886719512" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.ram_Inst_16X256 -CHECKSUM: "3877304989" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.ram_Inst_16X256.ITOP -CHECKSUM: "415220548" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.ram_Inst_16X256.ITOP.io -CHECKSUM: "907215088" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272 -CHECKSUM: "3454287946" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.ram_Inst_16X272 -CHECKSUM: "4098223140" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.ram_Inst_16X272.ITOP -CHECKSUM: "2687639553" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.ram_Inst_16X272.ITOP.io -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.debug_mode_synchronizer -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.updateDR_synchronizer -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.debug_mode_synchronizer -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.updateDR_synchronizer -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.debug_mode_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.updateDR_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.debug_mode_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.updateDR_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2864954373" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.mbist_en_flop -CHECKSUM: "2864954373" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.mbist_en_flop -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_re_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_we_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_re_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_we_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0 -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_re_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_we_reg_w0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[53].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[151].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[69].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[249].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[18].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[167].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[114].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[116].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[51].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[245].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[67].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[247].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[16].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[165].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[112].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[243].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[65].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[14].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[161].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[163].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[110].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[208].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[179].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[128].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[241].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[63].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[79].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[206].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[28].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[177].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[124].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[126].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[61].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[255].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[77].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[204].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[26].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[175].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[122].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[253].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[75].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[22].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[202].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[24].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[171].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[173].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[120].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[218].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[189].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[138].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[251].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[73].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[20].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[200].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[89].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[216].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[38].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[187].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[134].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[136].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[71].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[87].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[214].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[36].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[185].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[132].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[85].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[32].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[212].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[34].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[181].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[183].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[130].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[228].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[199].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[146].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[148].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[83].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[30].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[210].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[99].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[226].SSS.nr +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_cell_0.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_0.nvdla_core_clk_slcg_0 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_1.nvdla_core_clk_slcg_0 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_2.nvdla_core_clk_slcg_0 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_cell_0.nvdla_core_clk_slcg_0 +CHECKSUM: "133485549" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_0 +CHECKSUM: "133485549" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_1 +CHECKSUM: "133485549" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_2 +CHECKSUM: "133485549" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_cell_0 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_clk_jtag_Wa_reg_w0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.CLK_GATE_clk +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_clk_jtag_Data_reg_r0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_clk_gate_core +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_la_bist_clkw0_gate +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_clk_jtag_Wa_reg_w0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.CLK_GATE_clk +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_clk_jtag_Data_reg_r0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_clk_gate_core +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_la_bist_clkw0_gate +CHECKSUM: "2733340695" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_ram_access_lockup +CHECKSUM: "2733340695" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_ram_access_lockup +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[48].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[3].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[197].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[1].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[144].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[12].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[81].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[10].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[109].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[9].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[97].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[7].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[44].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[5].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[224].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[14].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[46].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[8].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[195].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[6].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[142].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[4].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[107].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[2].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[95].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[0].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[42].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[15].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[222].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[13].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[191].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[11].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[193].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[140].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[238].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[156].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[158].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[231].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[105].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[118].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[93].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[169].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[40].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[100].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[220].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[153].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[236].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[235].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[58].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[55].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[154].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[233].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[103].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[104].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[91].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[90].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[119].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[102].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[54].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[155].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[234].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[237].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[56].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[57].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[152].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[190].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[101].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[41].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[117].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[106].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[52].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[92].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[232].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[157].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[150].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[239].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[248].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[59].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[17].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[141].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[19].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[192].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[166].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[43].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[168].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[221].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[115].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[108].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[50].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[94].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[230].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[159].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[246].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[143].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[68].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[194].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[15].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[225].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[164].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[45].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[113].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[223].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[129].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[98].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[64].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[96].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[244].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[80].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[66].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[145].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[196].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[162].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[227].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[111].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[47].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[29].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[180].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[209].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[31].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[127].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[82].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[62].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[147].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[242].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[198].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[229].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[160].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[49].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[27].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[131].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[207].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[182].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[176].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[33].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[178].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[211].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[125].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[84].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[60].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[149].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[240].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[133].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[78].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[184].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[25].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[215].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[205].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[35].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[174].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[1].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[123].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[213].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[88].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[139].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[86].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[74].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[250].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[254].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[70].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[76].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[135].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[201].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[186].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[23].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[5].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[203].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[217].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[172].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[3].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[121].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[37].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[39].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[170].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[219].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[21].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[252].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[188].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[72].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[137].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[137].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[72].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[188].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[252].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[7].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[21].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[219].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[170].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[39].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[37].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[121].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[172].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[217].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[203].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[23].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[186].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[201].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[135].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[76].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[70].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[254].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[250].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[74].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[86].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[139].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[88].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[9].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[213].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[123].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[174].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[35].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[205].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[215].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[25].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[184].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[78].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[133].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[240].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[149].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[60].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[84].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[125].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[211].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[178].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[33].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[176].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[182].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[207].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[131].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[27].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[49].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[160].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[229].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[11].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[198].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[242].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[147].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[62].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[82].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[127].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[31].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[209].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[180].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[29].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[47].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[111].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[227].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[162].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[196].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[13].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[145].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[66].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[80].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[244].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[96].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[64].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[98].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[129].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[223].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[113].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[45].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[164].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[225].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[15].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[194].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[68].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[143].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[246].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[159].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[230].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[94].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[50].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[108].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[115].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[221].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[168].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[43].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[166].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[192].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[19].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[141].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[17].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[59].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[248].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[239].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[150].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[157].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[232].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[92].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[52].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[106].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[117].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[41].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[101].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[190].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[152].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[57].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[56].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[237].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[234].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[155].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[54].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[102].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[119].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[90].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[91].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[104].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[103].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[233].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[154].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[55].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[58].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[235].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[236].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[153].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[220].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[100].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[40].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[169].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[93].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[118].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[105].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[231].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[158].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[156].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[238].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[140].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[193].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[191].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[222].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[53].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[42].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[151].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[95].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[69].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[107].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[249].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[142].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[18].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[195].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[167].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[46].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[114].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[224].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[116].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[44].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[51].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[97].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[245].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[109].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[67].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[81].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[247].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[144].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[16].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[197].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[165].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[48].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[112].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[226].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[243].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[99].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[65].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[210].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[12].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[30].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[14].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[83].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[161].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[148].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[163].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[146].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[110].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[199].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[208].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[228].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[179].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[130].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[128].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[183].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[241].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[0].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[63].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[181].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[10].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[34].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[79].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[212].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[206].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[32].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[28].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[85].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[177].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[132].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[124].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[185].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[126].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[36].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[61].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[2].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[255].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[214].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[77].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[87].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[204].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[71].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[26].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[136].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[175].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[134].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[122].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[187].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[8].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[4].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[253].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[38].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[75].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[216].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[22].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[89].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[202].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[200].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[24].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[20].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[171].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[73].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[173].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[251].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[120].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[138].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[218].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[189].SSS.nr CHECKSUM: "3212413072" INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[6].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[189].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[218].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[138].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[120].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[251].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[173].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[73].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[171].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[20].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[24].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[200].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[202].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[89].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[22].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[216].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[75].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[38].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[253].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[4].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[8].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[187].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[122].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[134].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[175].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[136].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[26].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[71].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[204].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[87].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[77].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[214].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[255].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[2].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[61].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[36].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[126].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[185].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[124].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[132].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[177].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[85].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[28].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[32].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[206].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[212].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[79].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[34].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[10].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[181].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[63].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[241].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[183].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[128].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[130].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[179].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[228].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[208].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[199].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[110].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[146].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[163].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[148].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[161].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[83].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[14].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[30].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[12].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[210].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[65].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[99].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[243].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[226].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[112].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[48].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[165].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[197].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[16].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[144].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[247].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[81].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[67].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[109].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[245].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[97].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[51].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[44].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[116].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[224].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[114].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[46].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[167].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[195].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[18].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[142].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[249].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[107].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[69].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[95].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[151].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[42].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[53].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[222].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_we_reg_w0.Jreg_ff[0].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[191].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[193].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[140].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[238].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[156].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_re_reg_r0.Jreg_ff[0].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[158].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[231].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[105].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[118].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[93].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[169].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[40].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[100].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[220].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[153].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[236].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[235].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[58].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[55].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[154].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[233].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[103].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[104].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[91].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[90].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[119].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[102].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[54].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[155].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[234].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[237].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[56].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[57].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[152].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[190].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[101].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[41].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[117].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[106].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[52].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[92].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[232].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[157].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[150].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[239].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[248].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[59].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[17].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[141].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[19].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[192].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[166].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[43].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[168].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[221].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[115].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[108].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[50].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[94].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[230].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[159].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[246].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[143].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[68].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[194].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[15].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[225].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[164].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[45].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[113].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[223].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[129].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[98].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[64].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[96].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[244].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[80].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[66].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[145].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[13].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[196].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[162].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[227].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[111].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[47].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[29].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[180].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[209].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[31].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[127].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[82].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[62].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[147].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[242].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[198].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[11].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[229].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[160].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[49].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[27].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[131].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[207].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[182].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[176].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[33].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[178].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[211].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[125].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[84].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[60].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[149].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[240].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[133].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[78].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[184].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[25].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[215].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[205].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[35].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[174].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[123].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[213].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[9].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[88].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[139].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[86].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[74].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[250].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[254].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[70].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[76].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[135].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[201].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[186].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[23].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[203].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[217].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[172].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[121].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[37].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[39].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[170].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[219].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[21].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[7].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[252].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[188].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[72].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[137].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[137].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[72].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[188].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[252].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[21].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[219].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[170].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[39].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[37].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[121].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[3].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[172].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[217].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[203].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[5].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[23].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[186].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[201].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[135].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[76].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[70].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[254].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[250].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[74].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[86].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[139].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[88].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[213].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[123].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[1].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[174].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[35].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[205].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[215].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[25].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[184].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[78].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[133].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[240].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[149].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[60].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[84].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[125].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[211].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[178].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[33].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[176].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[182].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[207].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[131].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[27].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[49].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[160].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[229].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[198].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[242].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[147].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[62].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[82].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[127].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[31].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[209].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[180].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[29].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[47].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[111].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[227].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[162].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[196].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[145].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[66].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[80].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[244].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[96].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[64].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[98].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[129].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[223].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[113].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[45].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[164].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[225].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[15].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[194].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[68].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[143].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[246].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[159].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[230].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[94].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[50].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[108].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[115].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[221].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[168].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[43].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[166].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[192].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[19].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[141].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[17].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[59].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[248].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[239].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[150].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[157].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[232].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[92].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[52].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[106].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[117].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[41].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[101].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[190].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[152].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[57].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[56].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[237].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[234].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[155].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[54].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[102].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[119].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[90].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[91].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[104].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[103].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[233].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[154].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[55].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[58].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[235].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[236].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[153].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[220].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[100].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[40].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[169].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[93].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[118].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[105].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.Jreg_ff[231].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[158].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[156].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[238].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[140].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[193].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[11].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[191].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[13].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[222].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[15].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[42].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[95].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[2].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[107].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[4].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[142].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[6].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[195].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[8].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[46].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[14].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[224].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[5].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[44].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[7].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[97].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[9].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[109].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[10].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[81].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[12].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[144].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[1].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[197].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.Jreg_ff[3].SSS.nr -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0.UJ_testInst_ess_scanout_buf -CHECKSUM: "2733340695" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_ram_access_lockup -CHECKSUM: "2733340695" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_ram_access_lockup -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_la_bist_clkw0_gate -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_clk_gate_core -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_clk_jtag_Data_reg_r0 -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.CLK_GATE_clk -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_clk_jtag_Wa_reg_w0 -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_la_bist_clkw0_gate -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_clk_gate_core -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_clk_jtag_Data_reg_r0 -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.CLK_GATE_clk -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_clk_jtag_Wa_reg_w0 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_30 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_18 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_17 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_16 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_15 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_14 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_13 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_12 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_11 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_10 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_9 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_29 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_28 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_27 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_26 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_25 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_24 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_23 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_22 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_21 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_20 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_31 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_19 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.UJ_BBOX2UNIT_UNUSED_pwrbus_30 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_18 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_17 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_16 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_15 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_14 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_13 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_12 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_11 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_10 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_9 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_29 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_28 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_27 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_26 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_25 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_24 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_23 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_22 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_21 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_20 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_31 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.UJ_BBOX2UNIT_UNUSED_pwrbus_19 -CHECKSUM: "133485549" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_cell_0 -CHECKSUM: "133485549" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_2 -CHECKSUM: "133485549" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_1 -CHECKSUM: "133485549" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_0 -CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_cell_0.nvdla_core_clk_slcg_0 -CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_2.nvdla_core_clk_slcg_0 -CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_1.nvdla_core_clk_slcg_0 -CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_0.nvdla_core_clk_slcg_0 -CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_cell_0.nvdla_core_clk_slcg_0.p_clkgate -CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate -CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate -CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[48].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[226].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[99].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[210].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[30].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[83].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[148].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[146].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[199].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[228].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[130].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[183].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[181].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[34].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[212].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[32].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[85].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[132].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[185].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[36].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[214].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[87].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[71].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[136].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[134].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[187].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[38].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[216].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[89].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[200].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[20].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[73].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[251].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[138].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[189].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[218].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[120].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[173].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[171].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[24].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[202].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[22].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[75].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[253].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[122].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[175].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[26].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[204].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[77].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[255].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[61].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[126].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[124].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[177].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[28].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[206].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[79].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[63].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[241].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[128].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[179].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[208].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[110].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[163].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[161].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[14].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[65].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[243].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[112].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[165].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[16].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[247].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[67].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[245].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[51].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[116].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[114].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[167].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[18].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[249].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[69].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[151].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0.Jreg_ff[53].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_15_0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Ra_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Data_reg_r0_271_16 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_we_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_Wa_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_re_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Data_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Ra_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_we_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.testInst_Wa_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.testInst_re_reg_r0 +CHECKSUM: "2864954373" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.mbist_en_flop +CHECKSUM: "2864954373" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.mbist_en_flop +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.updateDR_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.debug_mode_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.updateDR_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.debug_mode_synchronizer.NV_GENERIC_CELL +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.updateDR_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.debug_mode_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.updateDR_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.debug_mode_synchronizer +CHECKSUM: "2687639553" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.ram_Inst_16X272.ITOP.io +CHECKSUM: "4098223140" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.ram_Inst_16X272.ITOP +CHECKSUM: "3454287946" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272.ram_Inst_16X272 +CHECKSUM: "907215088" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_assembly_buffer.u_accu_abuf_0.r_nv_ram_rws_16x272 +CHECKSUM: "415220548" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.ram_Inst_16X256.ITOP.io +CHECKSUM: "3877304989" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.ram_Inst_16X256.ITOP +CHECKSUM: "1886719512" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256.ram_Inst_16X256 +CHECKSUM: "2268941950" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_delivery_buffer.u_accu_dbuf.r_nv_ram_rws_16x256 +CHECKSUM: "2001472007 445831934" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_calculator.u_cell_int8_0 +Block 24 "3174779762" "i_sat_bits = {33 {(~i_sum_sign)}};" +CHECKSUM: "2001472007 445831934" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_calculator.u_cell_int8_1 +Block 24 "3174779762" "i_sat_bits = {33 {(~i_sum_sign)}};" +CHECKSUM: "2001472007 445831934" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_calculator.u_cell_int8_2 +Block 24 "3174779762" "i_sat_bits = {33 {(~i_sum_sign)}};" +CHECKSUM: "2001472007 445831934" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_calculator.u_cell_int8_3 +Block 24 "3174779762" "i_sat_bits = {33 {(~i_sum_sign)}};" +CHECKSUM: "2001472007 445831934" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_calculator.u_cell_int8_4 +Block 24 "3174779762" "i_sat_bits = {33 {(~i_sum_sign)}};" +CHECKSUM: "2001472007 445831934" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_calculator.u_cell_int8_5 +Block 24 "3174779762" "i_sat_bits = {33 {(~i_sum_sign)}};" +CHECKSUM: "2001472007 445831934" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_calculator.u_cell_int8_6 +Block 24 "3174779762" "i_sat_bits = {33 {(~i_sum_sign)}};" +CHECKSUM: "2001472007 445831934" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_a.u_NV_NVDLA_cacc.u_calculator.u_cell_int8_7 +Block 24 "3174779762" "i_sat_bits = {33 {(~i_sum_sign)}};" diff --git a/verif/coverage/elfiles/nv_small_cmac_code.el b/verif/coverage/elfiles/nv_small_cmac_code.el index 76f41877..2384a19d 100644 --- a/verif/coverage/elfiles/nv_small_cmac_code.el +++ b/verif/coverage/elfiles/nv_small_cmac_code.el @@ -2,48 +2,90 @@ // This file contains the Excluded objects // Generated By User: ellenz // Format Version: 2 -// Date: Tue Apr 10 20:09:04 2018 +// Date: Mon May 21 02:45:51 2018 // ExclMode: default //================================================== -CHECKSUM: "617721021" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0 -CHECKSUM: "617721021" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6 -CHECKSUM: "617721021" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5 -CHECKSUM: "617721021" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4 -CHECKSUM: "617721021" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3 -CHECKSUM: "617721021" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2 -CHECKSUM: "617721021" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1 +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0 CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0 CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0 CHECKSUM: "2332134184" INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0 CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0 CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0 CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0 CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0.p_clkgate +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0.p_clkgate CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0.p_clkgate +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0.p_clkgate CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0.p_clkgate +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0.p_clkgate CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0.p_clkgate +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0.p_clkgate CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_0 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_6 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_5 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_4 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_3 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_2 +CHECKSUM: "617721021" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_1 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0 From 7ba931c3fa4887d2ca8797751558821393d6dd45 Mon Sep 17 00:00:00 2001 From: rayz Date: Mon, 21 May 2018 20:36:37 +0800 Subject: [PATCH 08/28] add lsf queue info recording in regression test .json file --- verif/tools/lsf_monitor.py | 16 +++++++++------- verif/tools/run_report.py | 7 +++++-- 2 files changed, 14 insertions(+), 9 deletions(-) diff --git a/verif/tools/lsf_monitor.py b/verif/tools/lsf_monitor.py index e422184e..2c6501a8 100644 --- a/verif/tools/lsf_monitor.py +++ b/verif/tools/lsf_monitor.py @@ -82,6 +82,7 @@ def get_job_init_status(self, job_id=[]): exec_host_info[item]['exechost'] = '-' exec_host_info[item]['runlimit'] = '-' exec_host_info[item]['memlimit'] = '-' + exec_host_info[item]['queue_type'] = '-' exec_host_info[item]['cputime_used'] = '-' exec_host_info[item]['maxmem'] = '-' exec_host_info[item]['syndrome'] = '-' @@ -92,18 +93,19 @@ def get_job_init_status(self, job_id=[]): maxmem_p = re.compile(r'MAX\s*MEM:\s*(\d+.*)Mbytes;') maxmem = maxmem_p.search(str(info)) - match = re.search(r'.*Status\s*<(\w+)>,.*CWD\s*<(.*)>,.*CPULIMIT\s*([\d\.]+\s*min)\s*of\s*([a-zA-Z0-9-]+)\s*.*RUNLIMIT\s*([\d\.]+\s*min)\s*.*MEMLIMIT\s*(\d+\s*)K\s*', str(info)) + match = re.search(r'.*Status\s*<(\w+)>,.*VIRTUAL_QUEUE=(\w+)\s.*CWD\s*<(.*)>,.*CPULIMIT\s*([\d\.]+\s*min)\s*of\s*([a-zA-Z0-9-]+)\s*.*RUNLIMIT\s*([\d\.]+\s*min)\s*.*MEMLIMIT\s*(\d+\s*)K\s*', str(info)) if match is None: with open('log_of_job_'+str(item), 'w') as fh: fh.write(str(info)) #print(str(info)) raise Exception('Job status extraction failed') - exec_host_info[item]['status'] = match.group(1) - exec_host_info[item]['testdir'] = os.path.basename(match.group(2)) - exec_host_info[item]['cpulimit'] = match.group(3) - exec_host_info[item]['exechost'] = match.group(4) - exec_host_info[item]['runlimit'] = match.group(5) - exec_host_info[item]['memlimit'] = str(int(match.group(6))//1024)+' MB' + exec_host_info[item]['status'] = match.group(1) + exec_host_info[item]['queue_type'] = match.group(2) + exec_host_info[item]['testdir'] = os.path.basename(match.group(3)) + exec_host_info[item]['cpulimit'] = match.group(4) + exec_host_info[item]['exechost'] = match.group(5) + exec_host_info[item]['runlimit'] = match.group(6) + exec_host_info[item]['memlimit'] = str(int(match.group(7))//1024)+' MB' if cputime: exec_host_info[item]['cputime_used'] = '{:.1f}'.format(float(cputime.group(1))/60)+' min' else: diff --git a/verif/tools/run_report.py b/verif/tools/run_report.py index a2edf887..94dd4680 100755 --- a/verif/tools/run_report.py +++ b/verif/tools/run_report.py @@ -208,8 +208,11 @@ def __parse_regress_status(self): self.test_orgz_data[tid]['errinfo'] = errinfo self.test_orgz_data[tid]['syndrome'] = '' if self.regr_sts_data['farm_type'] == "LSF": - self.test_orgz_data[tid]['cputime'] = self.job_status[info['job_id']]['cputime_used'] - self.test_orgz_data[tid]['memsize'] = self.job_status[info['job_id']]['maxmem'] + self.test_orgz_data[tid]['cputime'] = self.job_status[info['job_id']]['cputime_used'] + self.test_orgz_data[tid]['memsize'] = self.job_status[info['job_id']]['maxmem'] + self.test_orgz_data[tid]['cpulimit'] = self.job_status[info['job_id']]['runlimit'] + self.test_orgz_data[tid]['memlimit'] = self.job_status[info['job_id']]['memlimit'] + self.test_orgz_data[tid]['queue_type'] = self.job_status[info['job_id']]['queue_type'] def __print_regress_report(self): From f04327d1b2e4e3454c5990a1f295eeb10dc0a3de Mon Sep 17 00:00:00 2001 From: rayz Date: Mon, 21 May 2018 21:56:36 +0800 Subject: [PATCH 09/28] add scenario name print in trace file --- .../trace_generator/scenarios/nvdla_sdprdma_sdp_pdp_scenario.sv | 2 ++ .../trace_generator/scenarios/nvdla_sdprdma_sdp_scenario.sv | 2 ++ 2 files changed, 4 insertions(+) diff --git a/verif/testbench/trace_generator/scenarios/nvdla_sdprdma_sdp_pdp_scenario.sv b/verif/testbench/trace_generator/scenarios/nvdla_sdprdma_sdp_pdp_scenario.sv index 54f9774d..fa55de10 100644 --- a/verif/testbench/trace_generator/scenarios/nvdla_sdprdma_sdp_pdp_scenario.sv +++ b/verif/testbench/trace_generator/scenarios/nvdla_sdprdma_sdp_pdp_scenario.sv @@ -67,6 +67,7 @@ function void nvdla_sdprdma_sdp_pdp_scenario::trace_dump(int fh); `uvm_fatal(inst_name, "Null handle of trace file ...") end `uvm_info(inst_name, "Start trace dumping ...", UVM_HIGH) + print_comment(fh, $sformatf("Scenario SDPRDMA_SDP_PDP:%0d start",active_cnt)); set_sync_evt_name(); // Get surface setting fro resource register @@ -88,6 +89,7 @@ function void nvdla_sdprdma_sdp_pdp_scenario::trace_dump(int fh); cov.sdp_pool.sdp_sample(); cov.pdp_pool.sample(); end + print_comment(fh, $sformatf("Scenario SDPRDMA_SDP_PDP:%0d end",active_cnt)); endfunction: trace_dump function void nvdla_sdprdma_sdp_pdp_scenario::activate(); diff --git a/verif/testbench/trace_generator/scenarios/nvdla_sdprdma_sdp_scenario.sv b/verif/testbench/trace_generator/scenarios/nvdla_sdprdma_sdp_scenario.sv index 59072941..e8d08d7e 100644 --- a/verif/testbench/trace_generator/scenarios/nvdla_sdprdma_sdp_scenario.sv +++ b/verif/testbench/trace_generator/scenarios/nvdla_sdprdma_sdp_scenario.sv @@ -64,6 +64,7 @@ function void nvdla_sdprdma_sdp_scenario::trace_dump(int fh); `uvm_fatal(inst_name, "Null handle of trace file ...") end `uvm_info(inst_name, "Start trace dumping ...", UVM_HIGH) + print_comment(fh, $sformatf("Scenario SDPRDMA_SDP:%0d start",active_cnt)); set_sync_evt_name(); // Get surface setting fro resource register @@ -83,6 +84,7 @@ function void nvdla_sdprdma_sdp_scenario::trace_dump(int fh); `endif cov.sdp_pool.sdp_sample(); end + print_comment(fh, $sformatf("Scenario SDPRDMA_SDP:%0d end",active_cnt)); endfunction: trace_dump function void nvdla_sdprdma_sdp_scenario::activate(); From 903abf09e18700e5c52bd70db65ccf93e4b908c8 Mon Sep 17 00:00:00 2001 From: Peter Li Date: Mon, 21 May 2018 19:54:27 -0700 Subject: [PATCH 10/28] Update score setting for sdp direct tests --- .../testplans/nv_small_test_list_L1.py | 30 +++++++++---------- .../testplans/nv_small_test_list_L2.py | 8 ++--- 2 files changed, 19 insertions(+), 19 deletions(-) diff --git a/verif/regression/testplans/nv_small_test_list_L1.py b/verif/regression/testplans/nv_small_test_list_L1.py index 1b1c7118..73bb9857 100644 --- a/verif/regression/testplans/nv_small_test_list_L1.py +++ b/verif/regression/testplans/nv_small_test_list_L1.py @@ -556,92 +556,92 @@ #add_test(name='dc_sdp_pdp_WxHxC_RxSxCxK_int8_0', # tags=['L1','cc', 'dc'], -# args=[], +# args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], # config=['nvdla_utb'], # desc='''test fused layers''') #SDP tests add_test(name='sdp_3x3x33_bs_int8_reg_0', tags=['L1', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''copied from sdp_bs_reg_stest, alu_algo SUM. mul_prelu 0''') add_test(name='sdp_3x3x33_bs_int8_reg_1', tags=['L1', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''copied from sdp_bs_reg_stest, alu_algo MIN. mul_prelu 0''') add_test(name='sdp_23x13x42_bs_int8_mem_0', tags=['L1', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''converted from sdp_cmod_full_feature_3, src mem, one_byte, per_element, bypass alu, mul_prelu 1, bypass relu''') add_test(name='sdp_5x24x18_bs_int8_mem_0', tags=['L1', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''converted from sdp_cmod_full_feature_4, src mem, one_byte, per_element, alu_algo MAX, bypass mul, bypass relu''') add_test(name='sdp_3x3x33_bn_int8_reg_0', tags=['L1', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''copied from sdp_bn_reg_stest_0, alu_algo SUM. mul_prelu 0''') add_test(name='sdp_3x3x33_bn_int8_reg_1', tags=['L1', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''copied from sdp_bn_reg_stest_1, alu_algo MAX. bypass mul, bypass relu''') add_test(name='sdp_3x3x33_bn_int8_reg_2', tags=['L1', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''copied from sdp_bn_reg_stest_2, alu_algo MIN. mul_prelu 1''') add_test(name='sdp_3x3x33_bn_int8_reg_3', tags=['L1', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''copied from sdp_bn_reg_stest_3, alu_algo SUM. mul_prelu 0, bypass alu''') add_test(name='sdp_3x3x33_bn_int8_mem_0', tags=['L1', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''converted from sdp_bn_mem_stest, alu_algo SUM. bypass mul, per_element''') #add_test(name='sdp_3x3x33_ew_int8_reg_0', # tags=['L1', 'sdp'], -# args=[], +# args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], # config=['nvdla_utb'], # desc='''copied from sdp_ew_reg_stest, alu_algo SUM. mul_prelu 0, bypass alu_cvt, bypass mul_cvt, bypass lut''') # #add_test(name='sdp_3x3x33_ew_le_lin_int8', # tags=['L1', 'sdp'], -# args=[], +# args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], # config=['nvdla_utb'], # desc='''copied from sdp_le_lin_stest, bypass alu, bypass mul''') # #add_test(name='sdp_3x3x33_ew_le_exp_int8', # tags=['L1', 'sdp'], -# args=[], +# args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], # config=['nvdla_utb'], # desc='''copied from sdp_le_exp_stest, bypass alu, bypass mul''') # #add_test(name='sdp_3x3x32_ew_lo_lin_int8', # tags=['L1', 'sdp'], -# args=[], +# args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], # config=['nvdla_utb'], # desc='''copied from sdp_lo_lin_stest, bypass alu, bypass mul''') add_test(name='sdp_1x1x8_pass_through_int8_0', tags=['L1', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''test 1x1x8 case, bypass bs, bypass bn, bypass ew''') diff --git a/verif/regression/testplans/nv_small_test_list_L2.py b/verif/regression/testplans/nv_small_test_list_L2.py index 831d1c9f..1060dcd1 100644 --- a/verif/regression/testplans/nv_small_test_list_L2.py +++ b/verif/regression/testplans/nv_small_test_list_L2.py @@ -43,24 +43,24 @@ #SDP add_test(name='sdp_4x1x8192_pass_through_int8_0', tags=['L2', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''test max channel number, bypass bs, bypass bn, bypass ew''') add_test(name='sdp_8192x1x1_pass_through_int8_0', tags=['L2', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''test max width number, bypass bs, bypass bn, bypass ew''') add_test(name='sdp_1x8192x1_pass_through_int8_0', tags=['L2', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''test max height number, bypass bs, bypass bn, bypass ew''') add_test(name='sdp_1x1x1_pass_through_int8', tags=['L2', 'sdp'], - args=[], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], config=['nvdla_utb'], desc='''test 1x1x1 case, bypass bs, bypass bn, bypass ew''') From 558c00a9ce336804da9fced9527ff009c48383e5 Mon Sep 17 00:00:00 2001 From: rayz Date: Mon, 21 May 2018 20:09:06 -0700 Subject: [PATCH 11/28] update lsf monitor match pattern --- verif/tools/lsf_monitor.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/verif/tools/lsf_monitor.py b/verif/tools/lsf_monitor.py index 2c6501a8..b60d9caa 100644 --- a/verif/tools/lsf_monitor.py +++ b/verif/tools/lsf_monitor.py @@ -93,7 +93,7 @@ def get_job_init_status(self, job_id=[]): maxmem_p = re.compile(r'MAX\s*MEM:\s*(\d+.*)Mbytes;') maxmem = maxmem_p.search(str(info)) - match = re.search(r'.*Status\s*<(\w+)>,.*VIRTUAL_QUEUE=(\w+)\s.*CWD\s*<(.*)>,.*CPULIMIT\s*([\d\.]+\s*min)\s*of\s*([a-zA-Z0-9-]+)\s*.*RUNLIMIT\s*([\d\.]+\s*min)\s*.*MEMLIMIT\s*(\d+\s*)K\s*', str(info)) + match = re.search(r'.*Status\s*<(\w+)>,.*VIRTUAL_QUEUE=(\w+)\s*QSUB_JOB_TAG_PROJECT_MODE.*CWD\s*<(.*)>,.*CPULIMIT\s*([\d\.]+\s*min)\s*of\s*([a-zA-Z0-9-]+)\s*.*RUNLIMIT\s*([\d\.]+\s*min)\s*.*MEMLIMIT\s*(\d+\s*)K\s*', str(info)) if match is None: with open('log_of_job_'+str(item), 'w') as fh: fh.write(str(info)) From a74eb82422c50c2de321aea2fe801d0eb4a104ea Mon Sep 17 00:00:00 2001 From: Ellen Zhang Date: Fri, 25 May 2018 01:13:15 -0700 Subject: [PATCH 12/28] add dmaif mc_pending waiver in sdp, help jian submit csc elfile --- verif/coverage/elfiles/nv_small_csc_code.el | 30 + verif/coverage/elfiles/nv_small_sdp_code.el | 5836 ++++++++++--------- 2 files changed, 2950 insertions(+), 2916 deletions(-) diff --git a/verif/coverage/elfiles/nv_small_csc_code.el b/verif/coverage/elfiles/nv_small_csc_code.el index 69613754..edca1756 100644 --- a/verif/coverage/elfiles/nv_small_csc_code.el +++ b/verif/coverage/elfiles/nv_small_csc_code.el @@ -10,3 +10,33 @@ INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_wl Block 191 "2071161909" "wmb_req_addr <= wmb_req_addr_w;" Block 197 "1572362044" "wmb_req_addr_last <= wmb_req_addr_w;" Block 220 "1249590617" "sc2buf_wmb_rd_addr <= wmb_req_addr;" +CHECKSUM: "1941532982 3809241588" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_regfile +Block 69 "0" "assign csb_rresp_pd_w[32] = csb_rresp_error;" +Block 70 "0" "assign csb_wresp_pd_w[31:0] = csb_wresp_rdat[31:0];" +Block 71 "0" "assign csb_wresp_pd_w[32] = csb_wresp_error;" +Block 76 "1949545652" "csc2csb_resp_pd <= csb_rresp_pd_w;" +CHECKSUM: "2285388798" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_0 +CHECKSUM: "2285388798" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_wg +CHECKSUM: "2285388798" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_2 +CHECKSUM: "2285388798" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_1 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_0.nvdla_core_clk_slcg_0 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_wg.nvdla_core_clk_slcg_0 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_2.nvdla_core_clk_slcg_0 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_1.nvdla_core_clk_slcg_0 +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_wg.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate diff --git a/verif/coverage/elfiles/nv_small_sdp_code.el b/verif/coverage/elfiles/nv_small_sdp_code.el index 8cb13459..5bdc4960 100644 --- a/verif/coverage/elfiles/nv_small_sdp_code.el +++ b/verif/coverage/elfiles/nv_small_sdp_code.el @@ -2,3461 +2,3435 @@ // This file contains the Excluded objects // Generated By User: ellenz // Format Version: 2 -// Date: Tue May 8 23:53:41 2018 +// Date: Fri May 25 00:44:27 2018 // ExclMode: default //================================================== -CHECKSUM: "2943359973 1048761457" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_alu_pack -Block 55 "default : mux_data = {OW{1'b0}};" -CHECKSUM: "2943359973 1746514056" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_alu_pack -Toggle cfg_dp_8 "net cfg_dp_8" -CHECKSUM: "2943359973 2182456865" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_alu_pack -Branch 0 "(!cfg_dp_8)" -Branch 5 (8) "pack_cnt default" -CHECKSUM: "1552407095 7788695" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_dppack -Block 21 "pack_cnt <= pack_cnt + 1;" -CHECKSUM: "1552407095 91520953" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_dppack -Branch 2 (2) "(!nvdla_core_rstn) 0,1,0" -CHECKSUM: "2260079850 1992617883" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_dpunpack -Block 15 "nvdla_core_clk" -CHECKSUM: "2260079850 3715431549" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_dpunpack -Branch 1 (2) "(!nvdla_core_rstn) 0,1,0" -CHECKSUM: "2943359973 1048761457" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_mul_pack -Block 55 "wire [OW-1:0] pack_seg1 = pack_data_ext[((OW*1) + OW - 1):OW*1];" -CHECKSUM: "2943359973 2182456865" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_mul_pack -Branch 0 "(!cfg_dp_8)" -Branch 5 (8) "pack_cnt default" -CHECKSUM: "2943359973 1048761457" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_alu_pack -Block 55 "wire [OW-1:0] pack_seg1 = pack_data_ext[((OW*1) + OW - 1):OW*1];" -CHECKSUM: "2943359973 1746514056" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_alu_pack -Toggle cfg_dp_8 "net cfg_dp_8" -CHECKSUM: "2943359973 2182456865" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_alu_pack -Branch 0 "(!cfg_dp_8)" -Branch 5 (8) "pack_cnt default" -CHECKSUM: "1552407095 7788695" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_dppack -Block 21 "pack_cnt <= pack_cnt + 1;" -CHECKSUM: "1552407095 91520953" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_dppack -Branch 2 (2) "(!nvdla_core_rstn) 0,1,0" -CHECKSUM: "2260079850 1992617883" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_dpunpack -Block 15 "nvdla_core_clk" -CHECKSUM: "2260079850 3715431549" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_dpunpack -Branch 1 (2) "(!nvdla_core_rstn) 0,1,0" -CHECKSUM: "2943359973 1048761457" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_mul_pack -Block 55 "wire [OW-1:0] pack_seg1 = pack_data_ext[((OW*1) + OW - 1):OW*1];" -CHECKSUM: "2943359973 1746514056" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_mul_pack -Toggle cfg_dp_8 "net cfg_dp_8" -CHECKSUM: "2943359973 2182456865" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_mul_pack -Branch 0 "(!cfg_dp_8)" -Branch 5 (8) "pack_cnt default" -CHECKSUM: "2943359973 1048761457" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_dpin_pack -Block 55 "wire [OW-1:0] pack_seg1 = pack_data_ext[((OW*1) + OW - 1):OW*1];" -CHECKSUM: "2943359973 2202511212" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_dpin_pack -Toggle cfg_dp_8 "net cfg_dp_8" -CHECKSUM: "2943359973 2182456865" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_dpin_pack -Branch 0 "(!cfg_dp_8)" -Branch 5 (8) "pack_cnt default" -CHECKSUM: "4215855505" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate -CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate.nvdla_core_clk_slcg_0 -CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate.nvdla_core_clk_slcg_2 -CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate.nvdla_core_clk_slcg_1 -CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_0 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_1 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_2 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_3 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_4 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_5 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_6 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_7 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_8 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +CHECKSUM: "3424046172" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate.nvdla_core_clk_slcg_2.p_clkgate +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.nvdla_core_clk_mgate.p_clkgate CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate.nvdla_core_clk_slcg_1.p_clkgate -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_SI -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_iddq_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_jtag_readonly_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_ary_atpg_ctl -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_ary_read_inh -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_ce_r0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_scan_en -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_7 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_scan_ramtms -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_shiftDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_we_w0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_test_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_en_sync -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_updateDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_debug_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_write_inh -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_7 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 -CHECKSUM: "1438464391" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram -CHECKSUM: "173341201" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16 -CHECKSUM: "1292234312" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16 -CHECKSUM: "2168844431" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16.ITOP -CHECKSUM: "313150271" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16.ITOP.iow0 -CHECKSUM: "313150271" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16.ITOP.iow1 -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.debug_mode_synchronizer -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.updateDR_synchronizer -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.debug_mode_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.updateDR_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2864954373" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.mbist_en_flop -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0 -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[7].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[7].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[15].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[14].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "2733340695" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_ram_access_lockup -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_la_bist_clkw0_gate -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_clk_gate_core -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_clk_jtag_Data_reg_r0 -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.CLK_GATE_clk -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_clk_jtag_Wa_reg_w0 -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.rflip -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.rf0 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UI_enableDFTmode_async_ld_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_7 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_6 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_5 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_4 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_3 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_2 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_1 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_0 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_gate.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.nvdla_core_clk_mgate +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_gate.nvdla_core_clk_slcg_0 +CHECKSUM: "858109174" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_gate CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_19 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_31 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_20 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_21 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_22 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_23 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_24 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_25 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_26 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_27 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_28 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_29 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_0 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_1 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_2 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_3 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_4 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_5 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_6 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_7 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_8 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_9 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_10 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_11 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_15 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_12 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_14 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_13 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_13 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_14 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_12 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_15 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_11 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_16 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_10 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_17 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_SO +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_18 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_9 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +CHECKSUM: "1273658572" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo +CHECKSUM: "1482222343" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_8 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_19 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_7 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_31 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_6 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_20 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_5 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_21 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_4 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_22 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_3 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_23 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_2 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_24 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_en_sync -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_ramaccess_rst_ -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_7 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_6 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_shiftDR -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_5 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_test_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_4 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_3 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_2 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_scan_ramtms -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_write_inh -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_ary_atpg_ctl -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_debug_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_we_w0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_iddq_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Di_w0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Di_w0_0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_7 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_6 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_5 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_4 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_3 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_2 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_jtag_readonly_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_SI -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_ary_read_inh -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_ce_r0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_0 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_1 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_2 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_3 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_4 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_5 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_6 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_7 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_8 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +CHECKSUM: "3286904238" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_0 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_1 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_2 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_3 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_4 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_5 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_6 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_7 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_8 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_30 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_scan_en +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_updateDR CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_updateDR -CHECKSUM: "808838489" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_gate -CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_gate.nvdla_core_clk_slcg_0 -CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_gate.nvdla_core_clk_slcg_0.p_clkgate -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_SI -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_iddq_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_jtag_readonly_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_ary_atpg_ctl -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_ary_read_inh -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_ce_r0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_scan_en -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_7 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_scan_ramtms -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_shiftDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_we_w0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_test_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_en_sync -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_updateDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_debug_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_write_inh -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_7 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 -CHECKSUM: "2121408052" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram -CHECKSUM: "3952735129" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65 -CHECKSUM: "1321866749" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65 -CHECKSUM: "2325582529" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65.ITOP -CHECKSUM: "3380785552" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65.ITOP.iow0 -CHECKSUM: "3380785552" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65.ITOP.iow1 -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.debug_mode_synchronizer -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.updateDR_synchronizer -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.debug_mode_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.updateDR_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2864954373" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.mbist_en_flop -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0 -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[7].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[7].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[63].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[15].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[40].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[16].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[44].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[41].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[45].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[49].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[46].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[22].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[23].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[27].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[24].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[52].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[28].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[53].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[57].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[58].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[30].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[31].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[35].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[39].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[36].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[60].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[64].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[61].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[17].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[14].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[42].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[18].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[19].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[43].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[47].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[48].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[20].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[21].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[25].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[29].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[50].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[26].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[54].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[51].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[55].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[59].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[56].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[32].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[33].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[37].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[34].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[38].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[62].SSS.nr -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "2733340695" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_ram_access_lockup -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_la_bist_clkw0_gate -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_clk_gate_core -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_clk_jtag_Data_reg_r0 -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.CLK_GATE_clk -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_clk_jtag_Wa_reg_w0 -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.rflip -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.rf2 -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.rf1 -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.rf0 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UI_enableDFTmode_async_ld_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_7 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_6 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_5 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_4 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_3 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_2 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_1 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_0 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_50 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_49 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_48 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_47 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_46 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_45 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_44 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_43 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_42 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_41 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_40 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_39 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_38 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_37 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_36 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_35 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_34 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_33 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_32 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_31 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_30 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_29 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_28 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_18 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_17 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_16 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_15 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_14 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_13 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_12 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_11 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_10 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_9 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_29 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_28 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_27 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_26 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_25 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_24 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_23 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_22 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_21 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_20 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_31 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_19 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_30 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_27 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_26 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_25 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_24 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_23 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_22 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_21 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_20 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_19 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_18 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_17 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_16 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_15 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_14 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_13 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_12 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_11 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_10 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_SO -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_64 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_63 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_62 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_61 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_60 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_9 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_8 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_7 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_6 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_59 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_5 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_58 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_4 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_57 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_3 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_56 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_2 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_55 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_1 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_54 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_0 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_53 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_52 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_51 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_en_sync -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_ramaccess_rst_ -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_7 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_6 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_shiftDR -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_5 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_test_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_4 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_3 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_2 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_scan_ramtms -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_write_inh -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_ary_atpg_ctl -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_debug_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_we_w0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_iddq_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Di_w0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Di_w0_0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_7 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_6 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_5 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_4 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_3 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_2 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_jtag_readonly_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_SI -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_ary_read_inh -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_ce_r0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_scan_en -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_updateDR -CHECKSUM: "2984219062 1435982824" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu -Block 75 "//=======================================================" -Block 81 "end" -CHECKSUM: "2984219062 3687346137" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu -Toggle pwrbus_ram_pd "net pwrbus_ram_pd[31:0]" -CHECKSUM: "2984219062 929366083" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu -Branch 12 (4) "rod_sel default" -Branch 13 (4) "rod_sel default" -CHECKSUM: "2984219062 1435982824" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_mul -Block 75 "default : out_data_1bpe[8*8 -1:0] = {8*8{`x_or_0}};" -Block 81 "default : out_vld_1bpe = {1{`x_or_0}};" -CHECKSUM: "2984219062 3687346137" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_mul -Toggle pwrbus_ram_pd "net pwrbus_ram_pd[31:0]" -Toggle cfg_dp_8 "net cfg_dp_8" -CHECKSUM: "2984219062 929366083" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_mul -Branch 12 (4) "rod_sel default" -Branch 13 (4) "rod_sel default" -CHECKSUM: "3251589491 1699482894" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_ig -Block 24 "size_of_surf = reg2dp_channel[12:3 -1];" -CHECKSUM: "3251589491 958114489" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_ig -Branch 1 (2) "cfg_proc_int8 0,0" -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_SI -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_iddq_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_jtag_readonly_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_ary_atpg_ctl -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_ary_read_inh -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_ce_r0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_scan_en -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_scan_ramtms -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_shiftDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_we_w0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_test_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_en_sync -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_updateDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_debug_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_write_inh -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 -CHECKSUM: "2183897495" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram -CHECKSUM: "4267984688" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14 -CHECKSUM: "3422308825" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.ram_Inst_80X14 -CHECKSUM: "4184544770" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.ram_Inst_80X14.ITOP -CHECKSUM: "2922861167" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.ram_Inst_80X14.ITOP.io -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.debug_mode_synchronizer -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.updateDR_synchronizer -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.debug_mode_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.updateDR_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2864954373" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.mbist_en_flop -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_re_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_we_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0 -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_re_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_we_reg_w0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "2733340695" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_ram_access_lockup -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_la_bist_clkw0_gate -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_clk_gate_core -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_clk_jtag_Data_reg_r0 -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.CLK_GATE_clk -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_clk_jtag_Wa_reg_w0 -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.rflip -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.rf0 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UI_enableDFTmode_async_ld_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_svop_1 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_svop_0 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_0 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_18 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_17 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_16 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_15 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_14 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_13 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_12 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_11 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_10 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_9 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_29 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_28 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_27 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_26 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_25 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_24 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_23 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_22 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_21 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_20 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_31 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_19 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_30 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_13 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_12 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_11 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_10 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_SO -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_9 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_8 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_7 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_6 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_5 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_4 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_3 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_2 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_en_sync -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_ramaccess_rst_ -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_6 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_shiftDR -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_5 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_test_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_4 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_3 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_2 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_scan_ramtms -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_write_inh -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_ary_atpg_ctl -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_debug_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_we_w0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_iddq_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Di_w0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Di_w0_0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_6 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_5 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_4 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_3 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_2 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_jtag_readonly_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_SI -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_ary_read_inh -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_ce_r0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_scan_en -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_updateDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_SI -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_iddq_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_jtag_readonly_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_ary_atpg_ctl -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_ary_read_inh -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_ce_r0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_scan_en -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_scan_ramtms -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_shiftDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_we_w0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_test_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_en_sync -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_updateDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_debug_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_write_inh -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 -CHECKSUM: "2723458980" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.rflip -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.rf2 -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.rf1 -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.rf0 -CHECKSUM: "1091822202" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65 -CHECKSUM: "3712315672" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.ram_Inst_80X66 -CHECKSUM: "1845398596" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.ram_Inst_80X66.ITOP -CHECKSUM: "1254132607" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.ram_Inst_80X66.ITOP.iow0 -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.debug_mode_synchronizer -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.updateDR_synchronizer -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.debug_mode_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.updateDR_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2864954373" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.mbist_en_flop -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_re_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_we_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0 -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_re_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_we_reg_w0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[63].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[15].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[40].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[16].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[44].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[41].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[45].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[49].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[46].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[22].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[23].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[27].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[24].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[52].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[28].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[53].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[57].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[58].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[30].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[31].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[35].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[39].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[36].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[60].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[64].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[61].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[65].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[17].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[14].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[42].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[18].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[19].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[43].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[47].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[48].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[20].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[21].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[25].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[29].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[50].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[26].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[54].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[51].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[55].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[59].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[56].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[32].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[33].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[37].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[34].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[38].SSS.nr -CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[62].SSS.nr -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "2733340695" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_ram_access_lockup -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_la_bist_clkw0_gate -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_clk_gate_core -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_clk_jtag_Data_reg_r0 -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.CLK_GATE_clk -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_clk_jtag_Wa_reg_w0 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UI_enableDFTmode_async_ld_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_7 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_6 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_5 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_4 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_3 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_2 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_1 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_0 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_50 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_49 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_48 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_scan_en +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_ce_r0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_ary_read_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_SI +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_jtag_readonly_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Di_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Di_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_iddq_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_we_w0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_debug_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_ary_atpg_ctl +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_write_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_scan_ramtms +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_test_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_shiftDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_ramaccess_rst_ +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_en_sync CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_47 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_51 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_46 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_52 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_45 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_53 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_44 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_0 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_43 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_54 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_42 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_1 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_41 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_55 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_40 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_2 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_39 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_56 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_38 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_3 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_37 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_57 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_36 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_4 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_35 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_58 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_34 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_5 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_33 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_59 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_32 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_6 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_31 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_7 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_30 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_8 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_29 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_9 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_28 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_60 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_27 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_61 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_26 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_62 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_25 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_63 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_24 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_64 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_23 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_SO CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_22 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_10 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_21 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_11 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_20 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_12 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_19 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_13 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_18 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_14 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_17 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_15 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_16 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_16 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_15 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_17 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_14 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_18 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_13 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_19 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_12 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_20 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_11 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_21 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_10 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_22 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_23 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_24 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_25 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_26 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_27 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_30 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_19 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_31 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_20 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_21 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_22 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_23 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_24 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_25 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_26 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_27 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_28 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_29 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_9 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_10 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_11 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_12 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_13 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_SO +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_14 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_65 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_15 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_64 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_16 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_63 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_17 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_62 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_18 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_61 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_28 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_60 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_29 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_9 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_30 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_8 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_31 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_7 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_32 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_6 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_33 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_59 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_34 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_5 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_35 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_58 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_36 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_4 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_37 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_57 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_38 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_3 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_39 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_56 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_40 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_2 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_41 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_55 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_42 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_1 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_43 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_54 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_44 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_45 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_53 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_46 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_52 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_47 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_51 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_en_sync -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_ramaccess_rst_ -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_6 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_shiftDR -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_5 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_test_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_4 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_3 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_2 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_scan_ramtms -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_write_inh -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_ary_atpg_ctl -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_debug_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_we_w0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_iddq_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Di_w0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Di_w0_0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_6 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_5 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_4 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_3 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_2 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_jtag_readonly_mode -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_SI -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_ary_read_inh -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_ce_r0 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_scan_en -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_updateDR -CHECKSUM: "3746351510" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_gate -CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_gate.nvdla_core_clk_slcg_0 -CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_gate.nvdla_core_clk_slcg_0.p_clkgate -CHECKSUM: "2011252367 2958170254" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_ig -Block 21 "// Copyright(c) 2016 - 2017 NVIDIA Corporation. Licensed under the" -CHECKSUM: "2011252367 4009654741" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_ig -Branch 1 (2) "cfg_di_int8 0,0" -Branch 3 (3) "(!nvdla_core_rstn) 0,1,0,0" -Branch 4 (4) "(!nvdla_core_rstn) 0,0,1,0,0" -Branch 8 "(mrdma_rd_stall_cnt_inc && (!dp2reg_mrdma_stall_dec))" -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_SI -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_iddq_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_jtag_readonly_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_ary_atpg_ctl -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_ary_read_inh -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_ce_r0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_scan_en -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_7 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_scan_ramtms -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_shiftDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_we_w0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_test_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_en_sync -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_updateDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_debug_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_write_inh -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_7 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 -CHECKSUM: "1438464391" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram -CHECKSUM: "173341201" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16 -CHECKSUM: "1292234312" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16 -CHECKSUM: "2168844431" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16.ITOP -CHECKSUM: "313150271" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16.ITOP.iow0 -CHECKSUM: "313150271" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16.ITOP.iow1 -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.debug_mode_synchronizer -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.updateDR_synchronizer -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.debug_mode_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.updateDR_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2864954373" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.mbist_en_flop -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_48 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_49 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_50 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_1 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_2 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_3 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_4 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_5 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_6 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_7 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UI_enableDFTmode_async_ld_buf +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.rf0 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.rf1 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.rf2 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.rflip +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_clk_jtag_Wa_reg_w0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.CLK_GATE_clk +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_clk_jtag_Data_reg_r0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_clk_gate_core +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_la_bist_clkw0_gate +CHECKSUM: "2733340695" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_ram_access_lockup +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[62].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[38].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[34].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[37].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[33].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[32].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[7].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[56].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[59].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[55].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[51].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[54].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[26].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[50].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[29].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[25].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[7].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[21].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[20].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[48].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[47].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[43].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[15].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[19].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[18].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[42].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[14].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[17].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[14].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[61].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[64].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "2733340695" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_ram_access_lockup -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_la_bist_clkw0_gate -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_clk_gate_core -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_clk_jtag_Data_reg_r0 -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.CLK_GATE_clk -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_clk_jtag_Wa_reg_w0 -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.rflip -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.rf0 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UI_enableDFTmode_async_ld_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_7 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_6 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_5 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_4 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_3 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_2 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_1 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_0 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[60].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[36].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[39].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[35].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[31].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[30].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[58].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[57].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[53].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[28].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[52].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[24].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[27].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[23].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[22].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[46].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[49].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[45].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[41].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[44].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[16].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[40].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[15].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[63].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0 +CHECKSUM: "2864954373" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.mbist_en_flop +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.updateDR_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.debug_mode_synchronizer.NV_GENERIC_CELL +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.updateDR_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.debug_mode_synchronizer +CHECKSUM: "3380785552" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65.ITOP.iow1 +CHECKSUM: "3380785552" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65.ITOP.iow0 +CHECKSUM: "2325582529" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65.ITOP +CHECKSUM: "1321866749" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65 +CHECKSUM: "3952735129" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65 +CHECKSUM: "2121408052" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_write_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_debug_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_updateDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_en_sync +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_test_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_we_w0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_shiftDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_scan_ramtms +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_scan_en +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_ce_r0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_ary_read_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_ary_atpg_ctl +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_jtag_readonly_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_iddq_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_SI +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_gate.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_gate.nvdla_core_clk_slcg_0 +CHECKSUM: "1522172689" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_gate +CHECKSUM: "3424046172" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_0 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_1 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_2 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_3 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_4 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_5 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_6 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_7 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_8 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +CHECKSUM: "3424046172" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_0 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_1 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_2 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_3 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_4 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_5 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_6 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_7 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_8 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_9 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_10 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_11 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_12 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_13 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_14 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_15 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_16 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_17 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_18 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_updateDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_scan_en +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_ce_r0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_ary_read_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_SI +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_jtag_readonly_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Di_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Di_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_iddq_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_we_w0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_debug_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_ary_atpg_ctl +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_write_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_scan_ramtms +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_test_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_shiftDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_ramaccess_rst_ +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_en_sync CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_1 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_2 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_3 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_4 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_5 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_6 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_7 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_8 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_9 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_SO CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_15 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_10 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_14 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_12 CHECKSUM: "1389425841" INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_13 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_12 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_14 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_11 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_15 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_10 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_30 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_SO +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_19 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_9 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_31 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_8 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_20 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_7 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_21 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_6 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_22 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_5 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_23 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_4 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_24 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_3 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_25 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_2 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_26 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_1 -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_en_sync -CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_ramaccess_rst_ +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Do_r0_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_1 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_2 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_3 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_4 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_5 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_6 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_svop_7 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UI_enableDFTmode_async_ld_buf +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.rf0 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.rflip +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_clk_jtag_Wa_reg_w0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.CLK_GATE_clk +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_clk_jtag_Data_reg_r0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_clk_gate_core +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_la_bist_clkw0_gate +CHECKSUM: "2733340695" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_ram_access_lockup +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[14].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[15].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0 +CHECKSUM: "2864954373" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.mbist_en_flop +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.updateDR_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.debug_mode_synchronizer.NV_GENERIC_CELL +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.updateDR_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.debug_mode_synchronizer +CHECKSUM: "313150271" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16.ITOP.iow1 +CHECKSUM: "313150271" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16.ITOP.iow0 +CHECKSUM: "2168844431" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16.ITOP +CHECKSUM: "1292234312" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16 +CHECKSUM: "173341201" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.r_nv_ram_rwsp_160x16 +CHECKSUM: "1438464391" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_write_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_debug_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_updateDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_en_sync +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_test_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_we_w0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_shiftDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_scan_ramtms +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_scan_en +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_ce_r0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_ary_read_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_ary_atpg_ctl +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_jtag_readonly_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_iddq_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.UJ_DFTQUALIFIER_SI +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_gate.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_gate.nvdla_core_clk_slcg_0 +CHECKSUM: "3746351510" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_gate CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_7 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_updateDR CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_6 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_scan_en CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_shiftDR +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_ce_r0 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_5 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_ary_read_inh CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_test_mode +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_SI CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_4 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_0 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_3 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_jtag_readonly_mode CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_2 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_1 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_1 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_2 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Ra_r0_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_3 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_scan_ramtms +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_4 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_write_inh +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_5 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_ary_atpg_ctl +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Wa_w0_6 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_debug_mode +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Di_w0_0 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_we_w0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Di_w0_1 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_iddq_mode +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_iddq_mode CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Di_w0_1 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_we_w0 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Di_w0_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_debug_mode CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_7 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_ary_atpg_ctl CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_6 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_write_inh CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_5 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_scan_ramtms CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_4 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_0 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_3 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_1 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_2 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_2 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_1 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_3 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_jtag_readonly_mode +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_4 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_Wa_w0_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_test_mode CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_SI +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_5 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_ary_read_inh +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_shiftDR CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_mbist_ce_r0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Ra_r0_6 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_scan_en +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_ramaccess_rst_ CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_cq.ram.testInst_updateDR +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_en_sync +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_51 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_52 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_53 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_0 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_54 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_1 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_55 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_2 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_56 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_3 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_57 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_4 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_58 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_5 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_59 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_6 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_7 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_8 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_9 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_60 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_61 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_62 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_63 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_64 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_65 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_SO CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_30 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_8 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_19 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_7 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_31 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_6 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_20 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_5 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_21 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_4 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_22 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_3 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_23 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_2 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_24 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_1 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_25 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_26 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_27 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_28 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_29 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_9 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_10 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_11 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_12 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_13 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_14 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_15 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_16 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_19 -CHECKSUM: "3424046172" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu.u_roc.ram +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_17 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_BBOX2UNIT_UNUSED_pwrbus_18 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_10 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_11 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_12 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_13 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_14 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_15 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_16 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_17 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_18 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_19 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_8 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_20 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_7 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_21 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_6 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_22 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_5 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_23 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_4 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_24 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_3 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_25 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_2 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_26 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_1 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_27 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_28 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_29 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_30 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_31 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_32 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_33 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_34 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_35 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_36 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_37 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_38 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_39 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_19 -CHECKSUM: "3424046172" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul.u_roc.ram -CHECKSUM: "2984219062 1435982824" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu -Block 75 "wire [8*16 -1:0] out_data_1bpe_ext;" -Block 81 "assign rod3_wr_pvld = rod_wr_vld & rod_wr_mask[3] & ~(rod_wr_mask[0] & ~rod0_wr_prdy | rod_wr_mask[1] & ~rod1_wr_prdy | rod_wr_mask[2] & ~rod2_wr_prdy );" -CHECKSUM: "2984219062 929366083" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu -Branch 12 (4) "rod_sel default" -Branch 13 (4) "rod_sel default" -CHECKSUM: "2984219062 1435982824" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul -Block 75 "default : out_data_1bpe[8*8 -1:0] = {8*8{`x_or_0}};" -Block 81 "default : out_vld_1bpe = {1{`x_or_0}};" -CHECKSUM: "2984219062 929366083" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul -Branch 12 (4) "rod_sel default" -Branch 13 (4) "rod_sel default" -CHECKSUM: "1522172689" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_gate -CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_gate.nvdla_core_clk_slcg_0 -CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_gate.nvdla_core_clk_slcg_0.p_clkgate -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_SI -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_iddq_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_jtag_readonly_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_ary_atpg_ctl -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_ary_read_inh -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_ce_r0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_scan_en -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_7 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_scan_ramtms -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_shiftDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_we_w0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_test_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_en_sync -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_updateDR -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_debug_mode -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_write_inh -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_7 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 -CHECKSUM: "473878051" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 -CHECKSUM: "2121408052" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram -CHECKSUM: "3952735129" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65 -CHECKSUM: "1321866749" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65 -CHECKSUM: "2325582529" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65.ITOP -CHECKSUM: "3380785552" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65.ITOP.iow0 -CHECKSUM: "3380785552" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65.ITOP.iow1 -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.debug_mode_synchronizer -CHECKSUM: "510117664" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.updateDR_synchronizer -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.debug_mode_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2689773535" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.updateDR_synchronizer.NV_GENERIC_CELL -CHECKSUM: "2864954373" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.mbist_en_flop -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0 -CHECKSUM: "3492275041" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_40 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_41 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_42 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_43 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_44 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_45 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_46 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_47 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_48 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_49 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_mbist_Do_r0_50 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_1 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_2 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_3 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_4 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_5 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_6 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.testInst_svop_7 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UI_enableDFTmode_async_ld_buf +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_clk_jtag_Wa_reg_w0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.CLK_GATE_clk +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_clk_jtag_Data_reg_r0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_clk_gate_core +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.UJ_la_bist_clkw0_gate +CHECKSUM: "2733340695" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_ram_access_lockup +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[62].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[38].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[34].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[37].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[33].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[32].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[7].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[56].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[59].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[55].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[51].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[54].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[26].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[50].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[29].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[25].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[7].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[21].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[20].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[48].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[47].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[63].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[43].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[19].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[18].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[42].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[14].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[17].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[15].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[40].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[16].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[44].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[65].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[41].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[61].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[45].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[49].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[64].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[46].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[60].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[22].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[36].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[23].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[39].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[27].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[35].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[24].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[31].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[52].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[30].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[28].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[58].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[53].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[57].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[57].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[53].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[58].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[28].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[30].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[52].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[31].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[24].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[35].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[27].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[39].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[23].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[36].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[22].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[60].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[46].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[64].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[49].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[45].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[61].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[41].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[44].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[16].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[40].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[15].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[63].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Data_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Ra_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_we_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_Wa_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.testInst_re_reg_r0 +CHECKSUM: "2864954373" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.mbist_en_flop +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.updateDR_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.debug_mode_synchronizer.NV_GENERIC_CELL +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.updateDR_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.debug_mode_synchronizer +CHECKSUM: "1254132607" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.ram_Inst_80X66.ITOP.iow0 +CHECKSUM: "1845398596" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.ram_Inst_80X66.ITOP +CHECKSUM: "3712315672" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65.ram_Inst_80X66 +CHECKSUM: "1091822202" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.r_nv_ram_rwsp_80x65 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.rf0 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.rf1 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.rf2 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.rflip +CHECKSUM: "2723458980" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_write_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_debug_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_updateDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_en_sync +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_test_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_we_w0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_shiftDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_scan_ramtms +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_scan_en +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_ce_r0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_ary_read_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_ary_atpg_ctl +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_jtag_readonly_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_iddq_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_din.u_lat_fifo.ram.UJ_DFTQUALIFIER_SI +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_updateDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_scan_en +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_ce_r0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_ary_read_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_SI +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_jtag_readonly_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Wa_w0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Di_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Di_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_iddq_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_we_w0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_debug_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_ary_atpg_ctl +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_write_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_scan_ramtms +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_test_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_shiftDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Ra_r0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_ramaccess_rst_ +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_en_sync +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_1 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_2 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_3 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_4 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_5 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_6 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_7 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_8 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_SO +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +CHECKSUM: "1389425841" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_mbist_Do_r0_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_svop_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.testInst_svop_1 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UI_enableDFTmode_async_ld_buf +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.rf0 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.rflip +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_clk_jtag_Wa_reg_w0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.CLK_GATE_clk +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_clk_jtag_Data_reg_r0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_clk_gate_core +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.UJ_la_bist_clkw0_gate +CHECKSUM: "2733340695" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_ram_access_lockup +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[17].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[14].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[42].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[18].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[19].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[43].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[47].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[48].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[20].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[21].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[25].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[29].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[50].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[26].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[54].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[51].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[55].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_we_reg_w0.Jreg_ff[0].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[59].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[56].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[32].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[33].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[37].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[34].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[38].SSS.nr +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr CHECKSUM: "3212413072" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[62].SSS.nr -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "1083410475" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf -CHECKSUM: "2733340695" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_ram_access_lockup -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_la_bist_clkw0_gate -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_clk_gate_core -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_clk_jtag_Data_reg_r0 -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.CLK_GATE_clk -CHECKSUM: "3836134212" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_clk_jtag_Wa_reg_w0 -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.rflip -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.rf2 -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.rf1 -CHECKSUM: "1169538178" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.rf0 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.UI_enableDFTmode_async_ld_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_7 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_6 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_5 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_4 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_3 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_2 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_1 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_svop_0 -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf -CHECKSUM: "3286569540" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Data_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Ra_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_we_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_Wa_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.testInst_re_reg_r0 +CHECKSUM: "2864954373" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.mbist_en_flop +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.updateDR_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.debug_mode_synchronizer.NV_GENERIC_CELL +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.updateDR_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.debug_mode_synchronizer +CHECKSUM: "2922861167" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.ram_Inst_80X14.ITOP.io +CHECKSUM: "4184544770" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.ram_Inst_80X14.ITOP +CHECKSUM: "3422308825" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14.ram_Inst_80X14 +CHECKSUM: "4267984688" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.r_nv_ram_rwsp_80x14 +CHECKSUM: "2183897495" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_write_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_debug_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_updateDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_en_sync +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_test_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_we_w0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_shiftDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_scan_ramtms +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_scan_en +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_ce_r0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_ary_read_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_ary_atpg_ctl +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_jtag_readonly_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_iddq_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_cq.ram.UJ_DFTQUALIFIER_SI +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_updateDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_scan_en +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_ce_r0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_ary_read_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_SI +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_jtag_readonly_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Di_w0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Di_w0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_iddq_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_we_w0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_debug_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_ary_atpg_ctl +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_write_inh +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_scan_ramtms +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_0 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_1 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_2 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_3 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_4 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_test_mode +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_5 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_shiftDR +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_6 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_7 +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_ramaccess_rst_ +CHECKSUM: "3219671816" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_en_sync CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_50 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_51 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_49 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_52 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_48 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_53 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_47 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_0 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_46 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_54 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_45 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_1 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_44 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_55 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_43 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_2 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_42 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_56 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_41 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_3 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_40 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_57 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_39 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_4 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_38 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_58 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_37 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_5 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_36 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_59 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_35 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_6 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_34 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_7 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_33 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_8 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_32 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_9 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_31 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_60 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_30 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_61 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_29 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_62 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_28 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_63 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_64 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_SO CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_10 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_11 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_12 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_13 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_14 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_15 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_16 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_17 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_18 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_19 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_20 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_21 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_22 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_23 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_24 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_25 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_26 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_27 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_30 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_19 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_19 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_31 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_27 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_20 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_26 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_21 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_25 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_22 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_24 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_23 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_23 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_24 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_22 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_25 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_21 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_26 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_20 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_27 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_19 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_28 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_18 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_29 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_17 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_9 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_16 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_10 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_15 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_11 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_14 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_12 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_13 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_13 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_12 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_14 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_11 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_15 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_10 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_16 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_SO +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_17 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_64 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_BBOX2UNIT_UNUSED_pwrbus_18 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_63 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_28 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_62 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_29 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_61 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_30 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_60 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_31 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_9 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_32 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_8 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_33 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_7 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_34 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_6 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_35 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_59 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_36 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_5 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_37 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_58 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_38 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_4 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_39 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_57 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_40 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_3 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_41 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_56 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_42 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_2 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_43 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_55 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_44 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_1 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_45 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_54 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_46 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_47 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_53 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_48 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_52 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_49 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Do_r0_51 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_mbist_Do_r0_50 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_1 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_2 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_3 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_4 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_5 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_6 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.testInst_svop_7 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UI_enableDFTmode_async_ld_buf +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.rf0 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.rf1 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.rf2 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.rflip +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_clk_jtag_Wa_reg_w0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.CLK_GATE_clk +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_clk_jtag_Data_reg_r0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_clk_gate_core +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.UJ_la_bist_clkw0_gate +CHECKSUM: "2733340695" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_ram_access_lockup +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[62].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[38].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[34].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[37].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[33].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[32].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[56].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[59].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[55].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[51].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[54].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[26].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[50].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[29].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[25].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[21].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[20].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[48].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[47].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[43].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[19].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[18].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[42].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[14].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[17].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[61].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[64].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[60].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[36].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[39].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[35].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[31].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[30].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[58].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[57].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[53].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[28].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[52].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[24].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[27].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[23].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[22].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[46].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[49].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[45].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[41].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[44].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[16].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[40].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[15].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[63].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Data_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Ra_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_we_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_Wa_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.testInst_re_reg_r0 +CHECKSUM: "2864954373" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.mbist_en_flop +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.updateDR_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.debug_mode_synchronizer.NV_GENERIC_CELL +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.updateDR_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.debug_mode_synchronizer +CHECKSUM: "3380785552" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65.ITOP.iow1 +CHECKSUM: "3380785552" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65.ITOP.iow0 +CHECKSUM: "2325582529" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65.ITOP +CHECKSUM: "1321866749" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65.ram_Inst_160X65 +CHECKSUM: "3952735129" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.r_nv_ram_rwsp_160x65 +CHECKSUM: "2121408052" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_write_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_debug_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_updateDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_en_sync +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_test_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_we_w0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_shiftDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_scan_ramtms +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_scan_en +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_mbist_ce_r0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_ary_read_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_ary_atpg_ctl +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_jtag_readonly_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_iddq_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo.ram.UJ_DFTQUALIFIER_SI +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_gate.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_gate.nvdla_core_clk_slcg_0 +CHECKSUM: "808838489" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_gate CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_en_sync +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_updateDR CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_ramaccess_rst_ +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_scan_en CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_7 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_ce_r0 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_6 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_ary_read_inh CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_shiftDR +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_SI CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_5 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_0 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_test_mode +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_jtag_readonly_mode CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_4 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_1 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_3 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_2 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_2 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_3 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_1 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_4 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Ra_r0_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_5 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_scan_ramtms +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_6 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_write_inh +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Wa_w0_7 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_ary_atpg_ctl +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Di_w0_0 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_debug_mode +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Di_w0_1 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_we_w0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_iddq_mode CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_iddq_mode +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_we_w0 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Di_w0_1 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_debug_mode CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Di_w0_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_ary_atpg_ctl CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_7 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_write_inh CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_6 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_scan_ramtms CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_5 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_0 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_4 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_1 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_3 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_2 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_2 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_3 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_1 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_4 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_jtag_readonly_mode +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_test_mode CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_Wa_w0_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_5 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_SI +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_shiftDR CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_ary_read_inh +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_6 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_mbist_ce_r0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Ra_r0_7 CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_scan_en +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_ramaccess_rst_ CHECKSUM: "3219671816" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_lat_fifo.ram.testInst_updateDR -CHECKSUM: "3251589491 1699482894" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_ig -Block 24 "size_of_surf = reg2dp_channel[12:3 -1];" -CHECKSUM: "3251589491 958114489" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_ig -Branch 1 (2) "cfg_proc_int8 0,0" -Branch 3 (3) "(!nvdla_core_rstn) 0,1,0,0" -Branch 9 "(rdma_stall_cnt_inc && (!dp2reg_rdma_stall_dec))" -CHECKSUM: "4223787280 2834306366" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd -Block 17 "end else if (cfg_di_int16) begin" -Block 18 "size_of_surf = reg2dp_channel[12:3 -1];" -Block 19 "size_of_surf = reg2dp_channel[12:3 -1];" -Block 36 "end else if (is_last_batch & is_winog_end) begin" -Block 37 "count_w <= count_w + 1'b1;" -CHECKSUM: "4223787280 2165024343" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd -Branch 0 "(cfg_do_int8 | cfg_di_int8)" -Branch 1 (1) "cfg_di_int8 0,1" -Branch 1 (2) "cfg_di_int8 0,0" -Branch 2 (2) "(!nvdla_core_rstn) 0,1,0,1" -Branch 2 (3) "(!nvdla_core_rstn) 0,1,0,0" -Branch 3 (3) "(!nvdla_core_rstn) 0,1,1,0,0" -Branch 3 (4) "(!nvdla_core_rstn) 0,1,0,-,-" -Branch 4 (4) "(!nvdla_core_rstn) 0,1,0,-,-" -Branch 5 (4) "(!nvdla_core_rstn) 0,1,0,1,0,0" -Branch 6 (4) "(!nvdla_core_rstn) 0,1,0,1,0,0" -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_30 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_18 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_17 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_16 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_15 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_14 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_13 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_12 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_11 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_10 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_9 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_8 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_7 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_6 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_5 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_4 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_3 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_2 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_1 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_0 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_29 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_28 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_27 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_26 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_25 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_24 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_23 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_22 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_21 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_20 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_31 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_19 -CHECKSUM: "3286904238" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_dfifo.ram -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_30 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_18 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_17 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_16 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_15 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_14 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_13 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_12 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_11 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_10 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_9 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_8 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_7 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_6 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_5 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_4 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_3 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_2 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_1 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_0 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_29 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_28 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_27 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_en_sync CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_1 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_2 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_3 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_4 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_5 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_6 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_7 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_19 -CHECKSUM: "1482222343" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd.u_sfifo.ram -CHECKSUM: "1273658572" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_8 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_30 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_9 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_18 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_SO CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_17 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_10 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_16 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_11 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_15 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_12 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_14 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_13 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_13 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_14 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_12 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_15 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_11 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_30 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_10 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_19 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_9 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_31 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_8 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_20 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_7 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_21 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_6 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_22 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_5 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_23 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_4 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_24 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_3 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_25 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_2 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_26 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_1 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_27 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_0 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_28 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_29 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_29 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_28 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_9 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_27 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_10 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_26 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_11 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_25 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_12 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_24 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_13 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_23 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_14 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_22 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_15 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_21 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_16 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_20 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_17 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_31 +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_BBOX2UNIT_UNUSED_pwrbus_18 CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.UJ_BBOX2UNIT_UNUSED_pwrbus_19 -CHECKSUM: "858109174" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_gate -CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_gate.nvdla_core_clk_slcg_0 -CHECKSUM: "2332134184" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.nvdla_core_clk_mgate +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_mbist_Do_r0_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.UJ_testInst_ess_scanin_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.UJ_testInst_ess_scanen_buf +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_0 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_1 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_2 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_3 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_4 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_5 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_6 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.testInst_svop_7 +CHECKSUM: "3286569540" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UI_enableDFTmode_async_ld_buf +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.rf0 +CHECKSUM: "1169538178" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.rflip +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_clk_jtag_Wa_reg_w0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.CLK_GATE_clk +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_clk_jtag_Data_reg_r0 +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_clk_gate_core +CHECKSUM: "3836134212" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.UJ_la_bist_clkw0_gate +CHECKSUM: "2733340695" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_ram_access_lockup +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.UJ_testInst_ess_scanout_buf +CHECKSUM: "1083410475" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.UJ_testInst_ess_scanout_buf +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[12].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[10].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[9].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[14].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[8].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[15].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[13].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0.Jreg_ff[11].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[3].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[1].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[7].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[5].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[6].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[4].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[2].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0.Jreg_ff[0].SSS.nr +CHECKSUM: "3212413072" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0.Jreg_ff[0].SSS.nr +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Data_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Ra_reg_r0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_we_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_Wa_reg_w0 +CHECKSUM: "3492275041" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.testInst_re_reg_r0 +CHECKSUM: "2864954373" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.mbist_en_flop +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.updateDR_synchronizer.NV_GENERIC_CELL +CHECKSUM: "2689773535" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.debug_mode_synchronizer.NV_GENERIC_CELL +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.updateDR_synchronizer +CHECKSUM: "510117664" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.debug_mode_synchronizer +CHECKSUM: "313150271" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16.ITOP.iow1 +CHECKSUM: "313150271" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16.ITOP.iow0 +CHECKSUM: "2168844431" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16.ITOP +CHECKSUM: "1292234312" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16.ram_Inst_160X16 +CHECKSUM: "173341201" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.r_nv_ram_rwsp_160x16 +CHECKSUM: "1438464391" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Wa_w0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_write_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_debug_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Di_w0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_updateDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_en_sync +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_test_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_we_w0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_shiftDR +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_scan_ramtms +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_ramaccess_rst_ +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_1 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_2 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_3 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_4 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_5 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_6 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_Ra_r0_7 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_scan_en +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_mbist_ce_r0 +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_ary_read_inh +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_ary_atpg_ctl +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_jtag_readonly_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_iddq_mode +CHECKSUM: "473878051" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq.ram.UJ_DFTQUALIFIER_SI CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_gate.nvdla_core_clk_slcg_0.p_clkgate +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate.nvdla_core_clk_slcg_1.p_clkgate CHECKSUM: "3496322456" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr.u_NV_NVDLA_SDP_WDMA_DAT_DMAIF_intr_fifo.nvdla_core_clk_mgate.p_clkgate -CHECKSUM: "423198530 3435190196" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_NV_NVDLA_SDP_cmux -Toggle reg2dp_proc_precision "net reg2dp_proc_precision[1:0]" -CHECKSUM: "941548853 985505507" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_c -Branch 0 "(cfg_out_precision[1:0] == 2'b0)" -CHECKSUM: "450317009 2821484987" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_c.c_int_0 -Branch 0 "cfg_mode_eql" -Branch 1 "cfg_mode_eql" -Branch 2 "cfg_mode_eql" -Branch 3 "cfg_mode_eql" -Branch 4 "cfg_mode_eql" -Branch 5 "cfg_mode_eql" -Branch 6 "cfg_mode_eql" -Branch 7 "cfg_mode_eql" -Branch 8 "cfg_mode_eql" -CHECKSUM: "99063186 3348982871" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq -Toggle pwrbus_ram_pd "net pwrbus_ram_pd[31:0]" -CHECKSUM: "3081627267 623583004" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate.nvdla_core_clk_slcg_2.p_clkgate +CHECKSUM: "3496322456" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate.nvdla_core_clk_slcg_0.p_clkgate +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate.nvdla_core_clk_slcg_1 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate.nvdla_core_clk_slcg_2 +CHECKSUM: "2332134184" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate.nvdla_core_clk_slcg_0 +CHECKSUM: "4215855505" +INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_gate +CHECKSUM: "4223787280 2834306366" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd +Block 17 "1401314490" "if (cfg_di_int16)" +Block 18 "3866789856" "size_of_surf = reg2dp_channel[12:(3 - 1)];" +Block 19 "833650338" "size_of_surf = reg2dp_channel[12:(3 - 1)];" +Block 36 "470302611" "if ((is_last_batch & is_winog_end))" +Block 37 "806102914" "count_w <= (count_w + 1'b1);" +CHECKSUM: "4223787280 2165024343" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_cmd +Branch 0 "3866021165" "(cfg_do_int8 | cfg_di_int8)" +Branch 1 "1016651711" "cfg_di_int8" (1) "cfg_di_int8 0,1" +Branch 1 "1016651711" "cfg_di_int8" (2) "cfg_di_int8 0,0" +Branch 2 "844696913" "(!nvdla_core_rstn)" (2) "(!nvdla_core_rstn) 0,1,0,1" +Branch 2 "844696913" "(!nvdla_core_rstn)" (3) "(!nvdla_core_rstn) 0,1,0,0" +Branch 3 "4220731993" "(!nvdla_core_rstn)" (3) "(!nvdla_core_rstn) 0,1,1,0,0" +Branch 3 "4220731993" "(!nvdla_core_rstn)" (4) "(!nvdla_core_rstn) 0,1,0,-,-" +Branch 4 "457859074" "(!nvdla_core_rstn)" (4) "(!nvdla_core_rstn) 0,1,0,-,-" +Branch 5 "3573659156" "(!nvdla_core_rstn)" (4) "(!nvdla_core_rstn) 0,1,0,1,0,0" +Branch 6 "3573659156" "(!nvdla_core_rstn)" (4) "(!nvdla_core_rstn) 0,1,0,1,0,0" +CHECKSUM: "3251589491 1699482894" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_ig +Block 24 "81226100" "size_of_surf = reg2dp_channel[12:(3 - 1)];" +CHECKSUM: "3251589491 958114489" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_ig +Branch 1 "3233579045" "cfg_proc_int8" (2) "cfg_proc_int8 0,0" +Branch 3 "393803155" "(!nvdla_core_rstn)" (3) "(!nvdla_core_rstn) 0,1,0,0" +Branch 9 "3911316970" "(rdma_stall_cnt_inc && (!dp2reg_rdma_stall_dec))" +CHECKSUM: "2984219062 1435982824" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul +Block 75 "918453727" "out_data_1bpe[((8 * 8) - 1):0] = {(8 * 8) {1'bx}};" +Block 81 "2806154462" "out_vld_1bpe = {1 {1'bx}};" +CHECKSUM: "2984219062 929366083" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_mul +Branch 12 "2993320099" "rod_sel" (4) "rod_sel default" +Branch 13 "3352962708" "rod_sel" (4) "rod_sel default" +CHECKSUM: "2984219062 1435982824" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu +Block 75 "918453727" "out_data_1bpe[((8 * 8) - 1):0] = {(8 * 8) {1'bx}};" +Block 81 "2806154462" "out_vld_1bpe = {1 {1'bx}};" +CHECKSUM: "2984219062 929366083" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_nrdma.u_eg.u_alu +Branch 12 "2993320099" "rod_sel" (4) "rod_sel default" +Branch 13 "3352962708" "rod_sel" (4) "rod_sel default" +CHECKSUM: "2011252367 2958170254" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_ig +Block 21 "134991957" "size_of_surf = reg2dp_channel[12:(3 - 1)];" +CHECKSUM: "2011252367 4009654741" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_ig +Branch 1 "3567604925" "cfg_di_int8" (2) "cfg_di_int8 0,0" +Branch 3 "393803155" "(!nvdla_core_rstn)" (3) "(!nvdla_core_rstn) 0,1,0,0" +Branch 4 "1789469673" "(!nvdla_core_rstn)" (4) "(!nvdla_core_rstn) 0,0,1,0,0" +Branch 8 "1359853318" "(mrdma_rd_stall_cnt_inc && (!dp2reg_mrdma_stall_dec))" +CHECKSUM: "3251589491 1699482894" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_ig +Block 24 "81226100" "size_of_surf = reg2dp_channel[12:(3 - 1)];" +CHECKSUM: "3251589491 958114489" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_ig +Branch 1 "3233579045" "cfg_proc_int8" (2) "cfg_proc_int8 0,0" +CHECKSUM: "2984219062 1435982824" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_mul +Block 75 "918453727" "out_data_1bpe[((8 * 8) - 1):0] = {(8 * 8) {1'bx}};" +Block 81 "2806154462" "out_vld_1bpe = {1 {1'bx}};" +CHECKSUM: "2984219062 3687346137" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_mul Toggle pwrbus_ram_pd "net pwrbus_ram_pd[31:0]" -CHECKSUM: "3424046172" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_30 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_18 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_17 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_16 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_15 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_14 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_13 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_12 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_11 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_10 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_9 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_8 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_7 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_6 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_5 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_4 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_3 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_2 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_1 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_0 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_29 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_28 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_27 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_26 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_25 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_24 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_23 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_22 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_21 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_20 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_31 -CHECKSUM: "1389425841" -INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc.ram.UJ_BBOX2UNIT_UNUSED_pwrbus_19 -CHECKSUM: "3363740746 2148694528" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo +Toggle cfg_dp_8 "net cfg_dp_8" +CHECKSUM: "2984219062 929366083" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_mul +Branch 12 "2993320099" "rod_sel" (4) "rod_sel default" +Branch 13 "3352962708" "rod_sel" (4) "rod_sel default" +CHECKSUM: "2984219062 1435982824" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu +Block 75 "918453727" "out_data_1bpe[((8 * 8) - 1):0] = {(8 * 8) {1'bx}};" +Block 81 "2806154462" "out_vld_1bpe = {1 {1'bx}};" +CHECKSUM: "2984219062 3687346137" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu Toggle pwrbus_ram_pd "net pwrbus_ram_pd[31:0]" +CHECKSUM: "2984219062 929366083" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu +Branch 12 "2993320099" "rod_sel" (4) "rod_sel default" +Branch 13 "3352962708" "rod_sel" (4) "rod_sel default" +CHECKSUM: "2943359973 1048761457" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_dpin_pack +Block 55 "1743124396" "mux_data = {OW {1'b0}};" +CHECKSUM: "2943359973 2202511212" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_dpin_pack +Toggle cfg_dp_8 "net cfg_dp_8" +CHECKSUM: "2943359973 2182456865" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_dpin_pack +Branch 0 "183978582" "(!cfg_dp_8)" +Branch 5 "2920660698" "pack_cnt" (8) "pack_cnt default" +CHECKSUM: "2943359973 1048761457" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_mul_pack +Block 55 "1743124396" "mux_data = {OW {1'b0}};" +CHECKSUM: "2943359973 1746514056" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_mul_pack +Toggle cfg_dp_8 "net cfg_dp_8" +CHECKSUM: "2943359973 2182456865" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_mul_pack +Branch 0 "183978582" "(!cfg_dp_8)" +Branch 5 "2920660698" "pack_cnt" (8) "pack_cnt default" +CHECKSUM: "2260079850 1992617883" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_dpunpack +Block 15 "1528896391" "pack_cnt <= (pack_cnt + 1);" +CHECKSUM: "2260079850 3715431549" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_dpunpack +Branch 1 "1265022531" "(!nvdla_core_rstn)" (2) "(!nvdla_core_rstn) 0,1,0" +CHECKSUM: "1552407095 7788695" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_dppack +Block 21 "3275070163" "pack_cnt <= (pack_cnt + 1);" +CHECKSUM: "1552407095 91520953" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_dppack +Branch 2 "3547477783" "(!nvdla_core_rstn)" (2) "(!nvdla_core_rstn) 0,1,0" +CHECKSUM: "2943359973 1048761457" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_alu_pack +Block 55 "1743124396" "mux_data = {OW {1'b0}};" +CHECKSUM: "2943359973 1746514056" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_alu_pack +Toggle cfg_dp_8 "net cfg_dp_8" +CHECKSUM: "2943359973 2182456865" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bs_alu_pack +Branch 0 "183978582" "(!cfg_dp_8)" +Branch 5 "2920660698" "pack_cnt" (8) "pack_cnt default" +CHECKSUM: "2943359973 1048761457" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_mul_pack +Block 55 "1743124396" "mux_data = {OW {1'b0}};" +CHECKSUM: "2943359973 2182456865" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_mul_pack +Branch 0 "183978582" "(!cfg_dp_8)" +Branch 5 "2920660698" "pack_cnt" (8) "pack_cnt default" +CHECKSUM: "2260079850 1992617883" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_dpunpack +Block 15 "1528896391" "pack_cnt <= (pack_cnt + 1);" +CHECKSUM: "2260079850 3715431549" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_dpunpack +Branch 1 "1265022531" "(!nvdla_core_rstn)" (2) "(!nvdla_core_rstn) 0,1,0" +CHECKSUM: "1552407095 7788695" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_dppack +Block 21 "3275070163" "pack_cnt <= (pack_cnt + 1);" +CHECKSUM: "1552407095 91520953" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_dppack +Branch 2 "3547477783" "(!nvdla_core_rstn)" (2) "(!nvdla_core_rstn) 0,1,0" +CHECKSUM: "2943359973 1048761457" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_alu_pack +Block 55 "1743124396" "mux_data = {OW {1'b0}};" +CHECKSUM: "2943359973 1746514056" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_alu_pack +Toggle cfg_dp_8 "net cfg_dp_8" +CHECKSUM: "2943359973 2182456865" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_bn_alu_pack +Branch 0 "183978582" "(!cfg_dp_8)" +Branch 5 "2920660698" "pack_cnt" (8) "pack_cnt default" CHECKSUM: "722655589 1010629415" INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_dout Toggle reg2dp_in_precision "net reg2dp_in_precision[1:0]" @@ -3465,20 +3439,50 @@ Toggle dp2reg_status_inf_input_num "net dp2reg_status_inf_input_num[31:0]" Toggle dp2reg_status_nan_input_num "net dp2reg_status_nan_input_num[31:0]" CHECKSUM: "722655589 3947494350" INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_mrdma.u_eg.u_dout -Branch 1 (2) "1'b1 pfifo1_sel ,-,1,-,-" -Branch 1 (3) "1'b1 pfifo1_sel ,-,0,-,-" -Branch 1 (4) "1'b1 pfifo2_sel ,-,-,1,-" -Branch 1 (5) "1'b1 pfifo2_sel ,-,-,0,-" -Branch 1 (6) "1'b1 pfifo3_sel ,-,-,-,1" -Branch 1 (7) "1'b1 pfifo3_sel ,-,-,-,0" -CHECKSUM: "631608829 1114217910" -INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_dat.u_out -Branch 1 "(dfifo_rd_size == 3'h4)" -Branch 2 "(dfifo_rd_size == 3'h4)" -Branch 3 "(dfifo_rd_size == 3'h4)" -Branch 4 "(dfifo_rd_size == 3'h4)" -Branch 7 "(size_of_atom == 3'h4)" -Branch 8 "(dfifo_rd_size == 3'h4)" +Branch 1 "2190519380" "1'b1" (2) "1'b1 pfifo1_sel ,-,1,-,-" +Branch 1 "2190519380" "1'b1" (3) "1'b1 pfifo1_sel ,-,0,-,-" +Branch 1 "2190519380" "1'b1" (4) "1'b1 pfifo2_sel ,-,-,1,-" +Branch 1 "2190519380" "1'b1" (5) "1'b1 pfifo2_sel ,-,-,0,-" +Branch 1 "2190519380" "1'b1" (6) "1'b1 pfifo3_sel ,-,-,-,1" +Branch 1 "2190519380" "1'b1" (7) "1'b1 pfifo3_sel ,-,-,-,0" +CHECKSUM: "3363740746 2148694528" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_lat_fifo +Toggle pwrbus_ram_pd "net pwrbus_ram_pd[31:0]" +CHECKSUM: "3081627267 623583004" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_eg.u_alu.u_roc +Toggle pwrbus_ram_pd "net pwrbus_ram_pd[31:0]" +CHECKSUM: "99063186 3348982871" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_rdma.u_brdma.u_cq +Toggle pwrbus_ram_pd "net pwrbus_ram_pd[31:0]" +CHECKSUM: "423198530 3435190196" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_NV_NVDLA_SDP_cmux +Toggle reg2dp_proc_precision "net reg2dp_proc_precision[1:0]" CHECKSUM: "974965932 957423549" INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_intr -Branch 2 "(wdma_stall_cnt_inc && (!dp2reg_wdma_stall_dec))" +Branch 2 "2594496328" "(wdma_stall_cnt_inc && (!dp2reg_wdma_stall_dec))" +CHECKSUM: "631608829 1114217910" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_dat.u_out +Branch 1 "2995789368" "(dfifo_rd_size == 3'h4)" +Branch 2 "2995789368" "(dfifo_rd_size == 3'h4)" +Branch 3 "2995789368" "(dfifo_rd_size == 3'h4)" +Branch 4 "2995789368" "(dfifo_rd_size == 3'h4)" +Branch 7 "1744136037" "(size_of_atom == 3'h4)" +Branch 8 "2388492854" "(dfifo_rd_size == 3'h4)" +CHECKSUM: "450317009 2821484987" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_c.c_int_0 +Branch 0 "2035008659" "cfg_mode_eql" +Branch 1 "2035008659" "cfg_mode_eql" +Branch 2 "2035008659" "cfg_mode_eql" +Branch 3 "2035008659" "cfg_mode_eql" +Branch 4 "2035008659" "cfg_mode_eql" +Branch 5 "2035008659" "cfg_mode_eql" +Branch 6 "2035008659" "cfg_mode_eql" +Branch 7 "101494377" "cfg_mode_eql" +Branch 8 "2035008659" "cfg_mode_eql" +CHECKSUM: "941548853 985505507" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_core.u_c +Branch 0 "4057039126" "(cfg_out_precision[1:0] == 2'b0)" +CHECKSUM: "3100209623 946203811" +INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_p.u_NV_NVDLA_sdp.u_wdma.u_dmaif_wr +Block 67 "2401791761" "mc_pending <= 1'b1;" +Block 71 "4283272573" "mc_pending <= 1'b0;" From 51a33dfc2a8ed0f067a6ba7daac0a9dc6cd597b7 Mon Sep 17 00:00:00 2001 From: Ellen Zhang Date: Mon, 28 May 2018 02:02:19 -0700 Subject: [PATCH 13/28] add nv_ram_rwsp_8x65 ram model and build flow --- tools/etc/build.config | 1 + vmod/rams/fpga/dla_ramgen | 8 +-- vmod/rams/fpga/run_large_ram | 28 ----------- vmod/rams/fpga/run_small_256_ram | 48 ------------------ vmod/rams/fpga/run_small_ram | 1 + vmod/rams/fpga/small_rams/Makefile | 3 ++ vmod/rams/fpga/small_rams/nv_ram_rwsp_8x65.v | 53 ++++++++++++++++++++ 7 files changed, 63 insertions(+), 79 deletions(-) delete mode 100755 vmod/rams/fpga/run_large_ram delete mode 100755 vmod/rams/fpga/run_small_256_ram create mode 100644 vmod/rams/fpga/small_rams/Makefile create mode 100644 vmod/rams/fpga/small_rams/nv_ram_rwsp_8x65.v diff --git a/tools/etc/build.config b/tools/etc/build.config index 404429f0..0b1461f6 100644 --- a/tools/etc/build.config +++ b/tools/etc/build.config @@ -33,6 +33,7 @@ vmod_rams: sandbox: - vmod/rams/model - vmod/rams/synth + - vmod/rams/fpga/small_rams dependencies: - defs diff --git a/vmod/rams/fpga/dla_ramgen b/vmod/rams/fpga/dla_ramgen index 48f2b9d5..b5a996a9 100755 --- a/vmod/rams/fpga/dla_ramgen +++ b/vmod/rams/fpga/dla_ramgen @@ -10,6 +10,7 @@ Getopt::Long::config('no_auto_abbrev', 'no_ignore_case', 'no_ignore_case_always'); +my $outdir = "small_rams" ; my $width = "" ; my $depth = "" ; my $module = "" ; @@ -24,6 +25,7 @@ my $we_name = "" ; my $di_name = "" ; my %opt_ctl = ( + "o|outdir=s" => \$outdir, "w|width=s" => \$width, "d|depth=s" => \$depth, "m|module=s" => \$module, @@ -61,7 +63,7 @@ if ($module ne "") { } } elsif(($depth ne "") && ($width ne "")) { - $module = join "", "nv_ram_",$ram_name,"_",$depth,"x",$width,"_dlarr"; + $module = join "", "nv_ram_",$ram_name,"_",$depth,"x",$width; print "$module\n"; } else { @@ -70,7 +72,7 @@ else { } -open(OUT_FILE, ">$module.v") || die "Cannot open target file $module.v!"; +open(OUT_FILE, ">$outdir/$module.v") || die "Cannot open target file $module.v!"; my @ports = (); my $addrw_raw = log($depth)/log(2); @@ -198,7 +200,7 @@ if(!defined($module)&& (!defined($width) || !defined($depth))) { sub print_usage { print STDERR " Usage1: $0 -m ; -Example: dla_ramgen -m nv_ram_rws_32x16_dlarr +Example: dla_ramgen -m nv_ram_rws_32x16 Usage2: $0 -w -d -t ; Example: dla_ramgen -d 32 -w 16 dla_ramgen -d 32 -w 16 -t 0 diff --git a/vmod/rams/fpga/run_large_ram b/vmod/rams/fpga/run_large_ram deleted file mode 100755 index 64908220..00000000 --- a/vmod/rams/fpga/run_large_ram +++ /dev/null @@ -1,28 +0,0 @@ -dla_ramgen -m nv_ram_rws_16x256_dlarr -dla_ramgen -m nv_ram_rws_256x3_dlarr -dla_ramgen -m nv_ram_rws_256x512_dlarr -dla_ramgen -m nv_ram_rws_256x7_dlarr -dla_ramgen -m nv_ram_rws_32x16_dlarr -dla_ramgen -m nv_ram_rws_32x512_dlarr -dla_ramgen -m nv_ram_rws_32x544_dlarr -dla_ramgen -m nv_ram_rws_32x768_dlarr -dla_ramgen -m nv_ram_rws_64x10_dlarr -dla_ramgen -m nv_ram_rws_64x116_dlarr -dla_ramgen -m nv_ram_rwsp_128x11_dlarr -dla_ramgen -m nv_ram_rwsp_128x6_dlarr -dla_ramgen -m nv_ram_rwsp_160x16_dlarr -dla_ramgen -m nv_ram_rwsp_160x514_dlarr -dla_ramgen -m nv_ram_rwsp_20x241_dlarr -dla_ramgen -m nv_ram_rwsp_245x514_dlarr -dla_ramgen -m nv_ram_rwsp_256x11_dlarr -dla_ramgen -m nv_ram_rwsp_32x32_dlarr -dla_ramgen -m nv_ram_rwsp_61x514_dlarr -dla_ramgen -m nv_ram_rwsp_80x14_dlarr -dla_ramgen -m nv_ram_rwsp_80x16_dlarr -dla_ramgen -m nv_ram_rwsp_80x256_dlarr -dla_ramgen -m nv_ram_rwsp_80x514_dlarr -dla_ramgen -m nv_ram_rwst_256x8 -dla_ramgen -m nv_ram_rwsthp_19x80_dlarr -dla_ramgen -m nv_ram_rwsthp_60x168_dlarr -dla_ramgen -m nv_ram_rwsthp_80x15_dlarr -dla_ramgen -m nv_ram_rwsthp_80x72_dlarr diff --git a/vmod/rams/fpga/run_small_256_ram b/vmod/rams/fpga/run_small_256_ram deleted file mode 100755 index 30ad2f94..00000000 --- a/vmod/rams/fpga/run_small_256_ram +++ /dev/null @@ -1,48 +0,0 @@ -dla_ramgen -m nv_ram_rws_128x18 -dla_ramgen -m nv_ram_rws_128x256 -dla_ramgen -m nv_ram_rws_128x64 -dla_ramgen -m nv_ram_rws_16x256 -dla_ramgen -m nv_ram_rws_16x272 -dla_ramgen -m nv_ram_rws_16x64 -dla_ramgen -m nv_ram_rws_256x3 -dla_ramgen -m nv_ram_rws_256x512 -dla_ramgen -m nv_ram_rws_256x64 -dla_ramgen -m nv_ram_rws_256x7 -dla_ramgen -m nv_ram_rws_32x16 -dla_ramgen -m nv_ram_rws_32x512 -dla_ramgen -m nv_ram_rws_32x544 -dla_ramgen -m nv_ram_rws_32x768 -dla_ramgen -m nv_ram_rws_512x256 -dla_ramgen -m nv_ram_rws_512x512 -dla_ramgen -m nv_ram_rws_512x64 -dla_ramgen -m nv_ram_rws_64x10 -dla_ramgen -m nv_ram_rws_64x1024 -dla_ramgen -m nv_ram_rws_64x1088 -dla_ramgen -m nv_ram_rws_64x116 -dla_ramgen -m nv_ram_rws_64x18 -dla_ramgen -m nv_ram_rwsp_128x11 -dla_ramgen -m nv_ram_rwsp_128x6 -dla_ramgen -m nv_ram_rwsp_160x16 -dla_ramgen -m nv_ram_rwsp_160x514 -dla_ramgen -m nv_ram_rwsp_160x65 -dla_ramgen -m nv_ram_rwsp_20x289 -dla_ramgen -m nv_ram_rwsp_245x514 -dla_ramgen -m nv_ram_rwsp_256x11 -dla_ramgen -m nv_ram_rwsp_32x32 -dla_ramgen -m nv_ram_rwsp_61x514 -dla_ramgen -m nv_ram_rwsp_61x64 -dla_ramgen -m nv_ram_rwsp_61x65 -dla_ramgen -m nv_ram_rwsp_80x14 -dla_ramgen -m nv_ram_rwsp_80x16 -dla_ramgen -m nv_ram_rwsp_80x256 -dla_ramgen -m nv_ram_rwsp_80x514 -dla_ramgen -m nv_ram_rwsp_80x65 -dla_ramgen -m nv_ram_rwst_256x8 -dla_ramgen -m nv_ram_rwsthp_19x32 -dla_ramgen -m nv_ram_rwsthp_19x4 -dla_ramgen -m nv_ram_rwsthp_19x80 -dla_ramgen -m nv_ram_rwsthp_60x168 -dla_ramgen -m nv_ram_rwsthp_60x21 -dla_ramgen -m nv_ram_rwsthp_80x15 -dla_ramgen -m nv_ram_rwsthp_80x72 -dla_ramgen -m nv_ram_rwsthp_80x9 diff --git a/vmod/rams/fpga/run_small_ram b/vmod/rams/fpga/run_small_ram index ce379494..a67cfee6 100755 --- a/vmod/rams/fpga/run_small_ram +++ b/vmod/rams/fpga/run_small_ram @@ -16,6 +16,7 @@ dla_ramgen -m nv_ram_rws_64x1088 dla_ramgen -m nv_ram_rws_64x116 dla_ramgen -m nv_ram_rws_64x18 + dla_ramgen -m nv_ram_rwsp_8x65 dla_ramgen -m nv_ram_rwsp_128x11 dla_ramgen -m nv_ram_rwsp_128x6 dla_ramgen -m nv_ram_rwsp_160x16 diff --git a/vmod/rams/fpga/small_rams/Makefile b/vmod/rams/fpga/small_rams/Makefile new file mode 100644 index 00000000..ac9ac3f6 --- /dev/null +++ b/vmod/rams/fpga/small_rams/Makefile @@ -0,0 +1,3 @@ +DEPTH := ../../../.. +include $(DEPTH)/tools/make/vmod_common.make + diff --git a/vmod/rams/fpga/small_rams/nv_ram_rwsp_8x65.v b/vmod/rams/fpga/small_rams/nv_ram_rwsp_8x65.v new file mode 100644 index 00000000..0cd973f2 --- /dev/null +++ b/vmod/rams/fpga/small_rams/nv_ram_rwsp_8x65.v @@ -0,0 +1,53 @@ + +module nv_ram_rwsp_8x65 ( + clk, + ra, + re, + ore, + dout, + wa, + we, + di, + pwrbus_ram_pd +); + +parameter FORCE_CONTENTION_ASSERTION_RESET_ACTIVE=1'b0; + +// port list +input clk; +input [2:0] ra; +input re; +input ore; +output [64:0] dout; +input [2:0] wa; +input we; +input [64:0] di; +input [31:0] pwrbus_ram_pd; + +//reg and wire list +reg [2:0] ra_d; +wire [64:0] dout; +reg [64:0] M [7:0]; + +always @( posedge clk ) begin + if (we) + M[wa] <= di; +end + +always @( posedge clk ) begin + if (re) + ra_d <= ra; +end + +wire [64:0] dout_ram = M[ra_d]; + +reg [64:0] dout_r; +always @( posedge clk ) begin + if (ore) + dout_r <= dout_ram; +end + +assign dout = dout_r; + + +endmodule From 9a26f685cdd85736e11682f632a8a3231ed28c01 Mon Sep 17 00:00:00 2001 From: rayz Date: Mon, 28 May 2018 06:30:35 -0700 Subject: [PATCH 14/28] update metrics system: refresh graph with lastet database; auto load all projects --- verif/tools/run_new_metrics.py | 767 ++++++++++++++++++++------------- 1 file changed, 468 insertions(+), 299 deletions(-) diff --git a/verif/tools/run_new_metrics.py b/verif/tools/run_new_metrics.py index e000d205..c24a8483 100755 --- a/verif/tools/run_new_metrics.py +++ b/verif/tools/run_new_metrics.py @@ -27,66 +27,112 @@ class RunMetrics(object): + ''' + Generate metrics divs using dash and kick-off the app + + Attributes: + FUNC: + run: create/run metrics app + ''' + + def __init__(self, config): + self._cfg = dict(config) + + def run(self): + div_plot = DivPlot(self._cfg) + div_plot.dash_gen() + div_plot.run() + +class DataLoad(object): + + ''' + Load data for graph plotting usage: + 1) load regression status database + 2) load test status database + 3) load syndrome database + of all projects / regressions + + Attributes: + FUNC: + load: load regression data base to x_axis/y_axis + load syndrome data base for triage usage + VAR: + x_axis: x axis database, only including date time + y_axis: y axis database, including passing rate/test num/coverage + regr_sts_db: regression status data base + test_db_files: test status data base files + synd_db: error syndrome data base + projs: all avaliable project list + db_dir: metrics database root directory path + synd_dir: syndrome database directory path + proj_regr_dict: dict with 'KEY': projects, 'value':regresions + ''' + def __init__(self, config): - self._cfg = dict(config) - self._regr_sts_db = {} - self._syndrome_db = {} - self._x_axis = {} - self._y_axis = {} - self._test_db_files = {} - self._proj_regr_dict = {} - - def natural_sort(self, text): + self.db_dir = config['db_dir'] + self.synd_dir = config['syndrome_dir'] + self.projs = [] + self.proj_regr_dict = {} + self.regr_sts_db = {} + self.synd_db = {} + self.x_axis = {} + self.y_axis = {} + self.test_db_files = {} + + def _natural_sort(self, text): return int(re.sub('\D+','',text)) - def load_db(self): - for proj in self._cfg['project']: - if not os.path.exists(os.path.join(self._cfg['db_dir'], proj)): + def _load_db(self): + self.projs = [x for x in os.listdir(self.db_dir) if x not in ['syndrome_db','NVlogo.png']] + for proj in self.projs: + if not os.path.exists(os.path.join(self.db_dir, proj)): raise Exception('Select project: %0s not existed in database' % proj) else: - self._proj_regr_dict[proj] = [] - regr_list = os.listdir(os.path.join(self._cfg['db_dir'],proj)) - self._test_db_files[proj] = {} - self._regr_sts_db[proj] = {} + regr_list = os.listdir(os.path.join(self.db_dir,proj)) + self.proj_regr_dict[proj] = [] + self.test_db_files[proj] = {} + self.regr_sts_db[proj] = {} for regr in regr_list: - self._proj_regr_dict[proj].append(regr) + self.proj_regr_dict[proj].append(regr) # fetch all test status data files - self._test_db_files[proj][regr] = [x for x in glob.glob('{}/test*.json'.format(os.path.join(self._cfg['db_dir'],proj,regr,'json_db')))] - self._test_db_files[proj][regr].sort(key=self.natural_sort) + sts_db_path = os.path.join(self.db_dir,proj,regr,'json_db') + self.test_db_files[proj][regr] = glob.glob('{}/test*.json'.format(sts_db_path)) + self.test_db_files[proj][regr].sort(key=self._natural_sort) # load regression status data - regr_db_files = [x for x in glob.glob('{}/regr*.json'.format(os.path.join(self._cfg['db_dir'],proj,regr,'json_db')))] - regr_db_files.sort(key=self.natural_sort) - self._regr_sts_db[proj][regr] = [] + regr_db_files = glob.glob('{}/regr*.json'.format(sts_db_path)) + regr_db_files.sort(key=self._natural_sort) + self.regr_sts_db[proj][regr] = [] for idx in range(len(regr_db_files)): sts_file = regr_db_files[idx] with open(sts_file, 'r') as fh: db = json.load(fh) - self._regr_sts_db[proj][regr].append(db) - with open(os.path.join(self._cfg['syndrome_dir'],'syndrome.json'), 'r') as syn_fh: - self._syndrome_db = json.load(syn_fh) - - def load_x_axis(self): - for proj in self._regr_sts_db: - self._x_axis[proj] = {} - for regr in self._regr_sts_db[proj]: - self._x_axis[proj][regr] = [] - db = self._regr_sts_db[proj][regr] + self.regr_sts_db[proj][regr].append(db) + with open(os.path.join(self.synd_dir,'syndrome.json'), 'r') as syn_fh: + self.synd_db = json.load(syn_fh) + + def _load_x_axis(self): + for proj in self.regr_sts_db: + self.x_axis[proj] = {} + for regr in self.regr_sts_db[proj]: + self.x_axis[proj][regr] = [] + db = self.regr_sts_db[proj][regr] for idx in range(len(db)): time_str = db[idx]['start_time'].split('-') - date = list(map(int, time_str)) - self._x_axis[proj][regr].append(datetime(date[0],date[1],date[2],date[3],date[4],date[5])) - - def load_y_axis(self): - for proj in self._regr_sts_db: - self._y_axis[proj] = {} - for regr in self._regr_sts_db[proj]: - db = self._regr_sts_db[proj][regr] - self._y_axis[proj][regr] = [] - passing_rate_dict = {'total':[]} - planned_test_num = [] - running_test_num = [] - code_cov = [] - func_cov = [] + date = list(map(int, time_str)) + date_str = datetime(date[0],date[1],date[2],date[3],date[4],date[5]) + self.x_axis[proj][regr].append(date_str) + + def _load_y_axis(self): + for proj in self.regr_sts_db: + self.y_axis[proj] = {} + for regr in self.regr_sts_db[proj]: + db = self.regr_sts_db[proj][regr] + self.y_axis[proj][regr] = [] + passing_rate_dict = {'total':[]} + planned_test_num = [] + running_test_num = [] + code_cov = [] + func_cov = [] for idx in range(len(db)): passing_rate_dict['total'].append(db[idx]['metrics_result']['passing_rate']) if 'passing_rate' in db[idx]: @@ -98,36 +144,64 @@ def load_y_axis(self): running_test_num.append(db[idx]['metrics_result']['running_test_number']) code_cov.append(db[idx]['metrics_result']['code_coverage']) func_cov.append(db[idx]['metrics_result']['functional_coverage']) - self._y_axis[proj][regr] = [passing_rate_dict, planned_test_num, running_test_num, code_cov, func_cov] - + self.y_axis[proj][regr] = [passing_rate_dict, planned_test_num, running_test_num] + self.y_axis[proj][regr] += [code_cov, func_cov] + def load(self): - self.load_db() - self.load_x_axis() - self.load_y_axis() - - def run(self): - div_plot = DivPlot(self._proj_regr_dict) - div_plot.dash_gen(self._cfg['project'], self._x_axis, self._y_axis, self._regr_sts_db, self._test_db_files, self._syndrome_db, self._cfg['db_dir'], self._cfg['syndrome_dir']) - div_plot.run() - + self._load_db() + self._load_x_axis() + self._load_y_axis() class DivPlot(): - def __init__(self, proj_regr_dict): - self._proj_regr_dict = proj_regr_dict + + ''' + Generate html DIVs for metrics system, create dash app and attach those html DIVs to the metrics + app. DIVs includs: regression status graphs, test status tables, syndrome tables and maintaining + cell. + ''' + + def __init__(self, cfg): self._proj = '' self._regr = '' + self._loader = DataLoad(cfg) self._app = dash.Dash() self._app.scripts.config.serve_locally = True, self._app.css.config.serve_locally = True, self._app.config.suppress_callback_exceptions = True - def passing_rate_div(self, x_axis={}, y_axis={}): - divs = {} - for proj in self._proj_regr_dict: + def passing_rate_div(self): + divs = {} + layout = Layout( + title = 'Passing Rate', + titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f'), + xaxis = dict( + type = 'date', + linewidth = 2, + showline = True, + tickwidth = 1, + dtick = 86400000.0, + title = 'Date', + titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f') + ), + yaxis = dict( + tickformat='.2%', + linewidth=2, + showline=True, + range=[0,1], + title='Rate', + titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f') + ), + height = '700', + legend = dict(x=0, y=1), + paper_bgcolor = 'rgba(240,240,240,0.85)', + plot_bgcolor = 'rgba(240,255,255,0.85)', + hovermode = 'closet' + ) + for proj in self._loader.proj_regr_dict: divs[proj] = {} - for regr in self._proj_regr_dict[proj]: - y_axis_v = y_axis[proj][regr][0] - div = html.Div( + for regr in self._loader.proj_regr_dict[proj]: + y_axis_v = self._loader.y_axis[proj][regr][0] + div = html.Div( id = 'passing_rate_div', children = [ html.H3('PASSING RATE'), @@ -137,38 +211,13 @@ def passing_rate_div(self, x_axis={}, y_axis={}): figure = { 'data' : [ Scatter( - x = x_axis[proj][regr], + x = self._loader.x_axis[proj][regr], y = y_axis_v[i], text = i, name = re.sub('_passing_rate','',i) ) for i in y_axis_v.keys() ], - 'layout': Layout( - title = 'Passing Rate', - titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f'), - xaxis = dict( - type = 'date', - linewidth = 2, - showline = True, - tickwidth = 1, - dtick = 86400000.0, - title = 'Date', - titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f') - ), - yaxis = dict( - tickformat='.2%', - linewidth=2, - showline=True, - range=[0,1], - title='Rate', - titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f') - ), - height = '700', - legend = dict(x=0, y=1), - paper_bgcolor = 'rgba(240,240,240,0.85)', - plot_bgcolor = 'rgba(240,255,255,0.85)', - hovermode = 'closet' - ) + 'layout': layout } ) ], @@ -183,12 +232,38 @@ def passing_rate_div(self, x_axis={}, y_axis={}): divs[proj][regr] = div return divs - def test_num_div(self, x_axis={}, y_axis={}): - divs = {} - for proj in self._proj_regr_dict: + def test_num_div(self): + divs = {} + layout = Layout( + title = 'Test Num', + titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f'), + xaxis = dict( + type = 'date', + linewidth = 2, + showline = True, + tickwidth = 1, + dtick = 86400000.0, + title = 'Date', + titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f') + ), + yaxis = dict( + linewidth = 2, + showline = True, + range = [0,], + title = 'Num', + titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f') + ), + height = '700', + legend = dict(x=0, y=1), + paper_bgcolor = 'rgba(240,240,240,0.85)', + plot_bgcolor = 'rgba(240,255,255,0.85)', + hovermode = 'closet' + ) + for proj in self._loader.proj_regr_dict: divs[proj] = {} - for regr in self._proj_regr_dict[proj]: - y_axis_v = dict(PLANNED=y_axis[proj][regr][1],RUNNING=y_axis[proj][regr][2]) + for regr in self._loader.proj_regr_dict[proj]: + y_axis_v = dict(PLANNED=self._loader.y_axis[proj][regr][1], + RUNNING=self._loader.y_axis[proj][regr][2]) div = html.Div( id = 'test_num_div', children = [ @@ -199,37 +274,13 @@ def test_num_div(self, x_axis={}, y_axis={}): figure = { 'data' : [ Scatter( - x = x_axis[proj][regr], + x = self._loader.x_axis[proj][regr], y = y_axis_v[i], text = i, name = i ) for i in y_axis_v.keys() ], - 'layout': Layout( - title = 'Test Num', - titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f'), - xaxis = dict( - type = 'date', - linewidth = 2, - showline = True, - tickwidth = 1, - dtick = 86400000.0, - title = 'Date', - titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f') - ), - yaxis = dict( - linewidth = 2, - showline = True, - range = [0,], - title = 'Num', - titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f') - ), - height = '700', - legend = dict(x=0, y=1), - paper_bgcolor = 'rgba(240,240,240,0.85)', - plot_bgcolor = 'rgba(240,255,255,0.85)', - hovermode = 'closet' - ) + 'layout': layout } ) ], @@ -244,12 +295,33 @@ def test_num_div(self, x_axis={}, y_axis={}): divs[proj][regr] = div return divs - def coverage_div(self, x_axis={}, y_axis={}): - divs = {} - for proj in self._proj_regr_dict: + def coverage_div(self): + divs = {} + layout = Layout( + title = 'Coverage', + titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f'), + xaxis = dict( + type = 'date', + linewidth = 2, + showline = True, + tickwidth = 1, + dtick = 86400000.0, + title = 'Date', + titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f'), + ), + yaxis = dict(tickformat='.2%', linewidth=2, showline=True, range=[0,1], + title='Value'), + height = '700', + legend = dict(x=0, y=1), + paper_bgcolor = 'rgba(240,240,240,0.85)', + plot_bgcolor = 'rgba(240,255,255,0.85)', + hovermode = 'closet' + ) + for proj in self._loader.proj_regr_dict: divs[proj] = {} - for regr in self._proj_regr_dict[proj]: - y_axis_v = dict(CODE=y_axis[proj][regr][3],FUNC=y_axis[proj][regr][4]) + for regr in self._loader.proj_regr_dict[proj]: + y_axis_v = dict(CODE=self._loader.y_axis[proj][regr][3], + FUNC=self._loader.y_axis[proj][regr][4]) div = html.Div( id = 'coverage_div', children = [ @@ -260,31 +332,13 @@ def coverage_div(self, x_axis={}, y_axis={}): figure = { 'data' : [ Scatter( - x = x_axis[proj][regr], + x = self._loader.x_axis[proj][regr], y = y_axis_v[i], text = i, name = i ) for i in y_axis_v.keys() ], - 'layout': Layout( - title = 'Coverage', - titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f'), - xaxis = dict( - type = 'date', - linewidth = 2, - showline = True, - tickwidth = 1, - dtick = 86400000.0, - title = 'Date', - titlefont = dict(family = 'Courier New, monospace',size = 18,color = '#7f7f7f'), - ), - yaxis = dict(tickformat='.2%', linewidth=2, showline=True, range=[0,1], title='Value'), - height = '700', - legend = dict(x=0, y=1), - paper_bgcolor = 'rgba(240,240,240,0.85)', - plot_bgcolor = 'rgba(240,255,255,0.85)', - hovermode = 'closet' - ) + 'layout': layout } ) ], @@ -299,29 +353,35 @@ def coverage_div(self, x_axis={}, y_axis={}): divs[proj][regr] = div return divs - def regr_table_div(self, regr_sts_db={}, db_dir=''): + def regr_table_div(self): divs = {} - for proj in self._proj_regr_dict: + for proj in self._loader.proj_regr_dict: divs[proj] = {} - for regr in self._proj_regr_dict[proj]: + for regr in self._loader.proj_regr_dict[proj]: ROW = [] - db = regr_sts_db[proj][regr] + db = self._loader.regr_sts_db[proj][regr] for idx in range(len(db)): - item = {} - item['Name'] = '_'.join((proj,regr)) - item['Date'] = db[idx]['start_time'] - item['Seed'] = db[idx]['plan_seed'] - item['CommitID'] = db[idx]['unique_id'][0:10] - item['Status'] = db[idx]['status'] - cov_file = os.path.join(db_dir,proj,regr,'coverage/report','report_'+db[idx]['start_time'],'dashboard.html') + item = {} + item['Name'] = '_'.join((proj,regr)) + item['Date'] = db[idx]['start_time'] + item['Seed'] = db[idx]['plan_seed'] + item['CommitID'] = db[idx]['unique_id'][0:10] + item['Status'] = db[idx]['status'] + cov_file = os.path.join(self._loader.db_dir,proj,regr,'coverage/report', + 'report_'+db[idx]['start_time'],'dashboard.html') if os.path.exists(cov_file): - item['Cov'] = html.A('Func:{:.2%} Code:{:.2%}'.format(float(db[idx]['metrics_result']['functional_coverage']),float(db[idx]['metrics_result']['code_coverage'])), - href = 'https://nvtegra/'+cov_file) + item['Cov'] = html.A('Func:{:.2%} Code:{:.2%}'.format( + float(db[idx]['metrics_result']['functional_coverage']), + float(db[idx]['metrics_result']['code_coverage'])), + href = 'https://nvtegra/'+cov_file) else: - item['Cov'] = 'Func:{:.2%} Code:{:.2%}'.format(float(db[idx]['metrics_result']['functional_coverage']),float(db[idx]['metrics_result']['code_coverage'])) - item['PassingRate'] = dcc.Link('{:.2%}'.format(db[idx]['metrics_result']['passing_rate']), - href = db[idx]['start_time'], - style = {'color':'green','textDecoration':'underline','cursor':'pointer'}) + item['Cov'] = 'Func:{:.2%} Code:{:.2%}'.format( + float(db[idx]['metrics_result']['functional_coverage']), + float(db[idx]['metrics_result']['code_coverage'])) + item['PassingRate'] = dcc.Link( + '{:.2%}'.format(db[idx]['metrics_result']['passing_rate']), + href = db[idx]['start_time'], + style = {'color':'green','textDecoration':'underline','cursor':'pointer'}) ROW.append(item) ROW = sorted(ROW, key=lambda k:k['Date']) ROW.reverse() @@ -337,20 +397,21 @@ def regr_table_div(self, regr_sts_db={}, db_dir=''): editable = False, enable_drag_and_drop = True, row_selectable = True, - #resizable = True, +# resizable = True, sortable = True, - #column_width = 200, +# column_width = 200, row_height = 30, min_height = 500, selected_row_indices = [], ) ], style = { - 'textAlign' : 'left', + 'textAlign' : 'center', 'float' : 'right', 'width' : '90%', 'display' : 'inline-block', 'marginTop' : '10', +# 'fontSize' : '13', } ) divs[proj][regr] = div @@ -358,24 +419,25 @@ def regr_table_div(self, regr_sts_db={}, db_dir=''): def syndrome_table_div(self, test_db_files={}, synd_db={}): divs = {} - for proj in self._proj_regr_dict: + for proj in self._loader.proj_regr_dict: divs[proj] = {} - for regr in self._proj_regr_dict[proj]: + for regr in self._loader.proj_regr_dict[proj]: divs[proj][regr] = {} - db = test_db_files[proj][regr] + db = self._loader.test_db_files[proj][regr] for idx in range(len(db)): - name = re.sub('.json', '', os.path.basename(db[idx])).lstrip('test_status_') + '_syndrome' + test_sts_name = os.path.basename(db[idx]) + name = re.sub('.json', '_syndrome', test_sts_name.lstrip('test_status_')) with open(db[idx], 'r') as fh: test_db = json.load(fh) ROW = [] for idx,info in test_db.items(): if info['syndrome'] != '': item = {} - if info['syndrome'] in synd_db: + if info['syndrome'] in self._loader.synd_db: item['Syndrome'] = info['syndrome'] - item['BugID'] = synd_db[info['syndrome']]['bugid'] - item['Pattern'] = synd_db[info['syndrome']]['pattern'] - item['Desc'] = synd_db[info['syndrome']]['desc'] + item['BugID'] = self._loader.synd_db[info['syndrome']]['bugid'] + item['Pattern'] = self._loader.synd_db[info['syndrome']]['pattern'] + item['Desc'] = self._loader.synd_db[info['syndrome']]['desc'] else: item['Syndrome'] = info['syndrome'] item['BugID'] = '' @@ -396,11 +458,11 @@ def syndrome_table_div(self, test_db_files={}, synd_db={}): editable = False, enable_drag_and_drop = True, row_selectable = True, - #resizable = True, +# resizable = True, sortable = True, - #column_width = [50,320,100,200,400,400,], - row_height = 120, - min_height = 500, +# column_width = [50,320,100,200,400,400,], + row_height = 80, + min_height = 400, selected_row_indices = [], ) ], @@ -409,20 +471,20 @@ def syndrome_table_div(self, test_db_files={}, synd_db={}): 'float' : 'left', 'width' : '100%', 'display' : 'inline-block', - 'fontSize' : '12', + 'fontSize' : '13', 'marginTop' : '10', } ) divs[proj][regr][name] = div return divs - def test_table_div(self, test_db_files={}): + def test_table_div(self): divs = {} - for proj in self._proj_regr_dict: + for proj in self._loader.proj_regr_dict: divs[proj] = {} - for regr in self._proj_regr_dict[proj]: + for regr in self._loader.proj_regr_dict[proj]: divs[proj][regr] = {} - db = test_db_files[proj][regr] + db = self._loader.test_db_files[proj][regr] for idx in range(len(db)): name = re.sub('.json', '', os.path.basename(db[idx])) with open(db[idx], 'r') as fh: @@ -451,9 +513,9 @@ def test_table_div(self, test_db_files={}): editable = False, enable_drag_and_drop = True, row_selectable = True, - #resizable = True, +# resizable = True, sortable = True, - #column_width = [50,320,100,200,400,400,], +# column_width = [50,320,100,200,400,400,], row_height = 80, min_height = 800, selected_row_indices = [], @@ -465,13 +527,13 @@ def test_table_div(self, test_db_files={}): 'width' : '90%', 'display' : 'inline-block', 'fontSize' : '12', - #'marginTop' : '10', +# 'marginTop' : '10', } ) divs[proj][regr][name] = div return divs - def syndrome_div(self, synd_db={}): + def syndrome_div(self): div = html.Div( id = 'syndrome_div', children = [ @@ -486,34 +548,78 @@ def syndrome_div(self, synd_db={}): html.H3('Desc:', style={'marginTop':'29'}), html.H3('Status:', style={'marginTop':'29'}), ], - style = {'dispaly':'inline-block', 'float':'left', 'marginLeft':'300'} + style = {'dispaly':'inline-block', 'float':'left', 'marginLeft':'20%'} ), html.Div( children = [ dcc.Dropdown( id = 'syn_dropdown', - options = [{'label': i, 'value':i} for i in synd_db], + options = [{'label': i, 'value':i} for i in self._loader.synd_db], value = '', clearable = True, multi = False, ), - dcc.Input(id='syndrome', type='text', style={'marginTop':'13','width':'845','height':'30','color':'green'}), - dcc.Input(id='bugid', type='text', style={'marginTop':'13','width':'845','height':'30','color':'green'}), - dcc.Input(id='pattern', type='text', style={'marginTop':'13','width':'845','height':'30','color':'green'}), - dcc.Input(id='desc', type='text', style={'marginTop':'13','width':'845','height':'30','color':'green'}), - dcc.Input(id='status', value='', type='text', style={'marginTop':'13','width':'845','height':'30','color':'red'}), + dcc.Input( + id = 'syndrome', + type = 'text', + style = {'marginTop':'13','width':'100%','height':'30','color':'green'} + ), + dcc.Input( + id = 'bugid', + type = 'text', + style = {'marginTop':'13','width':'100%','height':'30','color':'green'} + ), + dcc.Input( + id = 'pattern', + type = 'text', + style = {'marginTop':'13','width':'100%','height':'30','color':'green'} + ), + dcc.Input( + id = 'desc', + type = 'text', + style = {'marginTop':'13','width':'100%','height':'30','color':'green'} + ), + dcc.Input( + id = 'status', + value = '', + type = 'text', + style = {'marginTop':'13','width':'100%','height':'30','color':'red'} + ), ], - style = {'dispaly':'inline-block', 'width':'50%', 'marginLeft':'20','marginTop':'20', 'fontWeight':'bold', 'float':'left'} + style = { + 'dispaly' : 'inline-block', + 'width' : '50%', + 'marginLeft' : '20', + 'marginTop' : '20', + 'fontWeight' : 'bold', + 'float' : 'left' + } ), html.Button( 'Update', id = 'up_button', - style = {'backgroundColor' : '#F0F0F0', 'color':'green', 'marginLeft':'330', 'marginTop':'15', 'fontSize':'18', 'fontWeight':'bold', 'dispaly':'inline-block'}, + style = { + 'backgroundColor' : '#F0F0F0', + 'color' : 'green', + 'marginLeft' : '20%', + 'marginTop' : '15', + 'fontSize' : '18', + 'fontWeight' : 'bold', + 'dispaly' : 'inline-block' + }, ), html.Button( 'Delete', id = 'del_button', - style = {'backgroundColor' : '#F0F0F0', 'color':'green', 'marginLeft':'30', 'marginTop':'15', 'fontSize':'18', 'fontWeight':'bold', 'dispaly':'inline-block'}, + style = { + 'backgroundColor' : '#F0F0F0', + 'color' : 'green', + 'marginLeft' : '30', + 'marginTop' : '15', + 'fontSize' : '18', + 'fontWeight' : 'bold', + 'dispaly' : 'inline-block' + }, ), ], style = { @@ -523,7 +629,7 @@ def syndrome_div(self, synd_db={}): 'display' : 'inline-block', 'marginTop' : '50', 'fontSize' : '15', - #'marginTop' : '10', +# 'marginTop' : '10', } ) return div @@ -533,7 +639,7 @@ def main_div_gen(self, proj, regr, div_pr, div_tn, div_co, div_rt): html.Div( id = 'nav', children = [ - html.A('PASSINGRATE', href='#passing_rate_div', style={'color':'green'}), + html.A('PASSRATE', href='#passing_rate_div', style={'color':'green'}), html.Br(),html.Br(), html.A('TESTNUM', href='#test_num_div', style={'color':'green'}), html.Br(),html.Br(), @@ -550,6 +656,7 @@ def main_div_gen(self, proj, regr, div_pr, div_tn, div_co, div_rt): 'paddingRight' : '10', 'paddingTop' : '10', 'paddingBottom' : '10', + 'width' : '7%', } ), html.Div(id='passing_rate_v', children = div_pr[proj][regr]), @@ -569,14 +676,13 @@ def main_div_gen(self, proj, regr, div_pr, div_tn, div_co, div_rt): ]) return div - def dash_gen(self, project=[], x_axis={}, y_axis={}, regr_sts_db={}, test_db_files={}, synd_db={}, db_dir='', synd_dir=''): - passing_rate_divs = self.passing_rate_div(x_axis,y_axis) - test_num_divs = self.test_num_div(x_axis,y_axis) - coverage_divs = self.coverage_div(x_axis,y_axis) - regr_table_divs = self.regr_table_div(regr_sts_db,db_dir) - syndrome_table_divs = self.syndrome_table_div(test_db_files, synd_db) - test_table_divs = self.test_table_div(test_db_files) - syndrome_div = self.syndrome_div(synd_db) + def dash_gen(self): + self._loader.load() + + project = self._loader.projs + db_dir = self._loader.db_dir + synd_dir = self._loader.synd_dir + synd_db = self._loader.synd_db head_div = html.Div( id = 'head_div', @@ -611,7 +717,7 @@ def dash_gen(self, project=[], x_axis={}, y_axis={}, regr_sts_db={}, test_db_fil children = [ html.Div( html.H4('PROJECT: ', style={'marginTop':'30'}), - style = {'dispaly':'inline-block', 'float':'left', 'marginLeft':'300'} + style = {'dispaly':'inline-block', 'float':'left', 'marginLeft':'15%'} ), html.Div( dcc.Dropdown( @@ -621,58 +727,82 @@ def dash_gen(self, project=[], x_axis={}, y_axis={}, regr_sts_db={}, test_db_fil clearable = True, multi = False, ), - style = {'dispaly':'inline-block', 'width':'15%', 'marginLeft':'20','marginTop':'20', 'fontWeight':'bold', 'float':'left'} + style = { + 'dispaly' : 'inline-block', + 'width' : '15%', + 'marginLeft' : '3%', + 'marginTop' : '20', + 'fontWeight' : 'bold', + 'float' : 'left' + } ), html.Div( html.H4('REGRESSION: ', style={'marginTop':'30'}), - style = {'dispaly':'inline-block', 'float':'left', 'marginLeft':'200'} + style = {'dispaly':'inline-block', 'float':'left', 'marginLeft':'5%'} ), html.Div( dcc.Dropdown( id = 'regr_dp', options = [], - value = self._proj_regr_dict[project[0]][0], + value = self._loader.proj_regr_dict[project[0]][0], clearable = True, multi = False, ), - style = {'dispaly':'inline-block', 'width':'15%', 'marginLeft':'20','marginTop':'20', 'fontWeight':'bold', 'float':'left'} + style = { + 'dispaly' : 'inline-block', + 'width' : '15%', + 'marginLeft' : '3%', + 'marginTop' : '20', + 'fontWeight' : 'bold', + 'float' : 'left' + } ), ], style = { - 'textAlign' : 'center', - 'float' : 'right', - 'width' : '90%', - 'display' : 'inline-block', - #'marginTop' : '50', - 'fontSize' : '17', - 'fontWeight' : 'bold', + 'textAlign' : 'center', + 'float' : 'right', + 'width' : '90%', + 'display' : 'inline-block', +# 'marginTop' : '50', + 'fontSize' : '17', + 'fontWeight' : 'bold', } ) - self._app.layout = html.Div( - id = 'full', - children = [ - dcc.Location(id='url', pathname='', refresh=False), - head_div, - tab_div, - html.Div( - id = 'main', - children = [ - #main_div, - self.main_div_gen(project[0], self._proj_regr_dict[project[0]][0], passing_rate_divs, test_num_divs, coverage_divs, regr_table_divs), - ] - ), - ], - style = { - 'backgroundColor' : 'snow' - } - ) + def full_div(): + self._loader.load() + return html.Div( + id = 'full', + children = [ + dcc.Location(id='url', pathname='', refresh=False), + head_div, + tab_div, + html.Div( + id = 'main', + children = [ + self.main_div_gen( + project[0], + self._loader.proj_regr_dict[project[0]][0], + self.passing_rate_div(), + self.test_num_div(), + self.coverage_div(), + self.regr_table_div() + ), + ] + ), + ], + style = { + 'backgroundColor' : 'snow' + } + ) + self._app.layout = full_div() - @self._app.callback(dash.dependencies.Output('regr_dp', 'options'), [dash.dependencies.Input('proj_dp', 'value')]) + @self._app.callback(dash.dependencies.Output('regr_dp', 'options'), + [dash.dependencies.Input('proj_dp', 'value')]) def display_content(selected_proj): - if selected_proj in self._proj_regr_dict: - regr_list = self._proj_regr_dict[selected_proj] + if selected_proj in self._loader.proj_regr_dict: + regr_list = self._loader.proj_regr_dict[selected_proj] return [{'label':i, 'value':i} for i in regr_list] else: return [] @@ -684,61 +814,74 @@ def serve_image(image_path): return flask.send_from_directory(db_dir, image_name) @self._app.callback(dash.dependencies.Output('passing_rate_v', 'children'), - [dash.dependencies.Input('proj_dp','value'), dash.dependencies.Input('regr_dp','value')]) + [dash.dependencies.Input('proj_dp', 'value'), + dash.dependencies.Input('regr_dp', 'value')]) def show_passing_rate(proj,regr): self._proj = proj self._regr = regr - if proj in self._proj_regr_dict: - if regr in self._proj_regr_dict[proj]: - return passing_rate_divs[proj][regr] + if proj in self._loader.proj_regr_dict: + if regr in self._loader.proj_regr_dict[proj]: + return self.passing_rate_div()[proj][regr] @self._app.callback(dash.dependencies.Output('test_num_v', 'children'), - [dash.dependencies.Input('proj_dp','value'), dash.dependencies.Input('regr_dp','value')]) + [dash.dependencies.Input('proj_dp', 'value'), + dash.dependencies.Input('regr_dp', 'value')]) def show_test_num(proj,regr): - if proj in self._proj_regr_dict: - if regr in self._proj_regr_dict[proj]: - return test_num_divs[proj][regr] + if proj in self._loader.proj_regr_dict: + if regr in self._loader.proj_regr_dict[proj]: + return self.test_num_div()[proj][regr] @self._app.callback(dash.dependencies.Output('coverage_v', 'children'), - [dash.dependencies.Input('proj_dp','value'), dash.dependencies.Input('regr_dp','value')]) + [dash.dependencies.Input('proj_dp', 'value'), + dash.dependencies.Input('regr_dp', 'value')]) def show_coverage(proj,regr): - if proj in self._proj_regr_dict: - if regr in self._proj_regr_dict[proj]: - return coverage_divs[proj][regr] + if proj in self._loader.proj_regr_dict: + if regr in self._loader.proj_regr_dict[proj]: + return self.coverage_div()[proj][regr] @self._app.callback(dash.dependencies.Output('regr_table_v', 'children'), - [dash.dependencies.Input('proj_dp','value'), dash.dependencies.Input('regr_dp','value')]) + [dash.dependencies.Input('proj_dp', 'value'), + dash.dependencies.Input('regr_dp', 'value')]) def show_regr_table(proj,regr): - if proj in self._proj_regr_dict: - if regr in self._proj_regr_dict[proj]: - return regr_table_divs[proj][regr] + if proj in self._loader.proj_regr_dict: + if regr in self._loader.proj_regr_dict[proj]: + return self.regr_table_div()[proj][regr] - @self._app.callback(dash.dependencies.Output('synd_div', 'children'), - [dash.dependencies.Input('regr_table','selected_row_indices'), dash.dependencies.Input('regr_table','rows'),]) + @self._app.callback(dash.dependencies.Output('synd_div', 'children'), + [dash.dependencies.Input('regr_table', 'selected_row_indices'), + dash.dependencies.Input('regr_table', 'rows'),]) def display_syndrome(indices, rows): - if self._proj in self._proj_regr_dict: - if self._regr in self._proj_regr_dict[self._proj]: + if self._proj in self._loader.proj_regr_dict: + if self._regr in self._loader.proj_regr_dict[self._proj]: if indices != []: table_name = rows[indices[0]]['Date']+'_syndrome' - return syndrome_table_divs[self._proj][self._regr][table_name] + return self.syndrome_table_div()[self._proj][self._regr][table_name] @self._app.callback(dash.dependencies.Output('main', 'children'), - [dash.dependencies.Input('url', 'pathname')]) + [dash.dependencies.Input('url', 'pathname')]) def display_page(pathname): + self._loader.load() table_name = 'test_status_'+pathname.lstrip('/') if self._proj != '' and self._regr != '': - if table_name in test_table_divs[self._proj][self._regr]: + if table_name in self.test_table_div()[self._proj][self._regr]: return html.Div([ - test_table_divs[self._proj][self._regr][table_name], + self.test_table_div()[self._proj][self._regr][table_name], html.Div( children = [ - #html.A('BACK', href='/nvdla', style={'color':'green'}), - dcc.Link('BACK', href='/nvdla', style={'color':'green','textDecoration':'underline','cursor':'pointer'}), + dcc.Link( + 'BACK', + href = '/nvdla', + style = { + 'color' : 'green', + 'textDecoration' : 'underline', + 'cursor' : 'pointer' + } + ), ], style = { 'float' : 'left', - 'border' : 'solid #F1F1F1', - 'backgroundColor' : 'rgba(240,240,240,0.85)', +# 'border' : 'solid #F1F1F1', +# 'backgroundColor' : 'rgba(240,240,240,0.85)', 'marginTop' : '10', 'marginLeft' : '10', 'paddingLeft' : '10', @@ -747,53 +890,77 @@ def display_page(pathname): 'paddingBottom' : '10', } ), - syndrome_div, + self.syndrome_div(), ]) else: - #return main_div - return self.main_div_gen(self._proj, self._regr, passing_rate_divs, test_num_divs, coverage_divs, regr_table_divs), + return self.main_div_gen( + self._proj, + self._regr, + self.passing_rate_div(), + self.test_num_div(), + self.coverage_div(), + self.regr_table_div() + ) else: - #return main_div - return self.main_div_gen(project[0], self._proj_regr_dict[project[0]][0], passing_rate_divs, test_num_divs, coverage_divs, regr_table_divs), + return self.main_div_gen( + project[0], + self._loader.proj_regr_dict[project[0]][0], + self.passing_rate_div(), + self.test_num_div(), + self.coverage_div(), + self.regr_table_div() + ) - @self._app.callback(dash.dependencies.Output('syndrome', 'value'), - [dash.dependencies.Input('syn_dropdown', 'value')]) + @self._app.callback(dash.dependencies.Output('syndrome', 'value'), + [dash.dependencies.Input('syn_dropdown', 'value')]) def show_synd_bugid(value): if value in synd_db: return value else: return '' - @self._app.callback(dash.dependencies.Output('pattern', 'value'), - [dash.dependencies.Input('syn_dropdown', 'value')]) + @self._app.callback(dash.dependencies.Output('pattern', 'value'), + [dash.dependencies.Input('syn_dropdown', 'value')]) def show_synd_bugid(value): if value in synd_db: return ';'.join(synd_db[value]['pattern']) else: return '' - @self._app.callback(dash.dependencies.Output('bugid', 'value'), - [dash.dependencies.Input('syn_dropdown', 'value')]) + @self._app.callback(dash.dependencies.Output('bugid', 'value'), + [dash.dependencies.Input('syn_dropdown', 'value')]) def show_synd_bugid(value): if value in synd_db: return ';'.join(synd_db[value]['bugid']) else: return '' - @self._app.callback(dash.dependencies.Output('desc', 'value'), - [dash.dependencies.Input('syn_dropdown', 'value')]) + @self._app.callback(dash.dependencies.Output('desc', 'value'), + [dash.dependencies.Input('syn_dropdown', 'value')]) def show_synd_bugid(value): if value in synd_db: return synd_db[value]['desc'] else: return '' - @self._app.callback(dash.dependencies.Output('status', 'value'), - [dash.dependencies.Input('up_button', 'n_clicks'),dash.dependencies.Input('del_button', 'n_clicks'),dash.dependencies.Input('syndrome', 'value'), - dash.dependencies.Input('bugid', 'value'),dash.dependencies.Input('pattern', 'value'), dash.dependencies.Input('desc', 'value')]) + @self._app.callback(dash.dependencies.Output('syn_dropdown', 'options'), + [dash.dependencies.Input('up_button', 'n_clicks'), + dash.dependencies.Input('del_button', 'n_clicks')]) + def up_db(up_num,del_num): + return [{'label': i, 'value':i} for i in synd_db] + + @self._app.callback(dash.dependencies.Output('status', 'value'), + [dash.dependencies.Input('up_button', 'n_clicks'), + dash.dependencies.Input('del_button', 'n_clicks'), + dash.dependencies.Input('syndrome', 'value'), + dash.dependencies.Input('bugid', 'value'), + dash.dependencies.Input('pattern', 'value'), + dash.dependencies.Input('desc', 'value')]) def on_click(up_num,del_num,synd,bugid='',pattern='',desc=''): if (int(up_num or 0) > int(del_num or 0)) and synd != '': - synd_info = dict(bugid=str(bugid).split(';'),pattern=str(pattern).split(';'),desc=desc) + synd_info = dict(bugid = str(bugid).split(';'), + pattern = str(pattern).split(';'), + desc = desc) if synd not in synd_db: synd_db[synd] = synd_info with open(os.path.join(synd_dir,'syndrome.json'), 'w') as fh: @@ -818,33 +985,35 @@ def on_click(up_num,del_num,synd,bugid='',pattern='',desc=''): return ' ' @self._app.callback(dash.dependencies.Output('up_button', 'n_clicks'), - [dash.dependencies.Input('syndrome', 'value'),dash.dependencies.Input('bugid', 'value'), - dash.dependencies.Input('pattern', 'value'), dash.dependencies.Input('desc', 'value')]) + [dash.dependencies.Input('syndrome', 'value'), + dash.dependencies.Input('bugid', 'value'), + dash.dependencies.Input('pattern', 'value'), + dash.dependencies.Input('desc', 'value')]) def clear_click(synd,bugid,pat,desc): return 0 @self._app.callback(dash.dependencies.Output('del_button', 'n_clicks'), - [dash.dependencies.Input('syndrome', 'value'),dash.dependencies.Input('bugid', 'value'), - dash.dependencies.Input('pattern', 'value'), dash.dependencies.Input('desc', 'value')]) + [dash.dependencies.Input('syndrome', 'value'), + dash.dependencies.Input('bugid', 'value'), + dash.dependencies.Input('pattern', 'value'), + dash.dependencies.Input('desc', 'value')]) def clear_click(synd,bugid,pat,desc): return 0 def run(self): self._app.run_server(debug=True) - #self._app.run_server(debug=True, host='172.20.213.206') +# self._app.run_server(debug=True, host='172.20.213.206') def main(): - parser = argparse.ArgumentParser(formatter_class=argparse.RawDescriptionHelpFormatter, description=__DESCRIPTION__) + parser = argparse.ArgumentParser(formatter_class = argparse.RawDescriptionHelpFormatter, + description = __DESCRIPTION__) parser.add_argument('--db_dir', '-db_dir', dest='db_dir', required=False, default='.', help='Specify regression status database direcotry for loading json file') - parser.add_argument('--syndrome_dir', '-syndrome_dir', dest='syndrome_dir', required=False, default='.', - help='Specify direcotry for loading syndrome database') - parser.add_argument('--project','-P', dest='project', required=True, default=[],type=str, nargs='+', - help='provide project name, can choose multiple projects') - config = vars(parser.parse_args()) + parser.add_argument('--syndrome_dir', '-syndrome_dir', dest='syndrome_dir', required=False, + default='.', help='Specify direcotry for loading syndrome database') + config = vars(parser.parse_args()) run_metrics = RunMetrics(config) - run_metrics.load() run_metrics.run() From 67f4c0efd7bea5cb80bd90d77dd2d9f25ca9a468 Mon Sep 17 00:00:00 2001 From: jialin Date: Wed, 30 May 2018 23:08:44 -0700 Subject: [PATCH 15/28] Fix internal monitor/scoreboard connection issue --- verif/testbench/trace_player/nvdla_tb_env.sv | 68 ++++++++++---------- 1 file changed, 35 insertions(+), 33 deletions(-) diff --git a/verif/testbench/trace_player/nvdla_tb_env.sv b/verif/testbench/trace_player/nvdla_tb_env.sv index 539d6641..54852146 100644 --- a/verif/testbench/trace_player/nvdla_tb_env.sv +++ b/verif/testbench/trace_player/nvdla_tb_env.sv @@ -619,27 +619,29 @@ function void nvdla_tb_env::connect_phase(uvm_phase phase); //:| for dma in dma_list: //:| for mem_if in mem_if_list: //:| for kind in kind_list: + //:| fifo = 'dut_init_fifo' if kind == 'request' else 'dut_cmpl_fifo' + //:| port = 'port_req' if kind == 'request' else 'port' //:| msg = ''' //:| case(%(dma)s_%(mem_if)s_%(kind)s_compare_mode) //:| "COMPARE_MODE_DISABLE": begin //:| end //:| "COMPARE_MODE_RTL_AHEAD": begin - //:| %(dma)s_%(mem_if)s_agt.slv_mon.mon_analysis_port_req.connect(sb.%(dma)s_%(mem_if)s_sb.dut_init_fifo.analysis_export); + //:| %(dma)s_%(mem_if)s_agt.slv_mon.mon_analysis_%(port)s.connect(sb.%(dma)s_%(mem_if)s_sb.%(fifo)s.analysis_export); //:| end //:| "COMPARE_MODE_RTL_GATING_CMOD": begin - //:| %(dma)s_%(mem_if)s_agt.slv_mon.mon_analysis_port_req.connect(sb.%(dma)s_%(mem_if)s_sb.dut_init_fifo.analysis_export); + //:| %(dma)s_%(mem_if)s_agt.slv_mon.mon_analysis_%(port)s.connect(sb.%(dma)s_%(mem_if)s_sb.%(fifo)s.analysis_export); //:| end //:| "COMPARE_MODE_LOOSE_COMPARE": begin - //:| %(dma)s_%(mem_if)s_agt.slv_mon.mon_analysis_port_req.connect(sb.%(dma)s_%(mem_if)s_sb.dut_init_fifo.analysis_export); + //:| %(dma)s_%(mem_if)s_agt.slv_mon.mon_analysis_%(port)s.connect(sb.%(dma)s_%(mem_if)s_sb.%(fifo)s.analysis_export); //:| end //:| "COMPARE_MODE_COUNT_TXN_ONLY": begin - //:| %(dma)s_%(mem_if)s_agt.slv_mon.mon_analysis_port_req.connect(sb.%(dma)s_%(mem_if)s_sb.dut_init_fifo.analysis_export); + //:| %(dma)s_%(mem_if)s_agt.slv_mon.mon_analysis_%(port)s.connect(sb.%(dma)s_%(mem_if)s_sb.%(fifo)s.analysis_export); //:| end //:| default: begin //:| `uvm_error(tID, {"Unsupported scoreboard working mode: ", %(dma)s_%(mem_if)s_%(kind)s_compare_mode}) //:| end //:| endcase - //:| ''' % {'dma':dma, 'mem_if':mem_if, 'kind':kind} + //:| ''' % {'dma':dma, 'mem_if':mem_if, 'kind':kind, 'fifo':fifo, 'port':port} //:| print(msg) //:) epython: generated_beg (DO NOT EDIT BELOW) @@ -668,16 +670,16 @@ function void nvdla_tb_env::connect_phase(uvm_phase phase); "COMPARE_MODE_DISABLE": begin end "COMPARE_MODE_RTL_AHEAD": begin - cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_wt_pri_mem_sb.dut_init_fifo.analysis_export); + cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.cdma_wt_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_RTL_GATING_CMOD": begin - cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_wt_pri_mem_sb.dut_init_fifo.analysis_export); + cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.cdma_wt_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_LOOSE_COMPARE": begin - cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_wt_pri_mem_sb.dut_init_fifo.analysis_export); + cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.cdma_wt_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_COUNT_TXN_ONLY": begin - cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_wt_pri_mem_sb.dut_init_fifo.analysis_export); + cdma_wt_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.cdma_wt_pri_mem_sb.dut_cmpl_fifo.analysis_export); end default: begin `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_wt_pri_mem_response_compare_mode}) @@ -710,16 +712,16 @@ function void nvdla_tb_env::connect_phase(uvm_phase phase); "COMPARE_MODE_DISABLE": begin end "COMPARE_MODE_RTL_AHEAD": begin - cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_dat_pri_mem_sb.dut_init_fifo.analysis_export); + cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.cdma_dat_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_RTL_GATING_CMOD": begin - cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_dat_pri_mem_sb.dut_init_fifo.analysis_export); + cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.cdma_dat_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_LOOSE_COMPARE": begin - cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_dat_pri_mem_sb.dut_init_fifo.analysis_export); + cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.cdma_dat_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_COUNT_TXN_ONLY": begin - cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdma_dat_pri_mem_sb.dut_init_fifo.analysis_export); + cdma_dat_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.cdma_dat_pri_mem_sb.dut_cmpl_fifo.analysis_export); end default: begin `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdma_dat_pri_mem_response_compare_mode}) @@ -752,16 +754,16 @@ function void nvdla_tb_env::connect_phase(uvm_phase phase); "COMPARE_MODE_DISABLE": begin end "COMPARE_MODE_RTL_AHEAD": begin - sdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_pri_mem_sb.dut_init_fifo.analysis_export); + sdp_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.sdp_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_RTL_GATING_CMOD": begin - sdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_pri_mem_sb.dut_init_fifo.analysis_export); + sdp_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.sdp_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_LOOSE_COMPARE": begin - sdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_pri_mem_sb.dut_init_fifo.analysis_export); + sdp_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.sdp_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_COUNT_TXN_ONLY": begin - sdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_pri_mem_sb.dut_init_fifo.analysis_export); + sdp_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.sdp_pri_mem_sb.dut_cmpl_fifo.analysis_export); end default: begin `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_pri_mem_response_compare_mode}) @@ -794,16 +796,16 @@ function void nvdla_tb_env::connect_phase(uvm_phase phase); "COMPARE_MODE_DISABLE": begin end "COMPARE_MODE_RTL_AHEAD": begin - sdp_b_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_b_pri_mem_sb.dut_init_fifo.analysis_export); + sdp_b_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.sdp_b_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_RTL_GATING_CMOD": begin - sdp_b_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_b_pri_mem_sb.dut_init_fifo.analysis_export); + sdp_b_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.sdp_b_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_LOOSE_COMPARE": begin - sdp_b_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_b_pri_mem_sb.dut_init_fifo.analysis_export); + sdp_b_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.sdp_b_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_COUNT_TXN_ONLY": begin - sdp_b_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_b_pri_mem_sb.dut_init_fifo.analysis_export); + sdp_b_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.sdp_b_pri_mem_sb.dut_cmpl_fifo.analysis_export); end default: begin `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_b_pri_mem_response_compare_mode}) @@ -836,16 +838,16 @@ function void nvdla_tb_env::connect_phase(uvm_phase phase); "COMPARE_MODE_DISABLE": begin end "COMPARE_MODE_RTL_AHEAD": begin - sdp_n_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_n_pri_mem_sb.dut_init_fifo.analysis_export); + sdp_n_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.sdp_n_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_RTL_GATING_CMOD": begin - sdp_n_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_n_pri_mem_sb.dut_init_fifo.analysis_export); + sdp_n_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.sdp_n_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_LOOSE_COMPARE": begin - sdp_n_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_n_pri_mem_sb.dut_init_fifo.analysis_export); + sdp_n_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.sdp_n_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_COUNT_TXN_ONLY": begin - sdp_n_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.sdp_n_pri_mem_sb.dut_init_fifo.analysis_export); + sdp_n_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.sdp_n_pri_mem_sb.dut_cmpl_fifo.analysis_export); end default: begin `uvm_error(tID, {"Unsupported scoreboard working mode: ", sdp_n_pri_mem_response_compare_mode}) @@ -878,16 +880,16 @@ function void nvdla_tb_env::connect_phase(uvm_phase phase); "COMPARE_MODE_DISABLE": begin end "COMPARE_MODE_RTL_AHEAD": begin - pdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.pdp_pri_mem_sb.dut_init_fifo.analysis_export); + pdp_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.pdp_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_RTL_GATING_CMOD": begin - pdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.pdp_pri_mem_sb.dut_init_fifo.analysis_export); + pdp_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.pdp_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_LOOSE_COMPARE": begin - pdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.pdp_pri_mem_sb.dut_init_fifo.analysis_export); + pdp_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.pdp_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_COUNT_TXN_ONLY": begin - pdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.pdp_pri_mem_sb.dut_init_fifo.analysis_export); + pdp_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.pdp_pri_mem_sb.dut_cmpl_fifo.analysis_export); end default: begin `uvm_error(tID, {"Unsupported scoreboard working mode: ", pdp_pri_mem_response_compare_mode}) @@ -920,16 +922,16 @@ function void nvdla_tb_env::connect_phase(uvm_phase phase); "COMPARE_MODE_DISABLE": begin end "COMPARE_MODE_RTL_AHEAD": begin - cdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdp_pri_mem_sb.dut_init_fifo.analysis_export); + cdp_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.cdp_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_RTL_GATING_CMOD": begin - cdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdp_pri_mem_sb.dut_init_fifo.analysis_export); + cdp_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.cdp_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_LOOSE_COMPARE": begin - cdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdp_pri_mem_sb.dut_init_fifo.analysis_export); + cdp_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.cdp_pri_mem_sb.dut_cmpl_fifo.analysis_export); end "COMPARE_MODE_COUNT_TXN_ONLY": begin - cdp_pri_mem_agt.slv_mon.mon_analysis_port_req.connect(sb.cdp_pri_mem_sb.dut_init_fifo.analysis_export); + cdp_pri_mem_agt.slv_mon.mon_analysis_port.connect(sb.cdp_pri_mem_sb.dut_cmpl_fifo.analysis_export); end default: begin `uvm_error(tID, {"Unsupported scoreboard working mode: ", cdp_pri_mem_response_compare_mode}) From 46057d59a1af0b17e7b553dea290b4f4567665dc Mon Sep 17 00:00:00 2001 From: rayz Date: Sun, 3 Jun 2018 22:59:49 -0700 Subject: [PATCH 16/28] add verdi_home path env setting to cmd file --- verif/tools/run_test.py | 1 + 1 file changed, 1 insertion(+) diff --git a/verif/tools/run_test.py b/verif/tools/run_test.py index 90905ce2..d42aa51e 100755 --- a/verif/tools/run_test.py +++ b/verif/tools/run_test.py @@ -277,6 +277,7 @@ def run_uvm_tb_simulation(self): cmd_fh = open(script, '+w') cmd_fh.write('#!/bin/sh\n\n') cmd_fh.write("export VCS_HOME=%s\n\n" % os.environ['VCS_HOME']) + cmd_fh.write("export VERDI_HOME=%s\n\n" % os.environ['VERDI_HOME']) cmd_fh.write("export NOVAS_HOME=%s\n\n" % os.environ['NOVAS_HOME']) cmd_fh.write("export LD_LIBRARY_PATH=%s\n\n" % os.environ['LD_LIBRARY_PATH']) cmd_fh.write("export PATH=%s\n\n" % os.environ['PATH']) From 4523b79a1fe7bf1ec8874e00c1ab6dd306629aca Mon Sep 17 00:00:00 2001 From: rayz Date: Mon, 4 Jun 2018 02:44:21 -0700 Subject: [PATCH 17/28] update cc reuse mode constraints --- .../resources/nvdla_cdma_resource.sv | 16 ++++++++++++++-- verif/tests/uvm_tests/cc_feature_rtest.sv | 2 ++ verif/tests/uvm_tests/cc_in_channel_ctest.sv | 2 ++ verif/tests/uvm_tests/cc_in_height_ctest.sv | 2 ++ verif/tests/uvm_tests/cc_in_width_ctest.sv | 2 ++ verif/tests/uvm_tests/cc_out_channel_ctest.sv | 2 ++ verif/tests/uvm_tests/cc_out_height_ctest.sv | 2 ++ verif/tests/uvm_tests/cc_out_width_ctest.sv | 2 ++ .../uvm_tests/cc_pitch_line_stride_0_ctest.sv | 2 ++ .../uvm_tests/cc_pitch_line_stride_1_ctest.sv | 2 ++ .../uvm_tests/cc_pitch_line_stride_2_ctest.sv | 2 ++ .../uvm_tests/cc_pitch_line_stride_3_ctest.sv | 2 ++ verif/tests/uvm_tests/cc_pitch_rtest.sv | 2 ++ verif/tests/uvm_tests/cc_rtest.sv | 2 ++ verif/tests/uvm_tests/cc_sdp_pdp_rtest.sv | 6 ++++-- .../tests/uvm_tests/cc_sdprdma_sdp_pdp_rtest.sv | 6 ++++-- verif/tests/uvm_tests/cc_sdprdma_sdp_rtest.sv | 6 ++++-- verif/tests/uvm_tests/multi_scenario_rtest.sv | 2 ++ 18 files changed, 54 insertions(+), 8 deletions(-) diff --git a/verif/testbench/trace_generator/resources/nvdla_cdma_resource.sv b/verif/testbench/trace_generator/resources/nvdla_cdma_resource.sv index a1249b52..ebbb9751 100644 --- a/verif/testbench/trace_generator/resources/nvdla_cdma_resource.sv +++ b/verif/testbench/trace_generator/resources/nvdla_cdma_resource.sv @@ -865,13 +865,25 @@ constraint nvdla_cdma_resource::c_ias_reuse_mode { // min_weight_banks = ((((weight_width_ext+1)*(weight_height_ext+1)*(weight_channel_ext+1)*((proc_precision==proc_precision_INT8)?1:2)*kernel_per_group+127) / 128) + 255) / 256; // bug 200312556, weiht bank must be able to hold one max kernel group + 128 bytes - if (prev_skip_data_rls == skip_data_rls_DISABLE) { + /* REUSE mode cfg + * Layer | Pre | Cur + * Data/Weight | release | not_reuse + * Data/Weight | not_release | reuse + * Data/Weight | NULL | not_reuse + */ + if (prev_skip_data_rls == skip_data_rls_DISABLE || get_active_cnt() == 0) { data_reuse == data_reuse_DISABLE; } + else if (prev_skip_data_rls == skip_data_rls_ENABLE) { + data_reuse == data_reuse_ENABLE; + } - if (prev_skip_weight_rls == skip_weight_rls_DISABLE) { + if (prev_skip_weight_rls == skip_weight_rls_DISABLE || get_active_cnt() == 0) { weight_reuse == weight_reuse_DISABLE; } + else if (prev_skip_weight_rls == skip_weight_rls_ENABLE) { + weight_reuse == weight_reuse_ENABLE; + } if(skip_data_rls == skip_data_rls_DISABLE) { (datain_height+1 + pad_top + pad_bottom)*(entries+1) <= (data_bank+1) * 256; diff --git a/verif/tests/uvm_tests/cc_feature_rtest.sv b/verif/tests/uvm_tests/cc_feature_rtest.sv index 0932431f..131966ea 100644 --- a/verif/tests/uvm_tests/cc_feature_rtest.sv +++ b/verif/tests/uvm_tests/cc_feature_rtest.sv @@ -13,6 +13,8 @@ class cc_feature_rtest_cc_sdp_scenario extends nvdla_cc_sdp_scenario; constraint sce_cc_sdp_sim_constraint_for_user_extend { this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; this.cdma.datain_format == nvdla_cdma_resource::datain_format_FEATURE; this.sdp.bs_bypass == nvdla_sdp_resource::bs_bypass_YES; diff --git a/verif/tests/uvm_tests/cc_in_channel_ctest.sv b/verif/tests/uvm_tests/cc_in_channel_ctest.sv index 0d733f45..74f17af2 100644 --- a/verif/tests/uvm_tests/cc_in_channel_ctest.sv +++ b/verif/tests/uvm_tests/cc_in_channel_ctest.sv @@ -29,6 +29,8 @@ class cc_in_channel_scenario extends nvdla_cc_sdp_scenario; constraint sce_cc_sdp_sim_constraint_for_user_extend { this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; this.cdma.datain_format == nvdla_cdma_resource::datain_format_FEATURE; this.sdp.bs_bypass == nvdla_sdp_resource::bs_bypass_YES; diff --git a/verif/tests/uvm_tests/cc_in_height_ctest.sv b/verif/tests/uvm_tests/cc_in_height_ctest.sv index e13238eb..a8b5cbf6 100644 --- a/verif/tests/uvm_tests/cc_in_height_ctest.sv +++ b/verif/tests/uvm_tests/cc_in_height_ctest.sv @@ -27,6 +27,8 @@ class cc_in_height_scenario extends nvdla_cc_sdp_scenario; constraint sce_cc_sdp_sim_constraint_for_user_extend { this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; this.cdma.datain_format == nvdla_cdma_resource::datain_format_FEATURE; this.sdp.bs_bypass == nvdla_sdp_resource::bs_bypass_YES; diff --git a/verif/tests/uvm_tests/cc_in_width_ctest.sv b/verif/tests/uvm_tests/cc_in_width_ctest.sv index ed854984..8e5fc487 100644 --- a/verif/tests/uvm_tests/cc_in_width_ctest.sv +++ b/verif/tests/uvm_tests/cc_in_width_ctest.sv @@ -27,6 +27,8 @@ class cc_in_width_scenario extends nvdla_cc_sdp_scenario; constraint sce_cc_sdp_sim_constraint_for_user_extend { this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; this.cdma.datain_format == nvdla_cdma_resource::datain_format_FEATURE; this.sdp.bs_bypass == nvdla_sdp_resource::bs_bypass_YES; diff --git a/verif/tests/uvm_tests/cc_out_channel_ctest.sv b/verif/tests/uvm_tests/cc_out_channel_ctest.sv index 26b869d5..5ceb5c86 100644 --- a/verif/tests/uvm_tests/cc_out_channel_ctest.sv +++ b/verif/tests/uvm_tests/cc_out_channel_ctest.sv @@ -27,6 +27,8 @@ class cc_out_channel_scenario extends nvdla_cc_sdp_scenario; constraint sce_cc_sdp_sim_constraint_for_user_extend { this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; this.cdma.datain_format == nvdla_cdma_resource::datain_format_FEATURE; this.sdp.bs_bypass == nvdla_sdp_resource::bs_bypass_YES; diff --git a/verif/tests/uvm_tests/cc_out_height_ctest.sv b/verif/tests/uvm_tests/cc_out_height_ctest.sv index 7e24f29e..f2dde2d5 100644 --- a/verif/tests/uvm_tests/cc_out_height_ctest.sv +++ b/verif/tests/uvm_tests/cc_out_height_ctest.sv @@ -27,6 +27,8 @@ class cc_out_height_scenario extends nvdla_cc_sdp_scenario; constraint sce_cc_sdp_sim_constraint_for_user_extend { this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; this.cdma.datain_format == nvdla_cdma_resource::datain_format_FEATURE; this.sdp.bs_bypass == nvdla_sdp_resource::bs_bypass_YES; diff --git a/verif/tests/uvm_tests/cc_out_width_ctest.sv b/verif/tests/uvm_tests/cc_out_width_ctest.sv index 6e497f96..786f5dab 100644 --- a/verif/tests/uvm_tests/cc_out_width_ctest.sv +++ b/verif/tests/uvm_tests/cc_out_width_ctest.sv @@ -27,6 +27,8 @@ class cc_out_width_scenario extends nvdla_cc_sdp_scenario; constraint sce_cc_sdp_sim_constraint_for_user_extend { this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; this.cdma.datain_format == nvdla_cdma_resource::datain_format_FEATURE; this.sdp.bs_bypass == nvdla_sdp_resource::bs_bypass_YES; diff --git a/verif/tests/uvm_tests/cc_pitch_line_stride_0_ctest.sv b/verif/tests/uvm_tests/cc_pitch_line_stride_0_ctest.sv index 6093c200..52d98033 100644 --- a/verif/tests/uvm_tests/cc_pitch_line_stride_0_ctest.sv +++ b/verif/tests/uvm_tests/cc_pitch_line_stride_0_ctest.sv @@ -49,6 +49,8 @@ class cc_pitch_line_stride_0_ctest_cc_sdp_scenario extends nvdla_cc_sdp_scenario constraint sce_cc_sdp_sim_constraint_for_user_extend { cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + cdma.skip_weight_rls== nvdla_cdma_resource::skip_weight_rls_DISABLE; cdma.datain_format == nvdla_cdma_resource::datain_format_PIXEL; cdma.pixel_format == nvdla_cdma_resource::pixel_format_t'(this.pixel_format); cdma.datain_height == 0; diff --git a/verif/tests/uvm_tests/cc_pitch_line_stride_1_ctest.sv b/verif/tests/uvm_tests/cc_pitch_line_stride_1_ctest.sv index 81d69cc0..2e14baeb 100644 --- a/verif/tests/uvm_tests/cc_pitch_line_stride_1_ctest.sv +++ b/verif/tests/uvm_tests/cc_pitch_line_stride_1_ctest.sv @@ -49,6 +49,8 @@ class cc_pitch_line_stride_1_ctest_cc_sdp_scenario extends nvdla_cc_sdp_scenario constraint sce_cc_sdp_sim_constraint_for_user_extend { cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + cdma.skip_weight_rls== nvdla_cdma_resource::skip_weight_rls_DISABLE; cdma.datain_format == nvdla_cdma_resource::datain_format_PIXEL; cdma.pixel_format == nvdla_cdma_resource::pixel_format_t'(this.pixel_format); cdma.datain_height == 0; diff --git a/verif/tests/uvm_tests/cc_pitch_line_stride_2_ctest.sv b/verif/tests/uvm_tests/cc_pitch_line_stride_2_ctest.sv index 190fe60a..06d66048 100644 --- a/verif/tests/uvm_tests/cc_pitch_line_stride_2_ctest.sv +++ b/verif/tests/uvm_tests/cc_pitch_line_stride_2_ctest.sv @@ -49,6 +49,8 @@ class cc_pitch_line_stride_2_ctest_cc_sdp_scenario extends nvdla_cc_sdp_scenario constraint sce_cc_sdp_sim_constraint_for_user_extend { cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + cdma.skip_weight_rls== nvdla_cdma_resource::skip_weight_rls_DISABLE; cdma.datain_format == nvdla_cdma_resource::datain_format_PIXEL; cdma.pixel_format == nvdla_cdma_resource::pixel_format_t'(this.pixel_format); cdma.datain_height == 0; diff --git a/verif/tests/uvm_tests/cc_pitch_line_stride_3_ctest.sv b/verif/tests/uvm_tests/cc_pitch_line_stride_3_ctest.sv index b53c80d2..d8c4c5aa 100644 --- a/verif/tests/uvm_tests/cc_pitch_line_stride_3_ctest.sv +++ b/verif/tests/uvm_tests/cc_pitch_line_stride_3_ctest.sv @@ -49,6 +49,8 @@ class cc_pitch_line_stride_3_ctest_cc_sdp_scenario extends nvdla_cc_sdp_scenario constraint sce_cc_sdp_sim_constraint_for_user_extend { cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + cdma.skip_weight_rls== nvdla_cdma_resource::skip_weight_rls_DISABLE; cdma.datain_format == nvdla_cdma_resource::datain_format_PIXEL; cdma.pixel_format == nvdla_cdma_resource::pixel_format_t'(this.pixel_format); cdma.datain_height == 0; diff --git a/verif/tests/uvm_tests/cc_pitch_rtest.sv b/verif/tests/uvm_tests/cc_pitch_rtest.sv index 5606f2a3..26ed0aa7 100644 --- a/verif/tests/uvm_tests/cc_pitch_rtest.sv +++ b/verif/tests/uvm_tests/cc_pitch_rtest.sv @@ -13,6 +13,8 @@ class cc_pitch_rtest_cc_sdp_scenario extends nvdla_cc_sdp_scenario; constraint sce_cc_sdp_sim_constraint_for_user_extend { this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; this.cdma.datain_format == nvdla_cdma_resource::datain_format_PIXEL; this.sdp.bs_bypass == nvdla_sdp_resource::bs_bypass_YES; diff --git a/verif/tests/uvm_tests/cc_rtest.sv b/verif/tests/uvm_tests/cc_rtest.sv index 3ba841c8..db727877 100644 --- a/verif/tests/uvm_tests/cc_rtest.sv +++ b/verif/tests/uvm_tests/cc_rtest.sv @@ -13,6 +13,8 @@ class cc_rtest_cc_sdp_scenario extends nvdla_cc_sdp_scenario; constraint sce_cc_sdp_sim_constraint_for_user_extend { this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; } `uvm_component_utils(cc_rtest_cc_sdp_scenario) endclass: cc_rtest_cc_sdp_scenario diff --git a/verif/tests/uvm_tests/cc_sdp_pdp_rtest.sv b/verif/tests/uvm_tests/cc_sdp_pdp_rtest.sv index 37ca707b..a42d5c73 100644 --- a/verif/tests/uvm_tests/cc_sdp_pdp_rtest.sv +++ b/verif/tests/uvm_tests/cc_sdp_pdp_rtest.sv @@ -11,8 +11,10 @@ class cc_sdp_pdp_rtest_cc_sdp_pdp_scenario extends nvdla_cc_sdp_pdp_scenario; endfunction: new constraint sce_cc_sdp_pdp_sim_constraint_for_user_extend { - this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; - this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; + this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; } `uvm_component_utils(cc_sdp_pdp_rtest_cc_sdp_pdp_scenario) endclass: cc_sdp_pdp_rtest_cc_sdp_pdp_scenario diff --git a/verif/tests/uvm_tests/cc_sdprdma_sdp_pdp_rtest.sv b/verif/tests/uvm_tests/cc_sdprdma_sdp_pdp_rtest.sv index d0f4feb0..43a7b7b1 100644 --- a/verif/tests/uvm_tests/cc_sdprdma_sdp_pdp_rtest.sv +++ b/verif/tests/uvm_tests/cc_sdprdma_sdp_pdp_rtest.sv @@ -11,8 +11,10 @@ class cc_sdprdma_sdp_pdp_rtest_cc_sdprdma_sdp_pdp_scenario extends nvdla_cc_sdpr endfunction: new constraint sce_cc_sdprdma_sdp_pdp_sim_constraint_for_user_extend { - this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; - this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; + this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; } `uvm_component_utils(cc_sdprdma_sdp_pdp_rtest_cc_sdprdma_sdp_pdp_scenario) endclass: cc_sdprdma_sdp_pdp_rtest_cc_sdprdma_sdp_pdp_scenario diff --git a/verif/tests/uvm_tests/cc_sdprdma_sdp_rtest.sv b/verif/tests/uvm_tests/cc_sdprdma_sdp_rtest.sv index 232aa833..d1979c56 100644 --- a/verif/tests/uvm_tests/cc_sdprdma_sdp_rtest.sv +++ b/verif/tests/uvm_tests/cc_sdprdma_sdp_rtest.sv @@ -11,8 +11,10 @@ class cc_sdprdma_sdp_rtest_cc_sdprdma_sdp_scenario extends nvdla_cc_sdprdma_sdp_ endfunction: new constraint sce_cc_sdprdma_sdp_sim_constraint_for_user_extend { - this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; - this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; + this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; } `uvm_component_utils(cc_sdprdma_sdp_rtest_cc_sdprdma_sdp_scenario) endclass: cc_sdprdma_sdp_rtest_cc_sdprdma_sdp_scenario diff --git a/verif/tests/uvm_tests/multi_scenario_rtest.sv b/verif/tests/uvm_tests/multi_scenario_rtest.sv index 6317e209..369a4207 100644 --- a/verif/tests/uvm_tests/multi_scenario_rtest.sv +++ b/verif/tests/uvm_tests/multi_scenario_rtest.sv @@ -13,6 +13,8 @@ class multi_scenario_rtest_cc_sdp_scenario extends nvdla_cc_sdp_scenario; constraint sce_cc_sdp_sim_constraint_for_user_extend { this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; } `uvm_component_utils(multi_scenario_rtest_cc_sdp_scenario) endclass: multi_scenario_rtest_cc_sdp_scenario From 286e5201ad182ba99fef1a24004afc48520cae15 Mon Sep 17 00:00:00 2001 From: Peter Li Date: Thu, 24 May 2018 23:08:01 -0700 Subject: [PATCH 18/28] Initial verision of register accessing --- verif/tests/nvdla_test/nvdla_base_test.py | 93 +++++++++++++++++++ .../{nvdla_test.py => nvdla_function_test.py} | 0 .../tests/python_tests/nvdla_reg_accessing.py | 78 ++++++++++++++++ 3 files changed, 171 insertions(+) create mode 100755 verif/tests/nvdla_test/nvdla_base_test.py rename verif/tests/nvdla_test/{nvdla_test.py => nvdla_function_test.py} (100%) create mode 100755 verif/tests/python_tests/nvdla_reg_accessing.py diff --git a/verif/tests/nvdla_test/nvdla_base_test.py b/verif/tests/nvdla_test/nvdla_base_test.py new file mode 100755 index 00000000..c60663f7 --- /dev/null +++ b/verif/tests/nvdla_test/nvdla_base_test.py @@ -0,0 +1,93 @@ +#!/usr/bin/env python +import random +from pprint import pprint +import os + +class NvdlaBaseTest(object): + + def __init__(self, project_name, generated_trace_dir, name='nvdla_base_test'): + random.seed() + self._name = name + self._project_name = project_name + self._generated_trace_dir = generated_trace_dir + self._auto_hardware_layer_name = {} # key:scenario, value:layer_list + self._project_define_dict = {} + self._register_manual_dict = {} + self._trace_config = [] + self._is_project_define_loaded = False + self._is_register_manual_loaded = False + self.load_project_define_file(os.path.join(self._get_abs_path_to_tree_root(), 'outdir', self._project_name, 'spec/defs/project.py')) + self.load_register_manual_file(os.path.join(self._get_abs_path_to_tree_root(), 'outdir', self._project_name, 'spec/manual/opendla.py')) + + def _get_ref_path_to_tree_root(self, rel_path_to_tree_root = '.'): + ## there is a file named LICENSE, it's the marker of tree root + tree_root_marker_path = os.path.join(rel_path_to_tree_root, 'LICENSE') + if os.path.isfile(tree_root_marker_path) is False: + rel_path_to_tree_root = os.path.join('..', rel_path_to_tree_root) + rel_path_to_tree_root = self._get_ref_path_to_tree_root(rel_path_to_tree_root) + return rel_path_to_tree_root + + def _get_abs_path_to_tree_root(self): + return os.path.abspath(self._get_ref_path_to_tree_root()) + + def is_two_list_the_same(self, list_a, list_b): + return not(bool(set(list_a).difference(set(list_b)))) + + # Do some basic validation on manual before using it + ## 1. Block key list shall be the same between dict addr_spaces and dict registers + def validate_manual(self): + if self.is_two_list_the_same( self._register_manual_dict['registers'].keys(), self._register_manual_dict['addr_spaces'].keys() ) is False: + raise Exception("NvdlaTest::validate_manual", "manual registers and addr_spaces are not the same") + + # Load project definition from file + def load_project_define_file(self, project_define_file_path): + self._is_project_define_loaded = True + buffer_dict = {} + #execfile(project_define_file_path, buffer_dict) + exec(open(project_define_file_path).read(), buffer_dict) + self._project_define_dict = dict(buffer_dict['PROJVAR']) + + # Load manual from file + def load_register_manual_file(self, manual_file_path): + self._is_register_manual_loaded = True + #execfile(manual_file_path, self._register_manual_dict) + exec(open(manual_file_path).read(), self._register_manual_dict) + self.validate_manual() + + def reg_write(self, block, register, value): + block_reg_name = '.'.join([block, register]) + self._trace_config.append('write(%s, %s);' % (block_reg_name, hex(value))) + + def reg_read_check(self, block, register, value): + block_reg_name = '.'.join([block, register]) + write_mask = self._register_manual_dict['registers'][block][register]['write_mask'] + reset_mask = self._register_manual_dict['registers'][block][register]['reset_mask'] + read_mask = self._register_manual_dict['registers'][block][register]['read_mask'] + self._trace_config.append('read_check(%s, %s);' % (block_reg_name, hex(value & write_mask & read_mask))) + + def compose_test(self): + self._trace_config = [ + '//Trace start', + '//Generated by nvdla_base_test', + '//You shall override compose_test', + '//in your test', + '//Trace end', + ] + + # Generate trace dir + def generate_trace(self): + # Generate directory + origin_working_directory = os.getcwd() + os.chdir(self._generated_trace_dir) + os.mkdir(self._name) + os.chdir(self._name) + # Dump configuration to file + with open(self._name+'.cfg', 'w') as f: + f.write('\n'.join(self._trace_config)) + os.chdir(origin_working_directory) + print ("Test generation done.") + +if __name__ == '__main__': + test = NvdlaBaseTest ('nv_small', '.') + test.compose_test() + test.generate_trace() diff --git a/verif/tests/nvdla_test/nvdla_test.py b/verif/tests/nvdla_test/nvdla_function_test.py similarity index 100% rename from verif/tests/nvdla_test/nvdla_test.py rename to verif/tests/nvdla_test/nvdla_function_test.py diff --git a/verif/tests/python_tests/nvdla_reg_accessing.py b/verif/tests/python_tests/nvdla_reg_accessing.py new file mode 100755 index 00000000..22764607 --- /dev/null +++ b/verif/tests/python_tests/nvdla_reg_accessing.py @@ -0,0 +1,78 @@ +#!/usr/bin/env python +import os +import sys +sys.path.append('../nvdla_test') +from nvdla_base_test import NvdlaBaseTest + +class nvdla_reg_accesing(NvdlaBaseTest): + def __init__(self, project, trace_dir, pattern_list=[0x00000000, 0xFFFFFFFF, 0x5A5A5A5A, 0xA5A5A5A5]): + self._pattern_list = pattern_list + print('Enter nvdla_reg_accesing init') + super(nvdla_reg_accesing, self).__init__(project, trace_dir, __file__[:-3]) + + def check_reset_value(self): + for block in self._register_manual_dict['registers']: + for register in self._register_manual_dict['registers'][block]['register_list']: + reset_value = self._register_manual_dict['registers'][block][register]['reset_val'] + reset_mask = self._register_manual_dict['registers'][block][register]['reset_mask'] + read_mask = self._register_manual_dict['registers'][block][register]['read_mask'] + self._trace_config.append('read_check(%s, %s);' % ('.'.join([block, register]), hex(reset_value & reset_mask & read_mask))) + + def write_read_check_single_group(self, block): + for register in self._register_manual_dict['registers'][block]['register_list']: + for write_value in self._pattern_list: + self.reg_write(block, register, write_value) + self.reg_read_check(block, register, write_value) + + if(reg_name == "D_OP_ENABLE_0" || reg_name == "SWRESET_0") begin + continue; + end + else if(reg_name == "S_LUT_ACCESS_DATA_0") begin + continue; + end + else if(reg_name == "CFG_LAUNCH0_0" || reg_name == "CFG_LAUNCH1_0" || reg_name == "CFG_OP_0") begin + continue; + end + + def write_read_check_double_group(self, block): + bypass_register_list = [ + "D_OP_ENABLE_0", + "SWRESET_0", + "S_LUT_ACCESS_DATA_0", + "CFG_LAUNCH0_0", + "CFG_LAUNCH0_1", + "CFG_OP_0", + ] + self.reg_write(block, 'S_POINTER_0', 0x0) + self.reg_read_check(block, 'S_POINTER_0', 0x0) + for register in self._register_manual_dict['registers'][block]['register_list']: + if any(list(register == i for i in bypass_register_list)): + continue + for write_value in self._pattern_list: + self.reg_write(block, register, write_value) + self.reg_read_check(block, register, write_value) + self.reg_write(block, 'S_POINTER_0', 0x1) + self.reg_read_check(block, 'S_POINTER_0', 0x1) + for register in self._register_manual_dict['registers'][block]['register_list']: + if register.startswith('D_') and register != 'D_OP_ENABLE_0': + for write_value in self._pattern_list: + self.reg_write(block, register, write_value) + self.reg_read_check(block, register, write_value) + + def write_read_check(self): + block_check = { + } + for block in self._register_manual_dict['registers']: + block_check[block]() + + def compose_test(self): + self.check_reset_value() + self.write_read_check() + +def run(project, trace_dir): + reg_test = nvdla_reg_accesing(project, trace_dir) + reg_test.compose_test() + reg_test.generate_trace() + +if __name__ == "__main__": + run('nv_small', '.') From d51aa32d529d5b6872be70d97b2166286b505091 Mon Sep 17 00:00:00 2001 From: Peter Li Date: Fri, 25 May 2018 10:29:11 -0700 Subject: [PATCH 19/28] Add register accessing test --- .../testplans/nv_small_test_list_L0.py | 8 ++ verif/tests/nvdla_test/nvdla_base_test.py | 21 +++- .../tests/python_tests/nvdla_reg_accessing.py | 118 +++++++++++++----- verif/tools/run_test.py | 43 ++++--- 4 files changed, 140 insertions(+), 50 deletions(-) diff --git a/verif/regression/testplans/nv_small_test_list_L0.py b/verif/regression/testplans/nv_small_test_list_L0.py index e69af70d..800e80ae 100644 --- a/verif/regression/testplans/nv_small_test_list_L0.py +++ b/verif/regression/testplans/nv_small_test_list_L0.py @@ -1,4 +1,12 @@ +############################################# Register Accessing ################################### +add_test(name='nvdla_reg_accessing', + tags=['L0'], + module='nvdla_python_test', + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], + config=['nvdla_utb'], + desc='''Check reset value''') + ############################################# PDP ################################### add_test(name='pdp_8x8x32_1x1_int8_0', tags=['L0', 'pdp'], diff --git a/verif/tests/nvdla_test/nvdla_base_test.py b/verif/tests/nvdla_test/nvdla_base_test.py index c60663f7..ffe83610 100755 --- a/verif/tests/nvdla_test/nvdla_base_test.py +++ b/verif/tests/nvdla_test/nvdla_base_test.py @@ -46,6 +46,7 @@ def load_project_define_file(self, project_define_file_path): #execfile(project_define_file_path, buffer_dict) exec(open(project_define_file_path).read(), buffer_dict) self._project_define_dict = dict(buffer_dict['PROJVAR']) + #print(self._project_define_dict) # Load manual from file def load_register_manual_file(self, manual_file_path): @@ -56,14 +57,21 @@ def load_register_manual_file(self, manual_file_path): def reg_write(self, block, register, value): block_reg_name = '.'.join([block, register]) - self._trace_config.append('write(%s, %s);' % (block_reg_name, hex(value))) + self._trace_config.append('reg_write(%s, %s);' % (block_reg_name, hex(value))) def reg_read_check(self, block, register, value): block_reg_name = '.'.join([block, register]) - write_mask = self._register_manual_dict['registers'][block][register]['write_mask'] - reset_mask = self._register_manual_dict['registers'][block][register]['reset_mask'] - read_mask = self._register_manual_dict['registers'][block][register]['read_mask'] - self._trace_config.append('read_check(%s, %s);' % (block_reg_name, hex(value & write_mask & read_mask))) + read_mask = self._register_manual_dict['registers'][block][register]['read_mask'] + self._trace_config.append('reg_read_check(%s, %s);' % (block_reg_name, hex(value&read_mask))) + + def sync_notify(self, block, event_name): + self._trace_config.append('sync_notify(%s, %s);' % (block, event_name)) + + def check_nothing(self, event_name): + self._trace_config.append('check_nothing(%s);' % event_name) + + def trace_comment(self, comment_str): + self._trace_config.append('// %s;' % comment_str) def compose_test(self): self._trace_config = [ @@ -79,7 +87,8 @@ def generate_trace(self): # Generate directory origin_working_directory = os.getcwd() os.chdir(self._generated_trace_dir) - os.mkdir(self._name) + if not os.path.exists(self._name): + os.mkdir(self._name) os.chdir(self._name) # Dump configuration to file with open(self._name+'.cfg', 'w') as f: diff --git a/verif/tests/python_tests/nvdla_reg_accessing.py b/verif/tests/python_tests/nvdla_reg_accessing.py index 22764607..71227db0 100755 --- a/verif/tests/python_tests/nvdla_reg_accessing.py +++ b/verif/tests/python_tests/nvdla_reg_accessing.py @@ -1,52 +1,59 @@ #!/usr/bin/env python -import os import sys -sys.path.append('../nvdla_test') +from pathlib import Path +sys.path.append(str(Path(__file__).absolute().parents[1]/'nvdla_test')) from nvdla_base_test import NvdlaBaseTest class nvdla_reg_accesing(NvdlaBaseTest): def __init__(self, project, trace_dir, pattern_list=[0x00000000, 0xFFFFFFFF, 0x5A5A5A5A, 0xA5A5A5A5]): self._pattern_list = pattern_list print('Enter nvdla_reg_accesing init') - super(nvdla_reg_accesing, self).__init__(project, trace_dir, __file__[:-3]) + super(nvdla_reg_accesing, self).__init__(project, trace_dir, Path(__file__).stem) - def check_reset_value(self): - for block in self._register_manual_dict['registers']: - for register in self._register_manual_dict['registers'][block]['register_list']: - reset_value = self._register_manual_dict['registers'][block][register]['reset_val'] - reset_mask = self._register_manual_dict['registers'][block][register]['reset_mask'] - read_mask = self._register_manual_dict['registers'][block][register]['read_mask'] - self._trace_config.append('read_check(%s, %s);' % ('.'.join([block, register]), hex(reset_value & reset_mask & read_mask))) + def bypass_block(self, block): + self._trace_config.append('// Bypass block %s' % block) def write_read_check_single_group(self, block): + bypass_register_list = ( + "D_OP_ENABLE_0", + "S_STATUS_0", + "S_POINTER_0", + "SWRESET_0", + "S_LUT_ACCESS_DATA_0", + "CFG_LAUNCH0_0", + "CFG_LAUNCH0_1", + "CFG_OP_0", + ) for register in self._register_manual_dict['registers'][block]['register_list']: + if self._register_manual_dict['registers'][block][register]['write_mask'] == 0: + # read only register + continue + if register in bypass_register_list: + self._trace_config.append('// Bypass %s' % '.'.join([block, register])) + continue for write_value in self._pattern_list: self.reg_write(block, register, write_value) self.reg_read_check(block, register, write_value) - if(reg_name == "D_OP_ENABLE_0" || reg_name == "SWRESET_0") begin - continue; - end - else if(reg_name == "S_LUT_ACCESS_DATA_0") begin - continue; - end - else if(reg_name == "CFG_LAUNCH0_0" || reg_name == "CFG_LAUNCH1_0" || reg_name == "CFG_OP_0") begin - continue; - end - def write_read_check_double_group(self, block): - bypass_register_list = [ + bypass_register_list = ( "D_OP_ENABLE_0", + "S_STATUS_0", + "S_POINTER_0", "SWRESET_0", "S_LUT_ACCESS_DATA_0", "CFG_LAUNCH0_0", "CFG_LAUNCH0_1", "CFG_OP_0", - ] + ) self.reg_write(block, 'S_POINTER_0', 0x0) self.reg_read_check(block, 'S_POINTER_0', 0x0) for register in self._register_manual_dict['registers'][block]['register_list']: - if any(list(register == i for i in bypass_register_list)): + if self._register_manual_dict['registers'][block][register]['write_mask'] == 0: + # read only register + continue + if register in bypass_register_list: + self._trace_config.append('// Bypass %s' % '.'.join([block, register])) continue for write_value in self._pattern_list: self.reg_write(block, register, write_value) @@ -54,16 +61,69 @@ def write_read_check_double_group(self, block): self.reg_write(block, 'S_POINTER_0', 0x1) self.reg_read_check(block, 'S_POINTER_0', 0x1) for register in self._register_manual_dict['registers'][block]['register_list']: - if register.startswith('D_') and register != 'D_OP_ENABLE_0': - for write_value in self._pattern_list: - self.reg_write(block, register, write_value) - self.reg_read_check(block, register, write_value) + if self._register_manual_dict['registers'][block][register]['write_mask'] == 0: + # read only register + continue + if register in bypass_register_list: + self._trace_config.append('// Bypass %s' % '.'.join([block, register])) + continue + for write_value in self._pattern_list: + self.reg_write(block, register, write_value) + self.reg_read_check(block, register, write_value) + + def check_reset_value(self): + bug_list = [ + #'NVDLA_SDP_RDMA_D_BRDMA_CFG_0', + #'NVDLA_SDP_RDMA_D_NRDMA_CFG_0', + #'NVDLA_SDP_RDMA_D_ERDMA_CFG_0', + ] + conditional_build_block = { + 'NVDLA_CVIF':'NVDLA_SECONDARY_MEMIF_DISABLE', + 'NVDLA_BDMA':'NVDLA_BDMA_ENABLE', + 'NVDLA_RBK':'NVDLA_RBK_ENABLE', + 'NVDLA_PDP':'NVDLA_PDP_ENABLE', + 'NVDLA_CDP':'NVDLA_CDP_ENABLE', + 'NVDLA_GEC':'NVDLA_GEC_ENABLE', + } + for block in self._register_manual_dict['registers']: + if block in conditional_build_block: + if conditional_build_block[block] not in self._project_define_dict: + continue + for register in self._register_manual_dict['registers'][block]['register_list']: + block_reg = '_'.join([block, register]) + if block_reg in bug_list: + self.trace_comment("Bug in %s" % block_reg) + continue + reset_value = self._register_manual_dict['registers'][block][register]['reset_val'] + reset_mask = self._register_manual_dict['registers'][block][register]['reset_mask'] + check_value = reset_value & reset_mask + #print('Reg:%s, reset_value:%s, reset_mask:%s, read_mask:%s, check_value:%s' % (register, reset_value, reset_mask, read_mask, check_value)) + self.reg_read_check(block, register, check_value) def write_read_check(self): block_check = { + 'NVDLA_CFGROM':self.write_read_check_single_group, + 'NVDLA_MCIF':self.write_read_check_single_group, + 'NVDLA_CVIF':self.write_read_check_single_group, + 'NVDLA_BDMA':self.write_read_check_single_group, + 'NVDLA_GLB': lambda x: "nothing", + 'NVDLA_GEC': lambda x: "nothing", + } + conditional_build_block = { + 'NVDLA_CVIF':'NVDLA_SECONDARY_MEMIF_DISABLE', + 'NVDLA_BDMA':'NVDLA_BDMA_ENABLE', + 'NVDLA_RBK':'NVDLA_RBK_ENABLE', + 'NVDLA_PDP':'NVDLA_PDP_ENABLE', + 'NVDLA_CDP':'NVDLA_CDP_ENABLE', } for block in self._register_manual_dict['registers']: - block_check[block]() + if block in conditional_build_block: + if conditional_build_block[block] not in self._project_define_dict: + continue + block_check_func = block_check.get(block, self.write_read_check_double_group) + block_check_func(block) + self.sync_notify(block, block+'_done') + self.check_nothing(block+'_done') def compose_test(self): self.check_reset_value() @@ -75,4 +135,4 @@ def run(project, trace_dir): reg_test.generate_trace() if __name__ == "__main__": - run('nv_small', '.') + run(sys.argv[1], sys.argv[2]) diff --git a/verif/tools/run_test.py b/verif/tools/run_test.py index d42aa51e..291d12f4 100755 --- a/verif/tools/run_test.py +++ b/verif/tools/run_test.py @@ -9,6 +9,7 @@ import time import fcntl from pprint import pprint +from pathlib import Path import subprocess __DESCRIPTION__=''' @@ -109,29 +110,41 @@ def load_test_config(self, test_config_dict): self._dump_memory = self._config_dict['dump_memory'] def _python_test_pre_process(self): - sys.path.append(os.path.join(self._tree_root , 'verif/tests/nvdla_test')) - test_path = '' + origin_dir = os.getcwd() + dst_test_dir_path = Path(self._output_dir, self._name) + if dst_test_dir_path.is_dir(): + shutil.rmtree(dst_test_dir_path) + os.mkdir(dst_test_dir_path) + os.chdir(dst_test_dir_path) + test_path = Path(self._tree_root) test_file_name = self._name+'.py' if self._config_dict['trace_dir'] is not None: ## Trace dir has been specified - test_path = os.path.join(self._trace_dir, test_file_name) + test_path = test_path / 'verif/tests/nvdla_test' / test_file_name elif '_trace_root' in dir(self): ## Trace root has been specified - for root, dirs, files in os.walk(self._trace_root): - if self._name+'.py' in files: - self._trace_dir = root - test_path = os.path.join(root, test_file_name) - break - if 0 == len(test_path): + try: + test_path = list(Path(self._trace_root).glob('**/'+test_file_name))[0] + except: raise Exception('RunTest::_python_test_pre_process', 'Cannot found test %s under path %s' % (test_file_name, self._trace_root)) print ("Test path is %s" % test_path) - #check file existence - if os.path.isfile(test_path) is False: + # check file existence + if not test_path.is_file(): raise Exception('RunTest::_python_test_pre_process', 'test path %s is not a valid file path' % test_path) - ## Generate trace - sys.path.append(self._trace_dir) - py_test = __import__ (self._name) - py_test.run(self._project) + # generate trace dumper script + script = './run_trace_generator.sh' + with open(script, '+w') as cmd_fh: + python_interpreter = sys.executable + cmd = ' '.join([python_interpreter, str(test_path), self._project, self._output_dir]) + cmd_fh.write ('\n'.join(['#!/bin/sh\n', cmd])) + subprocess.call('chmod 755 '+script, shell=True) + print("Start dumping trace file './%s/%s.cfg':\n cmd = %s" % (self._name, self._name, cmd)) + # Generate trace + try: + subprocess.call(script, shell=True) + except OSError: + raise Exception('RunTest::_python_test_pre_process', 'Failed to generate trace file') + os.chdir(origin_dir) def _trace_test_pre_process(self): test_path = '' From 8717dfb5a7efdba307cbac502e86e7fb9a9ba3ac Mon Sep 17 00:00:00 2001 From: Peter Li Date: Tue, 5 Jun 2018 00:08:54 -0700 Subject: [PATCH 20/28] Update test plan, make register accessing test as rtl_only --- verif/regression/testplans/nv_small_test_list_L0.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/verif/regression/testplans/nv_small_test_list_L0.py b/verif/regression/testplans/nv_small_test_list_L0.py index 800e80ae..af3e38d0 100644 --- a/verif/regression/testplans/nv_small_test_list_L0.py +++ b/verif/regression/testplans/nv_small_test_list_L0.py @@ -3,7 +3,7 @@ add_test(name='nvdla_reg_accessing', tags=['L0'], module='nvdla_python_test', - args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG], + args=[FIXED_SEED_ARG, DISABLE_COMPARE_ALL_UNITS_SB_ARG, '-uwm RTL_ONLY'], config=['nvdla_utb'], desc='''Check reset value''') From e30686a68a841e9b7a61c83979f1db5ff28b824c Mon Sep 17 00:00:00 2001 From: Ellen Zhang Date: Tue, 5 Jun 2018 21:46:46 -0700 Subject: [PATCH 21/28] sdp and cacc register reset value --- vmod/nvdla/cacc/NV_NVDLA_CACC_delivery_ctrl.v | 7 +++-- vmod/nvdla/cacc/NV_NVDLA_CACC_dual_reg.v | 10 +++---- vmod/nvdla/cacc/NV_NVDLA_CACC_regfile.v | 12 ++++---- vmod/nvdla/cacc/NV_NVDLA_cacc.v | 4 +-- vmod/nvdla/sdp/NV_NVDLA_SDP_RDMA_REG_dual.v | 6 ++-- vmod/nvdla/sdp/NV_NVDLA_SDP_REG_dual.v | 30 +++++++++---------- 6 files changed, 35 insertions(+), 34 deletions(-) diff --git a/vmod/nvdla/cacc/NV_NVDLA_CACC_delivery_ctrl.v b/vmod/nvdla/cacc/NV_NVDLA_CACC_delivery_ctrl.v index 97368bba..06f577bf 100644 --- a/vmod/nvdla/cacc/NV_NVDLA_CACC_delivery_ctrl.v +++ b/vmod/nvdla/cacc/NV_NVDLA_CACC_delivery_ctrl.v @@ -49,7 +49,7 @@ input [1:0] reg2dp_proc_precision; input [12:0] reg2dp_dataout_width; input [12:0] reg2dp_dataout_height; input [12:0] reg2dp_dataout_channel; -input [26:0] reg2dp_dataout_addr; +input [31-NVDLA_MEMORY_ATOMIC_LOG2:0] reg2dp_dataout_addr; input [0:0] reg2dp_line_packed; input [0:0] reg2dp_surf_packed; input [4:0] reg2dp_batches; @@ -88,14 +88,15 @@ wire dlv_layer_end = dlv_pd[1]; ///// register input signal from regfile ///// ////////////////////////////////////////////////////////////// wire [CACC_CHANNEL_BITS-6:0] cur_channel_w = {reg2dp_dataout_channel[CACC_CHANNEL_BITS-1:5]} ; -//: my $kk= CACC_CHANNEL_BITS-5; +//: my $kk = CACC_CHANNEL_BITS-5; +//: my $aw = 32-NVDLA_MEMORY_ATOMIC_LOG2; //: &eperl::flop(" -q cur_op_en -en wait_for_op_en & \"reg2dp_op_en\" -d \"reg2dp_op_en\" -clk nvdla_core_clk -rst nvdla_core_rstn -rval 0"); //: &eperl::flop(" -q cur_conv_mode -en \"wait_for_op_en & reg2dp_op_en\" -d \"reg2dp_conv_mode\" -clk nvdla_core_clk -rst nvdla_core_rstn -rval 0"); //: &eperl::flop("-wid 2 -q cur_proc_precision -en \"wait_for_op_en & reg2dp_op_en\" -d \"reg2dp_proc_precision\" -clk nvdla_core_clk -rst nvdla_core_rstn -rval 0"); //: &eperl::flop("-wid 13 -q cur_width -en \"wait_for_op_en & reg2dp_op_en\" -d \"reg2dp_dataout_width\" -clk nvdla_core_clk -rst nvdla_core_rstn -rval 0"); //: &eperl::flop("-wid 13 -q cur_height -en \"wait_for_op_en & reg2dp_op_en\" -d \"reg2dp_dataout_height\" -clk nvdla_core_clk -rst nvdla_core_rstn -rval 0"); //: &eperl::flop("-wid ${kk} -q cur_channel -en \"wait_for_op_en & reg2dp_op_en\" -d \"cur_channel_w\" -clk nvdla_core_clk -rst nvdla_core_rstn -rval 0"); -//: &eperl::flop("-wid 27 -q cur_dataout_addr -en \"wait_for_op_en & reg2dp_op_en\" -d \"reg2dp_dataout_addr\" -clk nvdla_core_clk -rst nvdla_core_rstn -rval 0"); +//: &eperl::flop("-wid $aw -q cur_dataout_addr -en \"wait_for_op_en & reg2dp_op_en\" -d \"reg2dp_dataout_addr\" -clk nvdla_core_clk -rst nvdla_core_rstn -rval 0"); //: &eperl::flop("-wid 5 -q cur_batches -en \"wait_for_op_en & reg2dp_op_en\" -d \"reg2dp_batches\" -clk nvdla_core_clk -rst nvdla_core_rstn -rval 0"); //: &eperl::flop("-wid 24 -q cur_line_stride -en \"wait_for_op_en & reg2dp_op_en\" -d \"reg2dp_line_stride\" -clk nvdla_core_clk -rst nvdla_core_rstn -rval 0"); //: &eperl::flop("-wid 24 -q cur_surf_stride -en \"wait_for_op_en & reg2dp_op_en\" -d \"reg2dp_surf_stride\" -clk nvdla_core_clk -rst nvdla_core_rstn -rval 0"); diff --git a/vmod/nvdla/cacc/NV_NVDLA_CACC_dual_reg.v b/vmod/nvdla/cacc/NV_NVDLA_CACC_dual_reg.v index 0e6e368f..f228887a 100644 --- a/vmod/nvdla/cacc/NV_NVDLA_CACC_dual_reg.v +++ b/vmod/nvdla/cacc/NV_NVDLA_CACC_dual_reg.v @@ -64,7 +64,7 @@ input nvdla_core_rstn; output [4:0] batches; output [4:0] clip_truncate; output [31:0] cya; -output [26:0] dataout_addr; +output [31:0] dataout_addr; output line_packed; output surf_packed; output [12:0] dataout_height; @@ -93,7 +93,7 @@ reg [4:0] batches; reg [4:0] clip_truncate; reg conv_mode; reg [31:0] cya; -reg [26:0] dataout_addr; +reg [31:0] dataout_addr; reg [12:0] dataout_channel; reg [12:0] dataout_height; reg [12:0] dataout_width; @@ -124,7 +124,7 @@ wire nvdla_cacc_d_surf_stride_0_wren = (reg_offset_wr == (32'h9024 & 32'h00000f assign nvdla_cacc_d_batch_number_0_out[31:0] = { 27'b0, batches }; assign nvdla_cacc_d_clip_cfg_0_out[31:0] = { 27'b0, clip_truncate }; assign nvdla_cacc_d_cya_0_out[31:0] = { cya }; -assign nvdla_cacc_d_dataout_addr_0_out[31:0] = { dataout_addr, 5'b0 }; +assign nvdla_cacc_d_dataout_addr_0_out[31:0] = { dataout_addr}; assign nvdla_cacc_d_dataout_map_0_out[31:0] = { 15'b0, surf_packed, 15'b0, line_packed }; assign nvdla_cacc_d_dataout_size_0_0_out[31:0] = { 3'b0, dataout_height, 3'b0, dataout_width }; assign nvdla_cacc_d_dataout_size_1_0_out[31:0] = { 19'b0, dataout_channel }; @@ -205,7 +205,7 @@ always @(posedge nvdla_core_clk or negedge nvdla_core_rstn) begin batches[4:0] <= 5'b00000; clip_truncate[4:0] <= 5'b00000; cya[31:0] <= 32'b00000000000000000000000000000000; - dataout_addr[26:0] <= 27'b000000000000000000000000000; + dataout_addr[31:0] <= 32'h0; line_packed <= 1'b0; surf_packed <= 1'b0; dataout_height[12:0] <= 13'b0000000000000; @@ -233,7 +233,7 @@ always @(posedge nvdla_core_clk or negedge nvdla_core_rstn) begin // Register: NVDLA_CACC_D_DATAOUT_ADDR_0 Field: dataout_addr if (nvdla_cacc_d_dataout_addr_0_wren) begin - dataout_addr[26:0] <= reg_wr_data[31:5]; + dataout_addr[31:0] <= reg_wr_data[31:0]; end // Register: NVDLA_CACC_D_DATAOUT_MAP_0 Field: line_packed diff --git a/vmod/nvdla/cacc/NV_NVDLA_CACC_regfile.v b/vmod/nvdla/cacc/NV_NVDLA_CACC_regfile.v index df39aad3..0b8e7b7a 100644 --- a/vmod/nvdla/cacc/NV_NVDLA_CACC_regfile.v +++ b/vmod/nvdla/cacc/NV_NVDLA_CACC_regfile.v @@ -50,7 +50,7 @@ output [4:0] reg2dp_batches; output [4:0] reg2dp_clip_truncate; output reg2dp_conv_mode; output [31:0] reg2dp_cya; -output [26:0] reg2dp_dataout_addr; +output [31:0] reg2dp_dataout_addr; output [12:0] reg2dp_dataout_channel; output [12:0] reg2dp_dataout_height; output [12:0] reg2dp_dataout_width; @@ -80,7 +80,7 @@ wire [4:0] reg2dp_d0_batches; wire [4:0] reg2dp_d0_clip_truncate; wire reg2dp_d0_conv_mode; wire [31:0] reg2dp_d0_cya; -wire [26:0] reg2dp_d0_dataout_addr; +wire [31:0] reg2dp_d0_dataout_addr; wire [12:0] reg2dp_d0_dataout_channel; wire [12:0] reg2dp_d0_dataout_height; wire [12:0] reg2dp_d0_dataout_width; @@ -94,7 +94,7 @@ wire [4:0] reg2dp_d1_batches; wire [4:0] reg2dp_d1_clip_truncate; wire reg2dp_d1_conv_mode; wire [31:0] reg2dp_d1_cya; -wire [26:0] reg2dp_d1_dataout_addr; +wire [31:0] reg2dp_d1_dataout_addr; wire [12:0] reg2dp_d1_dataout_channel; wire [12:0] reg2dp_d1_dataout_height; wire [12:0] reg2dp_d1_dataout_width; @@ -149,7 +149,7 @@ reg reg2dp_d0_op_en; reg reg2dp_d0_op_en_w; reg reg2dp_d1_op_en; reg reg2dp_d1_op_en_w; -reg [26:0] reg2dp_dataout_addr; +reg [31:0] reg2dp_dataout_addr; reg [12:0] reg2dp_dataout_channel; reg [12:0] reg2dp_dataout_height; reg [12:0] reg2dp_dataout_width; @@ -193,7 +193,7 @@ NV_NVDLA_CACC_dual_reg u_dual_reg_d0 ( ,.batches (reg2dp_d0_batches[4:0]) //|> w ,.clip_truncate (reg2dp_d0_clip_truncate[4:0]) //|> w ,.cya (reg2dp_d0_cya[31:0]) //|> w - ,.dataout_addr (reg2dp_d0_dataout_addr[26:0]) //|> w + ,.dataout_addr (reg2dp_d0_dataout_addr[31:0]) //|> w ,.line_packed (reg2dp_d0_line_packed) //|> w ,.surf_packed (reg2dp_d0_surf_packed) //|> w ,.dataout_height (reg2dp_d0_dataout_height[12:0]) //|> w @@ -218,7 +218,7 @@ NV_NVDLA_CACC_dual_reg u_dual_reg_d1 ( ,.batches (reg2dp_d1_batches[4:0]) //|> w ,.clip_truncate (reg2dp_d1_clip_truncate[4:0]) //|> w ,.cya (reg2dp_d1_cya[31:0]) //|> w - ,.dataout_addr (reg2dp_d1_dataout_addr[26:0]) //|> w + ,.dataout_addr (reg2dp_d1_dataout_addr[31:0]) //|> w ,.line_packed (reg2dp_d1_line_packed) //|> w ,.surf_packed (reg2dp_d1_surf_packed) //|> w ,.dataout_height (reg2dp_d1_dataout_height[12:0]) //|> w diff --git a/vmod/nvdla/cacc/NV_NVDLA_cacc.v b/vmod/nvdla/cacc/NV_NVDLA_cacc.v index 4be2ac03..ece58073 100644 --- a/vmod/nvdla/cacc/NV_NVDLA_cacc.v +++ b/vmod/nvdla/cacc/NV_NVDLA_cacc.v @@ -116,7 +116,7 @@ wire [4:0] reg2dp_batches; wire [4:0] reg2dp_clip_truncate; wire [0:0] reg2dp_conv_mode; wire [31:0] reg2dp_cya; -wire [26:0] reg2dp_dataout_addr; +wire [31:0] reg2dp_dataout_addr; wire [12:0] reg2dp_dataout_channel; wire [12:0] reg2dp_dataout_height; wire [12:0] reg2dp_dataout_width; @@ -251,7 +251,7 @@ NV_NVDLA_CACC_delivery_ctrl u_delivery_ctrl ( ,.reg2dp_dataout_width (reg2dp_dataout_width) //|< w ,.reg2dp_dataout_height (reg2dp_dataout_height) //|< w ,.reg2dp_dataout_channel (reg2dp_dataout_channel) //|< w - ,.reg2dp_dataout_addr (reg2dp_dataout_addr) //|< w + ,.reg2dp_dataout_addr (reg2dp_dataout_addr[31:NVDLA_MEMORY_ATOMIC_LOG2]) //|< w ,.reg2dp_line_packed (reg2dp_line_packed) //|< w ,.reg2dp_surf_packed (reg2dp_surf_packed) //|< w ,.reg2dp_batches (reg2dp_batches[4:0]) //|< w diff --git a/vmod/nvdla/sdp/NV_NVDLA_SDP_RDMA_REG_dual.v b/vmod/nvdla/sdp/NV_NVDLA_SDP_RDMA_REG_dual.v index 5fddf0e0..e420b8d0 100644 --- a/vmod/nvdla/sdp/NV_NVDLA_SDP_RDMA_REG_dual.v +++ b/vmod/nvdla/sdp/NV_NVDLA_SDP_RDMA_REG_dual.v @@ -481,7 +481,7 @@ always @(posedge nvdla_core_clk or negedge nvdla_core_rstn) begin brdma_data_mode <= 1'b0; brdma_data_size <= 1'b0; brdma_data_use[1:0] <= 2'b00; - brdma_disable <= 1'b0; + brdma_disable <= 1'b1; brdma_ram_type <= 1'b0; bs_base_addr_high[31:0] <= 32'h0; bs_base_addr_low[31:0] <= {(32){1'b0}}; @@ -494,7 +494,7 @@ always @(posedge nvdla_core_clk or negedge nvdla_core_rstn) begin erdma_data_mode <= 1'b0; erdma_data_size <= 1'b0; erdma_data_use[1:0] <= 2'b00; - erdma_disable <= 1'b0; + erdma_disable <= 1'b1; erdma_ram_type <= 1'b0; ew_base_addr_high[31:0] <= 32'h0; ew_base_addr_low[31:0] <= {(32){1'b0}}; @@ -510,7 +510,7 @@ always @(posedge nvdla_core_clk or negedge nvdla_core_rstn) begin nrdma_data_mode <= 1'b0; nrdma_data_size <= 1'b0; nrdma_data_use[1:0] <= 2'b00; - nrdma_disable <= 1'b0; + nrdma_disable <= 1'b1; nrdma_ram_type <= 1'b0; perf_dma_en <= 1'b0; perf_nan_inf_count_en <= 1'b0; diff --git a/vmod/nvdla/sdp/NV_NVDLA_SDP_REG_dual.v b/vmod/nvdla/sdp/NV_NVDLA_SDP_REG_dual.v index d41e46e7..051bb9e4 100644 --- a/vmod/nvdla/sdp/NV_NVDLA_SDP_REG_dual.v +++ b/vmod/nvdla/sdp/NV_NVDLA_SDP_REG_dual.v @@ -653,11 +653,11 @@ always @(posedge nvdla_core_clk or negedge nvdla_core_rstn) begin bn_alu_src <= 1'b0; bn_alu_operand[15:0] <= 16'b0000000000000000; bn_alu_algo[1:0] <= 2'b00; - bn_alu_bypass <= 1'b0; - bn_bypass <= 1'b0; - bn_mul_bypass <= 1'b0; + bn_alu_bypass <= 1'b1; + bn_bypass <= 1'b1; + bn_mul_bypass <= 1'b1; bn_mul_prelu <= 1'b0; - bn_relu_bypass <= 1'b0; + bn_relu_bypass <= 1'b1; bn_mul_shift_value[7:0] <= 8'b00000000; bn_mul_src <= 1'b0; bn_mul_operand[15:0] <= 16'b0000000000000000; @@ -665,27 +665,27 @@ always @(posedge nvdla_core_clk or negedge nvdla_core_rstn) begin bs_alu_src <= 1'b0; bs_alu_operand[15:0] <= 16'b0000000000000000; bs_alu_algo[1:0] <= 2'b00; - bs_alu_bypass <= 1'b0; - bs_bypass <= 1'b0; - bs_mul_bypass <= 1'b0; - bs_mul_prelu <= 1'b0; - bs_relu_bypass <= 1'b0; + bs_alu_bypass <= 1'b1; + bs_bypass <= 1'b1; + bs_mul_bypass <= 1'b1; + bs_mul_prelu <= 1'b1; + bs_relu_bypass <= 1'b1; bs_mul_shift_value[7:0] <= 8'b00000000; bs_mul_src <= 1'b0; bs_mul_operand[15:0] <= 16'b0000000000000000; - ew_alu_cvt_bypass <= 1'b0; + ew_alu_cvt_bypass <= 1'b1; ew_alu_src <= 1'b0; ew_alu_cvt_offset[31:0] <= 32'h0; ew_alu_cvt_scale[15:0] <= 16'b0000000000000000; ew_alu_cvt_truncate[5:0] <= 6'b000000; ew_alu_operand[31:0] <= 32'h0; ew_alu_algo[1:0] <= 2'b00; - ew_alu_bypass <= 1'b0; - ew_bypass <= 1'b0; - ew_lut_bypass <= 1'b0; - ew_mul_bypass <= 1'b0; + ew_alu_bypass <= 1'b1; + ew_bypass <= 1'b1; + ew_lut_bypass <= 1'b1; + ew_mul_bypass <= 1'b1; ew_mul_prelu <= 1'b0; - ew_mul_cvt_bypass <= 1'b0; + ew_mul_cvt_bypass <= 1'b1; ew_mul_src <= 1'b0; ew_mul_cvt_offset[31:0] <= 32'h0; ew_mul_cvt_scale[15:0] <= 16'b0000000000000000; From 00183f5bc25a8b6ac2c8e98562334e800c797f67 Mon Sep 17 00:00:00 2001 From: sgong Date: Tue, 5 Jun 2018 23:31:19 -0700 Subject: [PATCH 22/28] fix csc register weight/WMB byte scan bug --- vmod/nvdla/csc/NV_NVDLA_CSC_dual_reg.v | 20 ++++++++++---------- vmod/nvdla/csc/NV_NVDLA_CSC_regfile.v | 24 ++++++++++++------------ vmod/nvdla/csc/NV_NVDLA_CSC_wl.v | 9 +++++---- vmod/nvdla/csc/NV_NVDLA_csc.v | 12 ++++++------ 4 files changed, 33 insertions(+), 32 deletions(-) diff --git a/vmod/nvdla/csc/NV_NVDLA_CSC_dual_reg.v b/vmod/nvdla/csc/NV_NVDLA_CSC_dual_reg.v index 6c559b57..3886d7d4 100644 --- a/vmod/nvdla/csc/NV_NVDLA_CSC_dual_reg.v +++ b/vmod/nvdla/csc/NV_NVDLA_CSC_dual_reg.v @@ -124,13 +124,13 @@ output op_en_trigger; output [1:0] y_extension; output [1:0] pra_truncate; output [11:0] rls_slices; -output [24:0] weight_bytes; +output [31:0] weight_bytes; output weight_format; output [4:0] weight_height_ext; output [4:0] weight_width_ext; output [12:0] weight_channel_ext; output [12:0] weight_kernel; -output [20:0] wmb_bytes; +output [27:0] wmb_bytes; output [4:0] pad_left; output [4:0] pad_top; output [15:0] pad_value; @@ -174,14 +174,14 @@ reg [11:0] rls_slices; reg skip_data_rls; reg skip_weight_rls; reg [4:0] weight_bank; -reg [24:0] weight_bytes; +reg [31:0] weight_bytes; reg [12:0] weight_channel_ext; reg weight_format; reg [4:0] weight_height_ext; reg [12:0] weight_kernel; reg weight_reuse; reg [4:0] weight_width_ext; -reg [20:0] wmb_bytes; +reg [27:0] wmb_bytes; reg [4:0] x_dilation_ext; reg [4:0] y_dilation_ext; reg [1:0] y_extension; @@ -232,11 +232,11 @@ assign nvdla_csc_d_op_enable_0_out[31:0] = { 31'b0, op_en }; assign nvdla_csc_d_post_y_extension_0_out[31:0] = { 30'b0, y_extension }; assign nvdla_csc_d_pra_cfg_0_out[31:0] = { 30'b0, pra_truncate }; assign nvdla_csc_d_release_0_out[31:0] = { 20'b0, rls_slices }; -assign nvdla_csc_d_weight_bytes_0_out[31:0] = { weight_bytes, 7'b0 }; +assign nvdla_csc_d_weight_bytes_0_out[31:0] = weight_bytes; assign nvdla_csc_d_weight_format_0_out[31:0] = { 31'b0, weight_format }; assign nvdla_csc_d_weight_size_ext_0_0_out[31:0] = { 11'b0, weight_height_ext, 11'b0, weight_width_ext }; assign nvdla_csc_d_weight_size_ext_1_0_out[31:0] = { 3'b0, weight_kernel, 3'b0, weight_channel_ext }; -assign nvdla_csc_d_wmb_bytes_0_out[31:0] = { 4'b0, wmb_bytes, 7'b0 }; +assign nvdla_csc_d_wmb_bytes_0_out[31:0] = { 4'b0, wmb_bytes}; assign nvdla_csc_d_zero_padding_0_out[31:0] = { 11'b0, pad_top, 11'b0, pad_left }; assign nvdla_csc_d_zero_padding_value_0_out[31:0] = { 16'b0, pad_value }; @@ -383,13 +383,13 @@ always @(posedge nvdla_core_clk or negedge nvdla_core_rstn) begin y_extension[1:0] <= 2'b00; pra_truncate[1:0] <= 2'b00; rls_slices[11:0] <= 12'b000000000001; - weight_bytes[24:0] <= 25'b0000000000000000000000000; + weight_bytes[31:0] <= 32'b00000000000000000000000000000000; weight_format <= 1'b0; weight_height_ext[4:0] <= 5'b00000; weight_width_ext[4:0] <= 5'b00000; weight_channel_ext[12:0] <= 13'b0000000000000; weight_kernel[12:0] <= 13'b0000000000000; - wmb_bytes[20:0] <= 21'b000000000000000000000; + wmb_bytes[27:0] <= 28'b0000000000000000000000000000; pad_left[4:0] <= 5'b00000; pad_top[4:0] <= 5'b00000; pad_value[15:0] <= 16'b0000000000000000; @@ -533,7 +533,7 @@ always @(posedge nvdla_core_clk or negedge nvdla_core_rstn) begin // Register: NVDLA_CSC_D_WEIGHT_BYTES_0 Field: weight_bytes if (nvdla_csc_d_weight_bytes_0_wren) begin - weight_bytes[24:0] <= reg_wr_data[31:7]; + weight_bytes[31:0] <= reg_wr_data[31:0]; end // Register: NVDLA_CSC_D_WEIGHT_FORMAT_0 Field: weight_format @@ -563,7 +563,7 @@ always @(posedge nvdla_core_clk or negedge nvdla_core_rstn) begin // Register: NVDLA_CSC_D_WMB_BYTES_0 Field: wmb_bytes if (nvdla_csc_d_wmb_bytes_0_wren) begin - wmb_bytes[20:0] <= reg_wr_data[27:7]; + wmb_bytes[27:0] <= reg_wr_data[27:0]; end // Register: NVDLA_CSC_D_ZERO_PADDING_0 Field: pad_left diff --git a/vmod/nvdla/csc/NV_NVDLA_CSC_regfile.v b/vmod/nvdla/csc/NV_NVDLA_CSC_regfile.v index 3e495a39..67b108b0 100644 --- a/vmod/nvdla/csc/NV_NVDLA_CSC_regfile.v +++ b/vmod/nvdla/csc/NV_NVDLA_CSC_regfile.v @@ -95,14 +95,14 @@ output [11:0] reg2dp_rls_slices; output reg2dp_skip_data_rls; output reg2dp_skip_weight_rls; output [4:0] reg2dp_weight_bank; -output [24:0] reg2dp_weight_bytes; +output [31:0] reg2dp_weight_bytes; output [12:0] reg2dp_weight_channel_ext; output reg2dp_weight_format; output [4:0] reg2dp_weight_height_ext; output [12:0] reg2dp_weight_kernel; output reg2dp_weight_reuse; output [4:0] reg2dp_weight_width_ext; -output [20:0] reg2dp_wmb_bytes; +output [27:0] reg2dp_wmb_bytes; output [4:0] reg2dp_x_dilation_ext; output [4:0] reg2dp_y_dilation_ext; output [1:0] reg2dp_y_extension; @@ -149,14 +149,14 @@ wire [11:0] reg2dp_d0_rls_slices; wire reg2dp_d0_skip_data_rls; wire reg2dp_d0_skip_weight_rls; wire [4:0] reg2dp_d0_weight_bank; -wire [24:0] reg2dp_d0_weight_bytes; +wire [31:0] reg2dp_d0_weight_bytes; wire [12:0] reg2dp_d0_weight_channel_ext; wire reg2dp_d0_weight_format; wire [4:0] reg2dp_d0_weight_height_ext; wire [12:0] reg2dp_d0_weight_kernel; wire reg2dp_d0_weight_reuse; wire [4:0] reg2dp_d0_weight_width_ext; -wire [20:0] reg2dp_d0_wmb_bytes; +wire [27:0] reg2dp_d0_wmb_bytes; wire [4:0] reg2dp_d0_x_dilation_ext; wire [4:0] reg2dp_d0_y_dilation_ext; wire [1:0] reg2dp_d0_y_extension; @@ -187,14 +187,14 @@ wire [11:0] reg2dp_d1_rls_slices; wire reg2dp_d1_skip_data_rls; wire reg2dp_d1_skip_weight_rls; wire [4:0] reg2dp_d1_weight_bank; -wire [24:0] reg2dp_d1_weight_bytes; +wire [31:0] reg2dp_d1_weight_bytes; wire [12:0] reg2dp_d1_weight_channel_ext; wire reg2dp_d1_weight_format; wire [4:0] reg2dp_d1_weight_height_ext; wire [12:0] reg2dp_d1_weight_kernel; wire reg2dp_d1_weight_reuse; wire [4:0] reg2dp_d1_weight_width_ext; -wire [20:0] reg2dp_d1_wmb_bytes; +wire [27:0] reg2dp_d1_wmb_bytes; wire [4:0] reg2dp_d1_x_dilation_ext; wire [4:0] reg2dp_d1_y_dilation_ext; wire [1:0] reg2dp_d1_y_extension; @@ -257,14 +257,14 @@ reg [11:0] reg2dp_rls_slices; reg reg2dp_skip_data_rls; reg reg2dp_skip_weight_rls; reg [4:0] reg2dp_weight_bank; -reg [24:0] reg2dp_weight_bytes; +reg [31:0] reg2dp_weight_bytes; reg [12:0] reg2dp_weight_channel_ext; reg reg2dp_weight_format; reg [4:0] reg2dp_weight_height_ext; reg [12:0] reg2dp_weight_kernel; reg reg2dp_weight_reuse; reg [4:0] reg2dp_weight_width_ext; -reg [20:0] reg2dp_wmb_bytes; +reg [27:0] reg2dp_wmb_bytes; reg [4:0] reg2dp_x_dilation_ext; reg [4:0] reg2dp_y_dilation_ext; reg [1:0] reg2dp_y_extension; @@ -326,13 +326,13 @@ NV_NVDLA_CSC_dual_reg u_dual_reg_d0 ( ,.y_extension (reg2dp_d0_y_extension[1:0]) //|> w ,.pra_truncate (reg2dp_d0_pra_truncate[1:0]) //|> w ,.rls_slices (reg2dp_d0_rls_slices[11:0]) //|> w - ,.weight_bytes (reg2dp_d0_weight_bytes[24:0]) //|> w + ,.weight_bytes (reg2dp_d0_weight_bytes[31:0]) //|> w ,.weight_format (reg2dp_d0_weight_format) //|> w ,.weight_height_ext (reg2dp_d0_weight_height_ext[4:0]) //|> w ,.weight_width_ext (reg2dp_d0_weight_width_ext[4:0]) //|> w ,.weight_channel_ext (reg2dp_d0_weight_channel_ext[12:0]) //|> w ,.weight_kernel (reg2dp_d0_weight_kernel[12:0]) //|> w - ,.wmb_bytes (reg2dp_d0_wmb_bytes[20:0]) //|> w + ,.wmb_bytes (reg2dp_d0_wmb_bytes[27:0]) //|> w ,.pad_left (reg2dp_d0_pad_left[4:0]) //|> w ,.pad_top (reg2dp_d0_pad_top[4:0]) //|> w ,.pad_value (reg2dp_d0_pad_value[15:0]) //|> w @@ -374,13 +374,13 @@ NV_NVDLA_CSC_dual_reg u_dual_reg_d1 ( ,.y_extension (reg2dp_d1_y_extension[1:0]) //|> w ,.pra_truncate (reg2dp_d1_pra_truncate[1:0]) //|> w ,.rls_slices (reg2dp_d1_rls_slices[11:0]) //|> w - ,.weight_bytes (reg2dp_d1_weight_bytes[24:0]) //|> w + ,.weight_bytes (reg2dp_d1_weight_bytes[31:0]) //|> w ,.weight_format (reg2dp_d1_weight_format) //|> w ,.weight_height_ext (reg2dp_d1_weight_height_ext[4:0]) //|> w ,.weight_width_ext (reg2dp_d1_weight_width_ext[4:0]) //|> w ,.weight_channel_ext (reg2dp_d1_weight_channel_ext[12:0]) //|> w ,.weight_kernel (reg2dp_d1_weight_kernel[12:0]) //|> w - ,.wmb_bytes (reg2dp_d1_wmb_bytes[20:0]) //|> w + ,.wmb_bytes (reg2dp_d1_wmb_bytes[27:0]) //|> w ,.pad_left (reg2dp_d1_pad_left[4:0]) //|> w ,.pad_top (reg2dp_d1_pad_top[4:0]) //|> w ,.pad_value (reg2dp_d1_pad_value[15:0]) //|> w diff --git a/vmod/nvdla/csc/NV_NVDLA_CSC_wl.v b/vmod/nvdla/csc/NV_NVDLA_CSC_wl.v index 445c4870..99cfd201 100644 --- a/vmod/nvdla/csc/NV_NVDLA_CSC_wl.v +++ b/vmod/nvdla/csc/NV_NVDLA_CSC_wl.v @@ -119,8 +119,8 @@ input [1:0] reg2dp_y_extension; input [0:0] reg2dp_weight_reuse; input [0:0] reg2dp_skip_weight_rls; input [0:0] reg2dp_weight_format; -input [24:0] reg2dp_weight_bytes; -input [20:0] reg2dp_wmb_bytes; +input [31:0] reg2dp_weight_bytes; +input [27:0] reg2dp_wmb_bytes; input [4:0] reg2dp_data_bank; input [4:0] reg2dp_weight_bank; @@ -486,11 +486,12 @@ assign {mon_weight_bank_w,weight_bank_w} = reg2dp_weight_bank + 1'b1; //assign is_int8 = (reg2dp_proc_precision == 2'h0 ); assign is_compressed = (reg2dp_weight_format == 1'h1 ); assign {sub_h_total_w,mon_sub_h_total_w} = (6'h9 << reg2dp_y_extension); -assign last_wmb_entries_w = is_compressed_d1 ? reg2dp_wmb_bytes[8 :0] : 9'b0; +assign last_wmb_entries_w = is_compressed_d1 ? reg2dp_wmb_bytes[8+LOG2_ATOMC :LOG2_ATOMC] : 9'b0; //: my $kk=CSC_ENTRIES_NUM_WIDTH; +//: my $jj=LOG2_ATOMC; //: &eperl::flop("-nodeclare -rval \"{5{1'b0}}\" -en \"layer_st\" -d \"data_bank_w\" -q data_bank"); //: &eperl::flop("-nodeclare -rval \"{5{1'b0}}\" -en \"layer_st\" -d \"weight_bank_w\" -q weight_bank"); -//: &eperl::flop("-nodeclare -rval \"{${kk}{1'b0}}\" -en \"is_sg_done & reg2dp_skip_weight_rls\" -d \"reg2dp_weight_bytes[${kk}-1:0]\" -q last_weight_entries"); +//: &eperl::flop("-nodeclare -rval \"{${kk}{1'b0}}\" -en \"is_sg_done & reg2dp_skip_weight_rls\" -d \"reg2dp_weight_bytes[${kk}-1+${jj}:${jj}]\" -q last_weight_entries"); //: &eperl::flop("-nodeclare -rval \"{9{1'b0}}\" -en \"is_sg_done & reg2dp_skip_weight_rls\" -d \"last_wmb_entries_w\" -q last_wmb_entries"); //: &eperl::flop("-nodeclare -rval \"3'h1\" -en \"layer_st\" -d \"sub_h_total_w\" -q sub_h_total"); //: &eperl::flop("-nodeclare -rval \"1'b0\" -en \"layer_st\" -d \"is_compressed\" -q is_compressed_d1"); diff --git a/vmod/nvdla/csc/NV_NVDLA_csc.v b/vmod/nvdla/csc/NV_NVDLA_csc.v index 58783b42..ba471c1b 100644 --- a/vmod/nvdla/csc/NV_NVDLA_csc.v +++ b/vmod/nvdla/csc/NV_NVDLA_csc.v @@ -198,14 +198,14 @@ wire [11:0] reg2dp_rls_slices; wire [0:0] reg2dp_skip_data_rls; wire [0:0] reg2dp_skip_weight_rls; wire [4:0] reg2dp_weight_bank; -wire [24:0] reg2dp_weight_bytes; +wire [31:0] reg2dp_weight_bytes; wire [12:0] reg2dp_weight_channel_ext; wire [0:0] reg2dp_weight_format; wire [4:0] reg2dp_weight_height_ext; wire [12:0] reg2dp_weight_kernel; wire [0:0] reg2dp_weight_reuse; wire [4:0] reg2dp_weight_width_ext; -wire [20:0] reg2dp_wmb_bytes; +wire [27:0] reg2dp_wmb_bytes; wire [4:0] reg2dp_x_dilation_ext; wire [4:0] reg2dp_y_dilation_ext; wire [1:0] reg2dp_y_extension; @@ -259,14 +259,14 @@ NV_NVDLA_CSC_regfile u_regfile ( ,.reg2dp_skip_data_rls (reg2dp_skip_data_rls) //|> w ,.reg2dp_skip_weight_rls (reg2dp_skip_weight_rls) //|> w ,.reg2dp_weight_bank (reg2dp_weight_bank[4:0]) //|> w - ,.reg2dp_weight_bytes (reg2dp_weight_bytes[24:0]) //|> w + ,.reg2dp_weight_bytes (reg2dp_weight_bytes[31:0]) //|> w ,.reg2dp_weight_channel_ext (reg2dp_weight_channel_ext[12:0]) //|> w ,.reg2dp_weight_format (reg2dp_weight_format) //|> w ,.reg2dp_weight_height_ext (reg2dp_weight_height_ext[4:0]) //|> w ,.reg2dp_weight_kernel (reg2dp_weight_kernel[12:0]) //|> w ,.reg2dp_weight_reuse (reg2dp_weight_reuse) //|> w ,.reg2dp_weight_width_ext (reg2dp_weight_width_ext[4:0]) //|> w - ,.reg2dp_wmb_bytes (reg2dp_wmb_bytes[20:0]) //|> w + ,.reg2dp_wmb_bytes (reg2dp_wmb_bytes[27:0]) //|> w ,.reg2dp_x_dilation_ext (reg2dp_x_dilation_ext[4:0]) //|> w ,.reg2dp_y_dilation_ext (reg2dp_y_dilation_ext[4:0]) //|> w ,.reg2dp_y_extension (reg2dp_y_extension[1:0]) //|> w @@ -378,8 +378,8 @@ NV_NVDLA_CSC_wl u_wl ( ,.reg2dp_weight_reuse (reg2dp_weight_reuse[0]) //|< w ,.reg2dp_skip_weight_rls (reg2dp_skip_weight_rls[0]) //|< w ,.reg2dp_weight_format (reg2dp_weight_format[0]) //|< w - ,.reg2dp_weight_bytes (reg2dp_weight_bytes[24:0]) //|< w - ,.reg2dp_wmb_bytes (reg2dp_wmb_bytes[20:0]) //|< w + ,.reg2dp_weight_bytes (reg2dp_weight_bytes[31:0]) //|< w + ,.reg2dp_wmb_bytes (reg2dp_wmb_bytes[27:0]) //|< w ,.reg2dp_data_bank (reg2dp_data_bank[4:0]) //|< w ,.reg2dp_weight_bank (reg2dp_weight_bank[4:0]) //|< w ); From b15c99eecea1039045a728bf73335fc26918c33a Mon Sep 17 00:00:00 2001 From: rayz Date: Thu, 7 Jun 2018 00:10:20 -0700 Subject: [PATCH 23/28] add args for extra options to run_plan command --- verif/regression/scripts/run_regression.py | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/verif/regression/scripts/run_regression.py b/verif/regression/scripts/run_regression.py index 15682aa5..76e21b8d 100755 --- a/verif/regression/scripts/run_regression.py +++ b/verif/regression/scripts/run_regression.py @@ -8,8 +8,8 @@ import shutil import glob import json -from pprint import pprint -from datetime import datetime +from pprint import pprint +from datetime import datetime __DESCRIPTION__=''' Use for running regression @@ -157,6 +157,8 @@ def kill_running_tests(run_dir): help='Python version which contains plotly lib') parser.add_argument('--en_cov', '-en_cov', dest='en_cov', required=False, default=False, action='store_true', help='Enable coverage in project build process') + parser.add_argument('--extra_args', '-extra_args', dest='extra_args', required=False, type=str, default='', + help='Extra arguments which will be appended to run_plan command line') config = vars( parser.parse_args() ) config['and_tag_list'] = [] if config['and_tag_list'] is None else [item for sublist in config['and_tag_list'] for item in sublist] config['or_tag_list'] = [] if config['or_tag_list'] is None else [item for sublist in config['or_tag_list'] for item in sublist] @@ -183,7 +185,8 @@ def kill_running_tests(run_dir): if config['not_tag_list']: args_list.append("-ntag %s" % ' '.join(config['not_tag_list'])) args_list.append("-seed %d" % config['seed']) - args = ' '.join(args_list) + args = ' '.join(args_list) + args += ' '+config['extra_args'] #pprint (config) project_name = config['project'] if not config['skip_build']: @@ -202,11 +205,11 @@ def kill_running_tests(run_dir): ret=run_plan(config['project'], project_name, '-otag L0 L1 L2 %s -run_dir %s' % (args, run_dir), lsf_cmd, dry_run) ret=run_report(run_dir, publish_dir, '-monitor_timeout %d' % max_regression_time, 'passing_rate:L0 passing_rate:L1 passing_rate:L2', dry_run) elif 'random' == config['kind']: - ret=run_plan(config['project'], project_name, '-otag L10 L11 -l_num 4 -r_num 5 %s -run_dir %s' % (args, run_dir), lsf_cmd, dry_run) + ret=run_plan(config['project'], project_name, '-otag L10 L11 %s -run_dir %s' % (args, run_dir), lsf_cmd, dry_run) ret=run_report(run_dir, publish_dir, '-monitor_timeout %d' % max_regression_time, 'passing_rate:L10 passing_rate:L11', dry_run) elif 'coverage' == config['kind']: - ret=run_plan(config['project'], project_name, '-otag L0 L1 L2 L10 L11 L20 -l_num 4 -r_num 4 %s -run_dir %s -en_cov' % (args, run_dir), lsf_cmd, dry_run) - ret=run_report(run_dir, publish_dir, '-monitor_timeout %d' % max_regression_time, 'passing_rate:L0 passing_rate:L1 passing_rate:L2 passing_rate:L10 passing_rate:L11 passing_rate:L20', dry_run) + ret=run_plan(config['project'], project_name, '-otag L0 L1 L2 L10 L11 L20 L21 %s -run_dir %s -en_cov' % (args, run_dir), lsf_cmd, dry_run) + ret=run_report(run_dir, publish_dir, '-monitor_timeout %d' % max_regression_time, 'passing_rate:L0 passing_rate:L1 passing_rate:L2 passing_rate:L10 passing_rate:L11 passing_rate:L20 passing_rate:L21', dry_run) regr_sts_file = ''.join(glob.glob('{}/regression_status_*.json'.format(run_dir))) with open(regr_sts_file, 'r') as fh: regr_db = json.load(fh) @@ -216,7 +219,7 @@ def kill_running_tests(run_dir): shutil.move(cov_vdb_dir, run_dir) shutil.move(cov_report_dir, run_dir) elif 'all' == config['kind']: - ret=run_plan(config['project'], project_name, '-l_num 5 -r_num 10 %s -run_dir %s' % (args, run_dir), lsf_cmd, dry_run) + ret=run_plan(config['project'], project_name, '%s -run_dir %s' % (args, run_dir), lsf_cmd, dry_run) ret=run_report(run_dir, publish_dir, '-monitor_timeout %d' % max_regression_time, 'passing_rate:L0 passing_rate:L1 passing_rate:L2 passing_rate:L10 passing_rate:L11', dry_run) if 0 == ret: print ("REGRESSION_PASS") From e3ccdf5e751c3ad08633e8e5802c4f5ee4bca389 Mon Sep 17 00:00:00 2001 From: rayz Date: Sun, 10 Jun 2018 21:19:29 -0700 Subject: [PATCH 24/28] disable cc resue config in multi-scenarios test --- verif/tests/uvm_tests/multi_scenario_rtest.sv | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/verif/tests/uvm_tests/multi_scenario_rtest.sv b/verif/tests/uvm_tests/multi_scenario_rtest.sv index 369a4207..67683d12 100644 --- a/verif/tests/uvm_tests/multi_scenario_rtest.sv +++ b/verif/tests/uvm_tests/multi_scenario_rtest.sv @@ -19,6 +19,48 @@ class multi_scenario_rtest_cc_sdp_scenario extends nvdla_cc_sdp_scenario; `uvm_component_utils(multi_scenario_rtest_cc_sdp_scenario) endclass: multi_scenario_rtest_cc_sdp_scenario +class multi_scenario_rtest_cc_sdp_pdp_scenario extends nvdla_cc_sdp_pdp_scenario; + function new(string name="multi_scenario_rtest_cc_sdp_pdp_scenario", uvm_component parent); + super.new(name, parent); + endfunction: new + + constraint sce_cc_sdp_pdp_sim_constraint_for_user_extend { + this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; + this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; + } + `uvm_component_utils(multi_scenario_rtest_cc_sdp_pdp_scenario) +endclass: multi_scenario_rtest_cc_sdp_pdp_scenario + +class multi_scenario_rtest_cc_sdprdma_sdp_pdp_scenario extends nvdla_cc_sdprdma_sdp_pdp_scenario; + function new(string name="multi_scenario_rtest_cc_sdprdma_sdp_pdp_scenario", uvm_component parent); + super.new(name, parent); + endfunction: new + + constraint sce_cc_sdprdma_sdp_pdp_sim_constraint_for_user_extend { + this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; + this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; + } + `uvm_component_utils(multi_scenario_rtest_cc_sdprdma_sdp_pdp_scenario) +endclass: multi_scenario_rtest_cc_sdprdma_sdp_pdp_scenario + +class multi_scenario_rtest_cc_sdprdma_sdp_scenario extends nvdla_cc_sdprdma_sdp_scenario; + function new(string name="multi_scenario_rtest_cc_sdprdma_sdp_scenario", uvm_component parent); + super.new(name, parent); + endfunction: new + + constraint sce_cc_sdprdma_sdp_sim_constraint_for_user_extend { + this.cdma.data_reuse == nvdla_cdma_resource::data_reuse_DISABLE; + this.cdma.weight_reuse == nvdla_cdma_resource::weight_reuse_DISABLE; + this.cdma.skip_data_rls == nvdla_cdma_resource::skip_data_rls_DISABLE; + this.cdma.skip_weight_rls == nvdla_cdma_resource::skip_weight_rls_DISABLE; + } + `uvm_component_utils(multi_scenario_rtest_cc_sdprdma_sdp_scenario) +endclass: multi_scenario_rtest_cc_sdprdma_sdp_scenario + class multi_scenario_rtest extends nvdla_tg_base_test; function new(string name="multi_scenario_rtest", uvm_component parent); @@ -33,6 +75,9 @@ class multi_scenario_rtest extends nvdla_tg_base_test; `uvm_info(inst_name,$sformatf("Layers = %0d ",layers),UVM_HIGH); set_type_override_by_type(nvdla_cc_sdp_scenario::get_type(), multi_scenario_rtest_cc_sdp_scenario::get_type()); + set_type_override_by_type(nvdla_cc_sdp_pdp_scenario::get_type(), multi_scenario_rtest_cc_sdp_pdp_scenario::get_type()); + set_type_override_by_type(nvdla_cc_sdprdma_sdp_scenario::get_type(), multi_scenario_rtest_cc_sdprdma_sdp_scenario::get_type()); + set_type_override_by_type(nvdla_cc_sdprdma_sdp_pdp_scenario::get_type(), multi_scenario_rtest_cc_sdprdma_sdp_pdp_scenario::get_type()); endfunction: build_phase `uvm_component_utils(multi_scenario_rtest) From f08c82818485352a4771123352fe7a18113f0bcd Mon Sep 17 00:00:00 2001 From: sgong Date: Sun, 10 Jun 2018 23:45:37 -0700 Subject: [PATCH 25/28] fix image pixel_cnt bug for read jumping --- vmod/nvdla/csc/NV_NVDLA_CSC_dl.v | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/vmod/nvdla/csc/NV_NVDLA_CSC_dl.v b/vmod/nvdla/csc/NV_NVDLA_CSC_dl.v index 0e9d51f0..4daa4d34 100644 --- a/vmod/nvdla/csc/NV_NVDLA_CSC_dl.v +++ b/vmod/nvdla/csc/NV_NVDLA_CSC_dl.v @@ -1110,12 +1110,26 @@ assign pixel_x_cnt_add = (is_sub_h_end) ? pixel_x_add : 6'b0; // (is_stripe_end & ~dl_block_end) ? {1'b0, pixel_w_ori} : // (pixel_w_cnt + pixel_x_cnt_add); +//channel count. +wire [12:0] total_channel_op = (reg2dp_weight_channel_ext[LOG2_ATOMC-1:0]=={LOG2_ATOMC{1'b0}}) ? + reg2dp_weight_channel_ext[12:LOG2_ATOMC] : reg2dp_weight_channel_ext[12:LOG2_ATOMC]+1'b1; + +reg [12:0] channel_op_cnt; +wire mon_channel_op_cnt_nxt; +wire [12:0] channel_op_cnt_nxt; +assign {mon_channel_op_cnt_nxt, channel_op_cnt_nxt} = dl_channel_end&is_stripe_end ? 13'h2 : + dl_block_end&is_stripe_end ? channel_op_cnt + 1'b1 : + channel_op_cnt; +//: &eperl::flop("-q channel_op_cnt -d \"channel_op_cnt_nxt\" -wid 13 -rval \"13'h2\" -nodeclare "); +wire next_is_last_channel = (channel_op_cnt >= total_channel_op); //notice, after pre-extention, image weight w_total <=128 assign {mon_pixel_w_cnt_w,pixel_w_cnt_w} = (layer_st_d1) ? {{11{1'b0}}, pixel_x_init} : (is_stripe_end & dl_block_end & dl_channel_end & is_w_end) ? {{11{1'b0}}, pixel_x_init} : (is_stripe_end & dl_block_end & dl_channel_end & ~is_w_end) ? (pixel_w_ch_ori + pixel_ch_stride) : - (is_stripe_end & dl_block_end & ~dl_channel_end) ? (pixel_w_ori + dl_in_pd_d0[16:10]) : + //(is_stripe_end & dl_block_end & ~dl_channel_end) ? (pixel_w_ori + dl_in_pd_d0[16:10]) : + (is_stripe_end & dl_block_end & next_is_last_channel) ? (pixel_w_ori + pixel_x_init_offset) : + (is_stripe_end & dl_block_end & ~next_is_last_channel) ? (pixel_w_ori + CSC_ENTRY_HEX) : (is_stripe_end & ~dl_block_end) ? {1'b0, pixel_w_ori} : (pixel_w_cnt + pixel_x_cnt_add); From fabba5f83f6af47272f2a611bb0cea2d1e80fedb Mon Sep 17 00:00:00 2001 From: sgong Date: Fri, 15 Jun 2018 01:43:34 -0700 Subject: [PATCH 26/28] fix vivado synthesis error, lint modification --- vmod/nvdla/cdma/NV_NVDLA_CDMA_dc.v | 2 +- vmod/nvdla/cdma/NV_NVDLA_CDMA_img.v | 4 ++-- vmod/nvdla/cdma/NV_NVDLA_CDMA_wt.v | 14 +++++++------- vmod/nvdla/cdp/NV_NVDLA_CDP_DP_lut.v | 12 ++++++------ vmod/nvdla/cdp/NV_NVDLA_CDP_RDMA_eg.v | 6 +++--- vmod/nvdla/cdp/NV_NVDLA_CDP_RDMA_ig.v | 2 +- vmod/nvdla/cdp/NV_NVDLA_CDP_wdma.v | 2 +- vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_active.v | 6 +++--- vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_cfg.v | 4 ++-- vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_rt_out.v | 8 ++++---- vmod/nvdla/csc/NV_NVDLA_CSC_WL_dec.v | 6 +++--- vmod/nvdla/csc/NV_NVDLA_CSC_dl.v | 6 +++--- vmod/nvdla/csc/NV_NVDLA_CSC_sg.v | 4 ++-- vmod/nvdla/pdp/NV_NVDLA_PDP_CORE_preproc.v | 4 ++-- vmod/nvdla/pdp/NV_NVDLA_PDP_RDMA_eg.v | 8 ++++---- vmod/nvdla/pdp/NV_NVDLA_PDP_RDMA_ig.v | 2 +- vmod/nvdla/sdp/NV_NVDLA_SDP_HLS_X_int_alu.v | 2 +- vmod/nvdla/sdp/NV_NVDLA_SDP_RDMA_EG_ro.v | 4 ++-- vmod/nvdla/sdp/NV_NVDLA_SDP_WDMA_DAT_in.v | 17 +++++++++-------- 19 files changed, 57 insertions(+), 56 deletions(-) diff --git a/vmod/nvdla/cdma/NV_NVDLA_CDMA_dc.v b/vmod/nvdla/cdma/NV_NVDLA_CDMA_dc.v index 8757ccc5..dc61db2a 100644 --- a/vmod/nvdla/cdma/NV_NVDLA_CDMA_dc.v +++ b/vmod/nvdla/cdma/NV_NVDLA_CDMA_dc.v @@ -407,7 +407,7 @@ wire dma_rd_req_vld; //: wire [${M}-1:0] dma_rd_rsp_mask; //: ); //: foreach my $k (0..$M-1) { -//: print qq( reg [${atmm}-1:0] dma_rsp_data_p${k}; \n); +//: print qq( wire [${atmm}-1:0] dma_rsp_data_p${k}; \n); //: } wire dma_rd_rsp_rdy; wire dma_rd_rsp_vld; diff --git a/vmod/nvdla/cdma/NV_NVDLA_CDMA_img.v b/vmod/nvdla/cdma/NV_NVDLA_CDMA_img.v index c0e376c7..21ee56ac 100644 --- a/vmod/nvdla/cdma/NV_NVDLA_CDMA_img.v +++ b/vmod/nvdla/cdma/NV_NVDLA_CDMA_img.v @@ -206,8 +206,8 @@ input status2dma_fsm_switch; //: output img2sbuf_p${i}_wr_en ; //: output [7:0] img2sbuf_p${i}_wr_addr; //: output [${atmm}-1:0] img2sbuf_p${i}_wr_data; -//: output reg img2sbuf_p${i}_rd_en; -//: output reg [7:0] img2sbuf_p${i}_rd_addr; +//: output img2sbuf_p${i}_rd_en; +//: output [7:0] img2sbuf_p${i}_rd_addr; //: input [${atmm}-1:0] img2sbuf_p${i}_rd_data; //: ); //: } diff --git a/vmod/nvdla/cdma/NV_NVDLA_CDMA_wt.v b/vmod/nvdla/cdma/NV_NVDLA_CDMA_wt.v index 1e3fcc44..838315b9 100644 --- a/vmod/nvdla/cdma/NV_NVDLA_CDMA_wt.v +++ b/vmod/nvdla/cdma/NV_NVDLA_CDMA_wt.v @@ -259,8 +259,8 @@ reg dbg_src_rd_ptr; reg dbg_src_wr_ptr; reg [31:0] dbg_wmb_kernel_bits; reg [31:0] dbg_wt_kernel_bytes; -reg [3:0] dma_req_size; -reg [2:0] dma_req_size_out; +wire [3:0] dma_req_size; +wire [2:0] dma_req_size_out; //: my $mask = NVDLA_CDMA_MEM_MASK_BIT; //: my $atmm = (NVDLA_MEMORY_ATOMIC_SIZE * NVDLA_BPE); @@ -273,7 +273,7 @@ reg [2:0] dma_req_size_out; //: ); //: foreach my $i(0..$mask-1) { //: print qq( -//: reg [${atmm}-1:0] dma_rsp_data_p${i}; +//: wire [${atmm}-1:0] dma_rsp_data_p${i}; //: ); //: } wire [NVDLA_CDMA_DMAIF_BW-1:0] wt_cbuf_wr_data_ori_w; @@ -281,7 +281,7 @@ wire [NVDLA_CDMA_DMAIF_BW-1:0] wt_cbuf_wr_data_w; reg [NVDLA_CDMA_DMAIF_BW-1:0] cdma2buf_wt_wr_data; wire [NVDLA_CDMA_DMAIF_BW-1:0] wmb_cbuf_wr_data_w; wire [NVDLA_CDMA_DMAIF_BW-1:0] cdma2buf_wt_wr_data_w; -reg [3:0] dma_rsp_size; +wire [3:0] dma_rsp_size; reg [3:0] dma_rsp_size_cnt; wire [31:0] dp2reg_wt_rd_latency=32'd0; reg [31:0] dp2reg_wt_rd_stall; @@ -301,8 +301,8 @@ reg [10:0] ltc_1_cnt_mod; reg [10:0] ltc_1_cnt_new; reg [10:0] ltc_1_cnt_nxt; reg [8:0] ltc_1_cnt_cur; -reg ltc_1_dec; -reg ltc_1_inc; +wire ltc_1_dec; +wire ltc_1_inc; reg ltc_2_adv; reg [33:0] ltc_2_cnt_dec; reg [33:0] ltc_2_cnt_ext; @@ -622,7 +622,7 @@ wire wt_local_data_vld_w; //: wire [64-${atmbw}-1:0] wt_req_addr_w; //: reg [64-${atmbw}-1:0] wt_req_addr_d2; //: reg [64-${atmbw}-1:0] wt_req_addr_d3; -//: reg [64-${atmbw}-1:0] dma_req_addr; +//: wire [64-${atmbw}-1:0] dma_req_addr; //: wire [64-${atmbw}-1-3:0] wt_req_addr_inc; //: wire [64-${atmbw}-1:0] wmb_req_addr_w; //: reg [64-${atmbw}-1:0] wmb_req_addr_d2; diff --git a/vmod/nvdla/cdp/NV_NVDLA_CDP_DP_lut.v b/vmod/nvdla/cdp/NV_NVDLA_CDP_DP_lut.v index d646928d..512c248f 100644 --- a/vmod/nvdla/cdp/NV_NVDLA_CDP_DP_lut.v +++ b/vmod/nvdla/cdp/NV_NVDLA_CDP_DP_lut.v @@ -94,14 +94,14 @@ reg lut2intp_pvld; //: my $k = NVDLA_CDP_THROUGHPUT; //: foreach my $m (0..$k-1) { //: print qq( -//: reg [31:0] lut2intp_X_data_${m}0; -//: reg [16:0] lut2intp_X_data_${m}0_17b; -//: reg [31:0] lut2intp_X_data_${m}1; -//: reg [19:0] lut2intp_X_info_${m}; +//: wire [31:0] lut2intp_X_data_${m}0; +//: wire [16:0] lut2intp_X_data_${m}0_17b; +//: wire [31:0] lut2intp_X_data_${m}1; +//: wire [19:0] lut2intp_X_info_${m}; //: ); //: } -reg [NVDLA_CDP_THROUGHPUT-1:0] lut2intp_X_sel; -reg [NVDLA_CDP_THROUGHPUT-1:0] lut2intp_Y_sel; +wire [NVDLA_CDP_THROUGHPUT-1:0] lut2intp_X_sel; +wire [NVDLA_CDP_THROUGHPUT-1:0] lut2intp_Y_sel; reg [NVDLA_CDP_THROUGHPUT-1:0] lutX_sel; reg [NVDLA_CDP_THROUGHPUT-1:0] lutY_sel; //: my $k = NVDLA_CDP_THROUGHPUT; diff --git a/vmod/nvdla/cdp/NV_NVDLA_CDP_RDMA_eg.v b/vmod/nvdla/cdp/NV_NVDLA_CDP_RDMA_eg.v index 30c57ba0..025863dd 100644 --- a/vmod/nvdla/cdp/NV_NVDLA_CDP_RDMA_eg.v +++ b/vmod/nvdla/cdp/NV_NVDLA_CDP_RDMA_eg.v @@ -88,13 +88,13 @@ reg [3:0] beat_cnt; reg cdp2cvif_rd_cdt_lat_fifo_pop; #endif reg cdp2mcif_rd_cdt_lat_fifo_pop; -reg [NVDLA_CDP_THROUGHPUT*NVDLA_BPE+22:0] cdp_rdma2dp_pd; +wire [NVDLA_CDP_THROUGHPUT*NVDLA_BPE+22:0] cdp_rdma2dp_pd; //reg cdp_rdma2dp_valid_f; -reg dp2reg_done_flag; +wire dp2reg_done_flag; reg [NVDLA_CDP_THROUGHPUT*NVDLA_BPE-1:0] dp_data; wire dp_rdy; reg dp_vld; -reg eg2ig_done_flag; +wire eg2ig_done_flag; reg [NVDLA_CDP_THROUGHPUT-1:0] invalid_flag; reg is_last_c; reg is_last_h; diff --git a/vmod/nvdla/cdp/NV_NVDLA_CDP_RDMA_ig.v b/vmod/nvdla/cdp/NV_NVDLA_CDP_RDMA_ig.v index c1b29ac7..987d9de0 100644 --- a/vmod/nvdla/cdp/NV_NVDLA_CDP_RDMA_ig.v +++ b/vmod/nvdla/cdp/NV_NVDLA_CDP_RDMA_ig.v @@ -95,7 +95,7 @@ reg [31:0] mon_gap_between_layers; reg mon_layer_end_flg; reg mon_op_en_dly; reg mon_size_of_32x1_in_first_block_in_width_c; -reg [10:0] number_of_total_trans_in_width; +wire [10:0] number_of_total_trans_in_width; reg [2:0] req_size; reg [2:0] size_of_32x1_in_first_block_in_width; reg stl_adv; diff --git a/vmod/nvdla/cdp/NV_NVDLA_CDP_wdma.v b/vmod/nvdla/cdp/NV_NVDLA_CDP_wdma.v index db82a48b..233acde8 100644 --- a/vmod/nvdla/cdp/NV_NVDLA_CDP_wdma.v +++ b/vmod/nvdla/cdp/NV_NVDLA_CDP_wdma.v @@ -95,7 +95,7 @@ reg cv_dma_wr_rsp_complete; reg cv_pending; reg dat_en; reg [63:0] dma_req_addr; -reg dma_wr_rsp_complete; +wire dma_wr_rsp_complete; reg [31:0] dp2reg_d0_perf_write_stall; reg [31:0] dp2reg_d1_perf_write_stall; //: my $jx = NVDLA_MEMORY_ATOMIC_SIZE*NVDLA_BPE; diff --git a/vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_active.v b/vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_active.v index 3cc538ed..a2841354 100644 --- a/vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_active.v +++ b/vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_active.v @@ -95,15 +95,15 @@ input [CMAC_ATOMK_HALF-1:0] in_wt_sel; //: reg [CMAC_BPE*CMAC_ATOMC-1:0] dat_actv_data_reg${i}; //: ) //: } -reg [CMAC_BPE*CMAC_ATOMC-1:0] dat_pre_data_w; +wire [CMAC_BPE*CMAC_ATOMC-1:0] dat_pre_data_w; wire [CMAC_ATOMC-1:0] dat_pre_mask_w; reg [CMAC_ATOMC-1:0] dat_pre_nz_w; reg dat_pre_stripe_end; reg dat_pre_stripe_st; reg [CMAC_BPE*CMAC_ATOMC-1:0] wt_pre_data; -reg [CMAC_BPE*CMAC_ATOMC-1:0] wt_pre_data_w; +wire [CMAC_BPE*CMAC_ATOMC-1:0] wt_pre_data_w; reg [CMAC_ATOMC-1:0] wt_pre_mask; -reg [CMAC_ATOMC-1:0] wt_pre_mask_w; +wire [CMAC_ATOMC-1:0] wt_pre_mask_w; reg [CMAC_ATOMC-1:0] wt_pre_nz_w; diff --git a/vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_cfg.v b/vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_cfg.v index 2b30cfed..62af3ba2 100644 --- a/vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_cfg.v +++ b/vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_cfg.v @@ -25,8 +25,8 @@ input reg2dp_conv_mode; input reg2dp_op_en; output cfg_is_wg; output cfg_reg_en; -reg cfg_is_wg_w; -reg cfg_reg_en_w; +wire cfg_is_wg_w; +wire cfg_reg_en_w; //: &eperl::flop(" -q op_en_d1 -d \"reg2dp_op_en\" -clk nvdla_core_clk -rst nvdla_core_rstn "); diff --git a/vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_rt_out.v b/vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_rt_out.v index 3d40661b..11d03c70 100644 --- a/vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_rt_out.v +++ b/vmod/nvdla/cmac/NV_NVDLA_CMAC_CORE_rt_out.v @@ -53,10 +53,10 @@ output dp2reg_done; output [CMAC_ATOMK_HALF-1:0] mac2accu_mask; output [8:0] mac2accu_pd; output mac2accu_pvld; -reg [CMAC_ATOMK_HALF-1:0] mac2accu_mask; -reg [8:0] mac2accu_pd; -reg mac2accu_pvld; -reg out_layer_done; +wire [CMAC_ATOMK_HALF-1:0] mac2accu_mask; +wire [8:0] mac2accu_pd; +wire mac2accu_pvld; +wire out_layer_done; wire out_rt_done_d0; diff --git a/vmod/nvdla/csc/NV_NVDLA_CSC_WL_dec.v b/vmod/nvdla/csc/NV_NVDLA_CSC_WL_dec.v index 8fbf4b27..b9111474 100644 --- a/vmod/nvdla/csc/NV_NVDLA_CSC_WL_dec.v +++ b/vmod/nvdla/csc/NV_NVDLA_CSC_WL_dec.v @@ -49,8 +49,8 @@ reg [CSC_ATOMC*CSC_BPE-1:0] data_d1; reg [CSC_ATOMC-1:0] mask_d1; //reg [CSC_ATOMC-1:0] mask_d2_fp16_w; //reg [CSC_ATOMC-1:0] mask_d2_int16_w; -reg [CSC_ATOMC-1:0] mask_d2_int8_w; -reg [CSC_ATOMC-1:0] mask_d2_w; +wire [CSC_ATOMC-1:0] mask_d2_int8_w; +wire [CSC_ATOMC-1:0] mask_d2_w; reg [CSC_ATOMC-1:0] mask_d3; reg [CSC_ATOMK-1:0] sel_d1; reg [CSC_ATOMK-1:0] sel_d2; @@ -73,7 +73,7 @@ reg valid_d3; //: } //: my $k = $j - 1; //: my $series_no = sprintf("%02d", $i); -//: print qq(reg [${k}:0] vec_sum_${series_no};\n); +//: print qq(wire [${k}:0] vec_sum_${series_no};\n); //: print qq(reg [${k}:0] vec_sum_${series_no}_d1;\n); //: } diff --git a/vmod/nvdla/csc/NV_NVDLA_CSC_dl.v b/vmod/nvdla/csc/NV_NVDLA_CSC_dl.v index 4daa4d34..48c46d3c 100644 --- a/vmod/nvdla/csc/NV_NVDLA_CSC_dl.v +++ b/vmod/nvdla/csc/NV_NVDLA_CSC_dl.v @@ -201,12 +201,12 @@ reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l0_sft; reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l0_sft_d1; reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l0_sft_d2; reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l0_sft_d3; -reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l1_sft; +wire [CBUF_ENTRY_BITS-1:0] dat_rsp_l1_sft; reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l1_sft_d2; reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l1_sft_d3; -reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l2_sft; +wire [CBUF_ENTRY_BITS-1:0] dat_rsp_l2_sft; reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l2_sft_d3; -reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l3_sft; +wire [CBUF_ENTRY_BITS-1:0] dat_rsp_l3_sft; reg [26:0] dat_rsp_pd_d1; reg [26:0] dat_rsp_pd_d2; reg [26:0] dat_rsp_pd_d3; diff --git a/vmod/nvdla/csc/NV_NVDLA_CSC_sg.v b/vmod/nvdla/csc/NV_NVDLA_CSC_sg.v index 13f2758c..acb534fd 100644 --- a/vmod/nvdla/csc/NV_NVDLA_CSC_sg.v +++ b/vmod/nvdla/csc/NV_NVDLA_CSC_sg.v @@ -130,7 +130,7 @@ reg [4:0] dat_pkg_h_offset; reg dat_pkg_layer_end; reg [6:0] dat_pkg_stripe_length; reg [4:0] dat_pkg_w_offset; -reg [30:0] dat_pop_pd; +wire [30:0] dat_pop_pd; reg [6:0] dat_stripe_length; reg [6:0] dat_stripe_size; reg [5:0] data_batch; @@ -186,7 +186,7 @@ reg [2:0] wt_pkg_cur_sub_h; reg [6:0] wt_pkg_kernel_size; reg [6:0] wt_pkg_weight_size; reg wt_pkg_wt_release; -reg [17:0] wt_pop_pd; +wire [17:0] wt_pop_pd; reg wt_pop_ready_d1; wire [7:0] c_fetch_size; wire cbuf_ready; diff --git a/vmod/nvdla/pdp/NV_NVDLA_PDP_CORE_preproc.v b/vmod/nvdla/pdp/NV_NVDLA_PDP_CORE_preproc.v index 685f8750..6e527fe1 100644 --- a/vmod/nvdla/pdp/NV_NVDLA_PDP_CORE_preproc.v +++ b/vmod/nvdla/pdp/NV_NVDLA_PDP_CORE_preproc.v @@ -65,9 +65,9 @@ reg [12:0] line_cnt; reg op_en_d1; reg [4:0] pos_c; reg [4:0] sdp2pdp_c_cnt; -reg sdp2pdp_en_sync; +wire sdp2pdp_en_sync; reg [12:0] sdp2pdp_height_cnt; -reg [NVDLA_PDP_ONFLY_INPUT_BW-1:0] sdp2pdp_pd_use; +wire [NVDLA_PDP_ONFLY_INPUT_BW-1:0] sdp2pdp_pd_use; //: my $atomicm = NVDLA_MEMORY_ATOMIC_SIZE; //: my $k = int( log($atomicm)/log(2) ); //: print "reg [12-${k}:0] sdp2pdp_surf_cnt; \n"; diff --git a/vmod/nvdla/pdp/NV_NVDLA_PDP_RDMA_eg.v b/vmod/nvdla/pdp/NV_NVDLA_PDP_RDMA_eg.v index 127082e3..e2cc8dc0 100644 --- a/vmod/nvdla/pdp/NV_NVDLA_PDP_RDMA_eg.v +++ b/vmod/nvdla/pdp/NV_NVDLA_PDP_RDMA_eg.v @@ -71,11 +71,11 @@ input [31:0] pwrbus_ram_pd; reg [13:0] beat_cnt; wire dma_rd_rsp_rdy; -reg dp2reg_done_flag; +wire dp2reg_done_flag; reg [NVDLA_PDP_BWPE*NVDLA_PDP_THROUGHPUT-1:0] dp_data; wire dp_rdy; reg dp_vld; -reg eg2ig_done_flag; +wire eg2ig_done_flag; reg [5:0] fifo_sel_cnt; reg is_cube_end; reg is_line_end; @@ -83,8 +83,8 @@ reg is_split_end; reg is_surf_end; reg pdp2cvif_rd_cdt_lat_fifo_pop; reg pdp2mcif_rd_cdt_lat_fifo_pop; -reg [NVDLA_PDP_BWPE*NVDLA_PDP_THROUGHPUT+11:0] pdp_rdma2dp_pd; -reg rdma2wdma_done_flag; +wire [NVDLA_PDP_BWPE*NVDLA_PDP_THROUGHPUT+11:0] pdp_rdma2dp_pd; +wire rdma2wdma_done_flag; reg [3:0] tran_cnt; reg [13:0] width_cnt; wire [NVDLA_PDP_MEM_RD_RSP-1:0] cv_dma_rd_rsp_pd; diff --git a/vmod/nvdla/pdp/NV_NVDLA_PDP_RDMA_ig.v b/vmod/nvdla/pdp/NV_NVDLA_PDP_RDMA_ig.v index 90bd0093..a06b319a 100644 --- a/vmod/nvdla/pdp/NV_NVDLA_PDP_RDMA_ig.v +++ b/vmod/nvdla/pdp/NV_NVDLA_PDP_RDMA_ig.v @@ -103,7 +103,7 @@ reg mon_base_addr_width_c; reg [31:0] mon_gap_between_layers; reg mon_layer_end_flg; reg mon_op_en_dly; -reg [14:0] number_of_byte_in_c; +wire [14:0] number_of_byte_in_c; reg op_process; reg [31:0] pdp_rd_stall_count; reg [12:0] req_size; diff --git a/vmod/nvdla/sdp/NV_NVDLA_SDP_HLS_X_int_alu.v b/vmod/nvdla/sdp/NV_NVDLA_SDP_HLS_X_int_alu.v index 84904455..54c6ed51 100644 --- a/vmod/nvdla/sdp/NV_NVDLA_SDP_HLS_X_int_alu.v +++ b/vmod/nvdla/sdp/NV_NVDLA_SDP_HLS_X_int_alu.v @@ -46,7 +46,7 @@ output alu_op_prdy; output alu_out_pvld; wire [32:0] alu_sum; reg [32:0] alu_dout; -reg mon_sum_c; +wire mon_sum_c; wire [32:0] alu_data_ext; wire [32:0] alu_data_final; wire [31:0] alu_data_reg; diff --git a/vmod/nvdla/sdp/NV_NVDLA_SDP_RDMA_EG_ro.v b/vmod/nvdla/sdp/NV_NVDLA_SDP_RDMA_EG_ro.v index 89dab414..b461a05b 100644 --- a/vmod/nvdla/sdp/NV_NVDLA_SDP_RDMA_EG_ro.v +++ b/vmod/nvdla/sdp/NV_NVDLA_SDP_RDMA_EG_ro.v @@ -87,7 +87,7 @@ wire is_batch_end; reg [12:0] count_h; reg [12:0] count_w; reg [13-AM_AW:0] count_c; -reg is_last_beat; +wire is_last_beat; wire is_cube_end; wire is_last_c; wire is_last_h; @@ -131,7 +131,7 @@ reg out_vld_1bpe; reg out_vld_2bpe; wire out_accept; wire out_rdy; -reg out_vld; +wire out_vld; wire [AM_DW2:0] out_pd; diff --git a/vmod/nvdla/sdp/NV_NVDLA_SDP_WDMA_DAT_in.v b/vmod/nvdla/sdp/NV_NVDLA_SDP_WDMA_DAT_in.v index 40e8e180..b2416145 100644 --- a/vmod/nvdla/sdp/NV_NVDLA_SDP_WDMA_DAT_in.v +++ b/vmod/nvdla/sdp/NV_NVDLA_SDP_WDMA_DAT_in.v @@ -178,10 +178,6 @@ wire in_dat_accept; wire in_dat_rdy; wire is_last_beat; reg [13:0] beat_count; -reg dfifo0_wr_en; -reg dfifo1_wr_en; -reg dfifo2_wr_en; -reg dfifo3_wr_en; wire [AM_DW-1:0] dfifo0_wr_pd; wire dfifo0_wr_prdy; wire dfifo0_wr_pvld; @@ -589,6 +585,11 @@ end assign in_dat_rdy = dfifo0_wr_rdy & dfifo1_wr_rdy & dfifo2_wr_rdy & dfifo3_wr_rdy; assign in_dat_accept = (dfifo0_wr_pvld & dfifo0_wr_prdy) | (dfifo1_wr_pvld & dfifo1_wr_prdy) | (dfifo2_wr_pvld & dfifo2_wr_prdy) | (dfifo3_wr_pvld & dfifo3_wr_prdy); + +reg dfifo0_wr_en; +reg dfifo1_wr_en; +reg dfifo2_wr_en; +reg dfifo3_wr_en; // 4 FIFOs, 16B each, 64B in total // DATA FIFO WRITE SIDE always @( @@ -768,10 +769,10 @@ assign dfifo3_wr_rdy = dfifo3_wr_en ? dfifo3_wr_prdy : 1'b1; assign in_dat_rdy = dfifo0_wr_rdy & dfifo1_wr_rdy & dfifo2_wr_rdy & dfifo3_wr_rdy; assign in_dat_accept = (dfifo0_wr_pvld & dfifo0_wr_prdy) | (dfifo1_wr_pvld & dfifo1_wr_prdy) | (dfifo2_wr_pvld & dfifo2_wr_prdy) | (dfifo3_wr_pvld & dfifo3_wr_prdy); -assign dfifo0_wr_en = beat_count[1:0] == 2'h0; -assign dfifo1_wr_en = beat_count[1:0] == 2'h1; -assign dfifo2_wr_en = beat_count[1:0] == 2'h2; -assign dfifo3_wr_en = beat_count[1:0] == 2'h3; +wire dfifo0_wr_en = beat_count[1:0] == 2'h0; +wire dfifo1_wr_en = beat_count[1:0] == 2'h1; +wire dfifo2_wr_en = beat_count[1:0] == 2'h2; +wire dfifo3_wr_en = beat_count[1:0] == 2'h3; assign dfifo0_wr_pvld = sdp_dp2wdma_valid & dfifo0_wr_en; assign dfifo0_wr_rdy = dfifo0_wr_en ? dfifo0_wr_prdy : 1'b1; From 46a2eee5cc6d43b8765c4f85e21a2a4912a9f1b0 Mon Sep 17 00:00:00 2001 From: sgong Date: Mon, 18 Jun 2018 20:19:45 -0700 Subject: [PATCH 27/28] fix spyglass warning for reg-assign --- vmod/nvdla/csc/NV_NVDLA_CSC_dl.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/vmod/nvdla/csc/NV_NVDLA_CSC_dl.v b/vmod/nvdla/csc/NV_NVDLA_CSC_dl.v index 48c46d3c..021d10c7 100644 --- a/vmod/nvdla/csc/NV_NVDLA_CSC_dl.v +++ b/vmod/nvdla/csc/NV_NVDLA_CSC_dl.v @@ -197,7 +197,7 @@ reg [1:0] dat_req_sub_w_d2; reg dat_req_sub_w_st_d1; reg dat_req_sub_w_st_d2; reg dat_req_valid_d1; -reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l0_sft; +wire [CBUF_ENTRY_BITS-1:0] dat_rsp_l0_sft; reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l0_sft_d1; reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l0_sft_d2; reg [CBUF_ENTRY_BITS-1:0] dat_rsp_l0_sft_d3; From 2becf69937b7409d21805aa4fda22659cd1204f0 Mon Sep 17 00:00:00 2001 From: tonyz Date: Mon, 18 Jun 2018 21:45:34 -0700 Subject: [PATCH 28/28] fix rtl for spyglass issue and add waive file for cdma --- vmod/nvdla/cdma/NV_NVDLA_CDMA_dc.v | 8 ++++++++ vmod/nvdla/cdma/NV_NVDLA_cdma.swl | 2 ++ 2 files changed, 10 insertions(+) create mode 100644 vmod/nvdla/cdma/NV_NVDLA_cdma.swl diff --git a/vmod/nvdla/cdma/NV_NVDLA_CDMA_dc.v b/vmod/nvdla/cdma/NV_NVDLA_CDMA_dc.v index dc61db2a..afe9b5e5 100644 --- a/vmod/nvdla/cdma/NV_NVDLA_CDMA_dc.v +++ b/vmod/nvdla/cdma/NV_NVDLA_CDMA_dc.v @@ -799,10 +799,18 @@ assign slcg_dc_gate_img = slcg_dc_gate_d3[1]; //////////////////////////////////////////////////////////////////////// //: my $atmm = NVDLA_MEMORY_ATOMIC_SIZE; //: my $atmbw = int(log(${atmm})/log(2)); +//: if($atmbw > 3){ //: print qq( //: assign data_width_sub_one_w = (is_packed_1x1) ? {{(2+${atmbw}){1'b0}}, reg2dp_datain_channel[12:${atmbw}]} : {2'b0, reg2dp_datain_width}; //: assign data_surface_inc = {{(${atmbw}-3){1'b0}}, reg2dp_datain_channel[12:${atmbw}]} + 1'b1; //: ); +//:} +//: else { +//: print qq( +//: assign data_width_sub_one_w = (is_packed_1x1) ? {{(2+${atmbw}){1'b0}}, reg2dp_datain_channel[12:${atmbw}]} : {2'b0, reg2dp_datain_width}; +//: assign data_surface_inc = {reg2dp_datain_channel[12:${atmbw}]} + 1'b1; +//: ); +//:} // assign is_data_expand = 1'b0; //assign is_data_shrink = 1'b0; diff --git a/vmod/nvdla/cdma/NV_NVDLA_cdma.swl b/vmod/nvdla/cdma/NV_NVDLA_cdma.swl new file mode 100644 index 00000000..d05ac497 --- /dev/null +++ b/vmod/nvdla/cdma/NV_NVDLA_cdma.swl @@ -0,0 +1,2 @@ +waive -regexp -file NV_NVDLA_CDMA_wt.v -msg ".*width 17 should match right expression.*" -rule W362 +waive -regexp -file NV_NVDLA_CDMA_wt.v -msg ".*should be greater than rhs width 17.*" -rule W484